get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/1124624/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 1124624,
    "url": "http://patchwork.ozlabs.org/api/patches/1124624/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20190628150332.59155-10-anthony.l.nguyen@intel.com/",
    "project": {
        "id": 46,
        "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api",
        "name": "Intel Wired Ethernet development",
        "link_name": "intel-wired-lan",
        "list_id": "intel-wired-lan.osuosl.org",
        "list_email": "intel-wired-lan@osuosl.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20190628150332.59155-10-anthony.l.nguyen@intel.com>",
    "list_archive_url": null,
    "date": "2019-06-28T15:03:28",
    "name": "[S23,v2,10/15] ice: update GLINT_DYN_CTL and GLINT_VECT2FUNC register access",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": false,
    "hash": "1ff91708a461a8a8b1869cbc3d1b30c9654c5a8b",
    "submitter": {
        "id": 68875,
        "url": "http://patchwork.ozlabs.org/api/people/68875/?format=api",
        "name": "Tony Nguyen",
        "email": "anthony.l.nguyen@intel.com"
    },
    "delegate": {
        "id": 68,
        "url": "http://patchwork.ozlabs.org/api/users/68/?format=api",
        "username": "jtkirshe",
        "first_name": "Jeff",
        "last_name": "Kirsher",
        "email": "jeffrey.t.kirsher@intel.com"
    },
    "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20190628150332.59155-10-anthony.l.nguyen@intel.com/mbox/",
    "series": [
        {
            "id": 116824,
            "url": "http://patchwork.ozlabs.org/api/series/116824/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=116824",
            "date": "2019-06-28T15:03:26",
            "name": "[S23,v2,01/15] ice: Implement ethtool ops for channels",
            "version": 2,
            "mbox": "http://patchwork.ozlabs.org/series/116824/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/1124624/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/1124624/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<intel-wired-lan-bounces@osuosl.org>",
        "X-Original-To": [
            "incoming@patchwork.ozlabs.org",
            "intel-wired-lan@lists.osuosl.org"
        ],
        "Delivered-To": [
            "patchwork-incoming@bilbo.ozlabs.org",
            "intel-wired-lan@lists.osuosl.org"
        ],
        "Authentication-Results": [
            "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=osuosl.org\n\t(client-ip=140.211.166.136; helo=silver.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)",
            "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=intel.com"
        ],
        "Received": [
            "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 45bCgw57mdz9sBp\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSat, 29 Jun 2019 09:31:07 +1000 (AEST)",
            "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id 974E2228D5;\n\tFri, 28 Jun 2019 23:31:06 +0000 (UTC)",
            "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id PRk5aN2MIIuk; Fri, 28 Jun 2019 23:31:04 +0000 (UTC)",
            "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby silver.osuosl.org (Postfix) with ESMTP id EC8B62286C;\n\tFri, 28 Jun 2019 23:31:03 +0000 (UTC)",
            "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\tby ash.osuosl.org (Postfix) with ESMTP id CF6791BF2E3\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 28 Jun 2019 23:31:00 +0000 (UTC)",
            "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id CBAA4226CF\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 28 Jun 2019 23:31:00 +0000 (UTC)",
            "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id d57fw2C8L82R for <intel-wired-lan@lists.osuosl.org>;\n\tFri, 28 Jun 2019 23:30:58 +0000 (UTC)",
            "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n\tby silver.osuosl.org (Postfix) with ESMTPS id 9A5DD22849\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 28 Jun 2019 23:30:58 +0000 (UTC)",
            "from fmsmga007.fm.intel.com ([10.253.24.52])\n\tby orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t28 Jun 2019 16:30:57 -0700",
            "from unknown (HELO localhost.jf.intel.com) ([10.166.244.174])\n\tby fmsmga007.fm.intel.com with ESMTP; 28 Jun 2019 16:30:56 -0700"
        ],
        "X-Virus-Scanned": [
            "amavisd-new at osuosl.org",
            "amavisd-new at osuosl.org"
        ],
        "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6",
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.63,429,1557212400\"; d=\"scan'208\";a=\"164803444\"",
        "From": "Tony Nguyen <anthony.l.nguyen@intel.com>",
        "To": "intel-wired-lan@lists.osuosl.org",
        "Date": "Fri, 28 Jun 2019 08:03:28 -0700",
        "Message-Id": "<20190628150332.59155-10-anthony.l.nguyen@intel.com>",
        "X-Mailer": "git-send-email 2.20.1",
        "In-Reply-To": "<20190628150332.59155-1-anthony.l.nguyen@intel.com>",
        "References": "<20190628150332.59155-1-anthony.l.nguyen@intel.com>",
        "MIME-Version": "1.0",
        "Subject": "[Intel-wired-lan] [PATCH S23 v2 10/15] ice: update GLINT_DYN_CTL\n\tand GLINT_VECT2FUNC register access",
        "X-BeenThere": "intel-wired-lan@osuosl.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>",
        "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>",
        "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>",
        "List-Post": "<mailto:intel-wired-lan@osuosl.org>",
        "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>",
        "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>",
        "Content-Type": "text/plain; charset=\"us-ascii\"",
        "Content-Transfer-Encoding": "7bit",
        "Errors-To": "intel-wired-lan-bounces@osuosl.org",
        "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>"
    },
    "content": "From: Paul Greenwalt <paul.greenwalt@intel.com>\n\nRegister access for GLINT_DYN_CTL and GLINT_VECT2FUNC should be within\nthe PF space and not the absolute device space.\n\nSigned-off-by: Paul Greenwalt <paul.greenwalt@intel.com>\n---\n .../net/ethernet/intel/ice/ice_virtchnl_pf.c  | 24 +++++++++++--------\n .../net/ethernet/intel/ice/ice_virtchnl_pf.h  |  3 ++-\n 2 files changed, 16 insertions(+), 11 deletions(-)",
    "diff": "diff --git a/drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c b/drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c\nindex 553c4c4f6dd0..b1972c39c232 100644\n--- a/drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c\n+++ b/drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c\n@@ -474,19 +474,20 @@ ice_vf_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi, u16 vf_id)\n }\n \n /**\n- * ice_calc_vf_first_vector_idx - Calculate absolute MSIX vector index in HW\n+ * ice_calc_vf_first_vector_idx - Calculate MSIX vector index in the PF space\n  * @pf: pointer to PF structure\n  * @vf: pointer to VF that the first MSIX vector index is being calculated for\n  *\n- * This returns the first MSIX vector index in HW that is used by this VF and\n- * this will always be the OICR index in the AVF driver so any functionality\n+ * This returns the first MSIX vector index in PF space that is used by this VF.\n+ * This index is used when accessing PF relative registers such as\n+ * GLINT_VECT2FUNC and GLINT_DYN_CTL.\n+ * This will always be the OICR index in the AVF driver so any functionality\n  * using vf->first_vector_idx for queue configuration will have to increment by\n  * 1 to avoid meddling with the OICR index.\n  */\n static int ice_calc_vf_first_vector_idx(struct ice_pf *pf, struct ice_vf *vf)\n {\n-\treturn pf->hw.func_caps.common_cap.msix_vector_first_id +\n-\t\tpf->sriov_base_vector + vf->vf_id * pf->num_vf_msix;\n+\treturn pf->sriov_base_vector + vf->vf_id * pf->num_vf_msix;\n }\n \n /**\n@@ -597,27 +598,30 @@ static int ice_alloc_vf_res(struct ice_vf *vf)\n  */\n static void ice_ena_vf_mappings(struct ice_vf *vf)\n {\n+\tint abs_vf_id, abs_first, abs_last;\n \tstruct ice_pf *pf = vf->pf;\n \tstruct ice_vsi *vsi;\n \tint first, last, v;\n \tstruct ice_hw *hw;\n-\tint abs_vf_id;\n \tu32 reg;\n \n \thw = &pf->hw;\n \tvsi = pf->vsi[vf->lan_vsi_idx];\n \tfirst = vf->first_vector_idx;\n \tlast = (first + pf->num_vf_msix) - 1;\n+\tabs_first = first + pf->hw.func_caps.common_cap.msix_vector_first_id;\n+\tabs_last = (abs_first + pf->num_vf_msix) - 1;\n \tabs_vf_id = vf->vf_id + hw->func_caps.vf_base_id;\n \n \t/* VF Vector allocation */\n-\treg = (((first << VPINT_ALLOC_FIRST_S) & VPINT_ALLOC_FIRST_M) |\n-\t       ((last << VPINT_ALLOC_LAST_S) & VPINT_ALLOC_LAST_M) |\n+\treg = (((abs_first << VPINT_ALLOC_FIRST_S) & VPINT_ALLOC_FIRST_M) |\n+\t       ((abs_last << VPINT_ALLOC_LAST_S) & VPINT_ALLOC_LAST_M) |\n \t       VPINT_ALLOC_VALID_M);\n \twr32(hw, VPINT_ALLOC(vf->vf_id), reg);\n \n-\treg = (((first << VPINT_ALLOC_PCI_FIRST_S) & VPINT_ALLOC_PCI_FIRST_M) |\n-\t       ((last << VPINT_ALLOC_PCI_LAST_S) & VPINT_ALLOC_PCI_LAST_M) |\n+\treg = (((abs_first << VPINT_ALLOC_PCI_FIRST_S)\n+\t\t & VPINT_ALLOC_PCI_FIRST_M) |\n+\t       ((abs_last << VPINT_ALLOC_PCI_LAST_S) & VPINT_ALLOC_PCI_LAST_M) |\n \t       VPINT_ALLOC_PCI_VALID_M);\n \twr32(hw, VPINT_ALLOC_PCI(vf->vf_id), reg);\n \t/* map the interrupts to its functions */\ndiff --git a/drivers/net/ethernet/intel/ice/ice_virtchnl_pf.h b/drivers/net/ethernet/intel/ice/ice_virtchnl_pf.h\nindex ada69120ff38..424bc0538956 100644\n--- a/drivers/net/ethernet/intel/ice/ice_virtchnl_pf.h\n+++ b/drivers/net/ethernet/intel/ice/ice_virtchnl_pf.h\n@@ -45,7 +45,8 @@ struct ice_vf {\n \n \ts16 vf_id;\t\t\t/* VF ID in the PF space */\n \tu16 lan_vsi_idx;\t\t/* index into PF struct */\n-\tint first_vector_idx;\t\t/* first vector index of this VF */\n+\t/* first vector index of this VF in the PF space */\n+\tint first_vector_idx;\n \tstruct ice_sw *vf_sw_id;\t/* switch ID the VF VSIs connect to */\n \tstruct virtchnl_version_info vf_ver;\n \tu32 driver_caps;\t\t/* reported by VF driver */\n",
    "prefixes": [
        "S23",
        "v2",
        "10/15"
    ]
}