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GET /api/patches/1123747/?format=api
{ "id": 1123747, "url": "http://patchwork.ozlabs.org/api/patches/1123747/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20190627144101.24280-4-anthony.l.nguyen@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20190627144101.24280-4-anthony.l.nguyen@intel.com>", "list_archive_url": null, "date": "2019-06-27T14:40:50", "name": "[S23,04/15] ice: Restructure VFs initialization flows", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": false, "hash": "24b2a897d8f06b5b25dbdb1e7796bab20f94db30", "submitter": { "id": 68875, "url": "http://patchwork.ozlabs.org/api/people/68875/?format=api", "name": "Tony Nguyen", "email": "anthony.l.nguyen@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20190627144101.24280-4-anthony.l.nguyen@intel.com/mbox/", "series": [ { "id": 116575, "url": "http://patchwork.ozlabs.org/api/series/116575/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=116575", "date": "2019-06-27T14:40:51", "name": "[S23,01/15] ice: Implement ethtool ops for channels", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/116575/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1123747/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1123747/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=osuosl.org\n\t(client-ip=140.211.166.136; helo=silver.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=intel.com" ], "Received": [ "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 45ZbDP2Gxgz9sBZ\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 28 Jun 2019 09:08:37 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id BA6EE226A0;\n\tThu, 27 Jun 2019 23:08:35 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id IBVGPqFAUrcR; Thu, 27 Jun 2019 23:08:34 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby silver.osuosl.org (Postfix) with ESMTP id 3E9D522668;\n\tThu, 27 Jun 2019 23:08:34 +0000 (UTC)", "from fraxinus.osuosl.org (smtp4.osuosl.org [140.211.166.137])\n\tby ash.osuosl.org (Postfix) with ESMTP id 486E71BF859\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 27 Jun 2019 23:08:28 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby fraxinus.osuosl.org (Postfix) with ESMTP id 4234384376\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 27 Jun 2019 23:08:28 +0000 (UTC)", "from fraxinus.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 8N-vWxjVmKhg for <intel-wired-lan@lists.osuosl.org>;\n\tThu, 27 Jun 2019 23:08:26 +0000 (UTC)", "from mga17.intel.com (mga17.intel.com [192.55.52.151])\n\tby fraxinus.osuosl.org (Postfix) with ESMTPS id 552D586432\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 27 Jun 2019 23:08:26 +0000 (UTC)", "from orsmga008.jf.intel.com ([10.7.209.65])\n\tby fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t27 Jun 2019 16:08:25 -0700", "from unknown (HELO localhost.jf.intel.com) ([10.166.244.174])\n\tby orsmga008.jf.intel.com with ESMTP; 27 Jun 2019 16:08:25 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.63,425,1557212400\"; d=\"scan'208\";a=\"156396172\"", "From": "Tony Nguyen <anthony.l.nguyen@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Thu, 27 Jun 2019 07:40:50 -0700", "Message-Id": "<20190627144101.24280-4-anthony.l.nguyen@intel.com>", "X-Mailer": "git-send-email 2.20.1", "In-Reply-To": "<20190627144101.24280-1-anthony.l.nguyen@intel.com>", "References": "<20190627144101.24280-1-anthony.l.nguyen@intel.com>", "MIME-Version": "1.0", "Subject": "[Intel-wired-lan] [PATCH S23 04/15] ice: Restructure VFs\n\tinitialization flows", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "From: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>\n\nThis patch restructures how VFs are configured, and resources allocated.\nInstead of freeing resources that were never allocated, and resetting\nempty VFs that have never been created - the new flow will just allocate\nresources for number of requested VFs based on the availability.\n\nDuring VFs initialization process, global interrupt is disabled, and\nrearmed after getting MSIX vectors for VFs. This allows immediate mailbox\ncommunications, instead of delaying it till later and VFs.\nPF communications resulted to using polling instead of actual interrupt.\nThe issue manifested when creating higher number of VFs (128 VFs) per PF.\n\nSigned-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>\n---\n drivers/net/ethernet/intel/ice/ice.h | 1 +\n .../net/ethernet/intel/ice/ice_virtchnl_pf.c | 70 +++++++++++++------\n 2 files changed, 49 insertions(+), 22 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/ice/ice.h b/drivers/net/ethernet/intel/ice/ice.h\nindex 72b5d641e9b8..1a438245f4bf 100644\n--- a/drivers/net/ethernet/intel/ice/ice.h\n+++ b/drivers/net/ethernet/intel/ice/ice.h\n@@ -225,6 +225,7 @@ enum ice_state {\n \t__ICE_CFG_BUSY,\n \t__ICE_SERVICE_SCHED,\n \t__ICE_SERVICE_DIS,\n+\t__ICE_OICR_INTR_DIS,\t\t/* Global OICR interrupt disabled */\n \t__ICE_STATE_NBITS\t\t/* must be last */\n };\n \ndiff --git a/drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c b/drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c\nindex a3849ed283eb..553c4c4f6dd0 100644\n--- a/drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c\n+++ b/drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c\n@@ -974,6 +974,48 @@ ice_vf_set_vsi_promisc(struct ice_vf *vf, struct ice_vsi *vsi, u8 promisc_m,\n \treturn status;\n }\n \n+/**\n+ * ice_config_res_vfs - Finalize allocation of VFs resources in one go\n+ * @pf: pointer to the PF structure\n+ *\n+ * This function is being called as last part of resetting all VFs, or when\n+ * configuring VFs for the first time, where there is no resource to be freed\n+ * Returns true if resources were properly allocated for all VFs, and false\n+ * otherwise.\n+ */\n+static bool ice_config_res_vfs(struct ice_pf *pf)\n+{\n+\tstruct ice_hw *hw = &pf->hw;\n+\tstruct ice_vf *vf;\n+\tint v;\n+\n+\tif (ice_check_avail_res(pf)) {\n+\t\tdev_err(&pf->pdev->dev,\n+\t\t\t\"Cannot allocate VF resources, try with fewer number of VFs\\n\");\n+\t\treturn false;\n+\t}\n+\n+\t/* rearm global interrupts */\n+\tif (test_and_clear_bit(__ICE_OICR_INTR_DIS, pf->state))\n+\t\tice_irq_dynamic_ena(hw, NULL, NULL);\n+\n+\t/* Finish resetting each VF and allocate resources */\n+\tfor (v = 0; v < pf->num_alloc_vfs; v++) {\n+\t\tvf = &pf->vf[v];\n+\n+\t\tvf->num_vf_qs = pf->num_vf_qps;\n+\t\tdev_dbg(&pf->pdev->dev,\n+\t\t\t\"VF-id %d has %d queues configured\\n\",\n+\t\t\tvf->vf_id, vf->num_vf_qs);\n+\t\tice_cleanup_and_realloc_vf(vf);\n+\t}\n+\n+\tice_flush(hw);\n+\tclear_bit(__ICE_VF_DIS, pf->state);\n+\n+\treturn true;\n+}\n+\n /**\n * ice_reset_all_vfs - reset all allocated VFs in one go\n * @pf: pointer to the PF structure\n@@ -1066,25 +1108,8 @@ bool ice_reset_all_vfs(struct ice_pf *pf, bool is_vflr)\n \t\tdev_err(&pf->pdev->dev,\n \t\t\t\"Failed to free MSIX resources used by SR-IOV\\n\");\n \n-\tif (ice_check_avail_res(pf)) {\n-\t\tdev_err(&pf->pdev->dev,\n-\t\t\t\"Cannot allocate VF resources, try with fewer number of VFs\\n\");\n+\tif (!ice_config_res_vfs(pf))\n \t\treturn false;\n-\t}\n-\n-\t/* Finish the reset on each VF */\n-\tfor (v = 0; v < pf->num_alloc_vfs; v++) {\n-\t\tvf = &pf->vf[v];\n-\n-\t\tvf->num_vf_qs = pf->num_vf_qps;\n-\t\tdev_dbg(&pf->pdev->dev,\n-\t\t\t\"VF-id %d has %d queues configured\\n\",\n-\t\t\tvf->vf_id, vf->num_vf_qs);\n-\t\tice_cleanup_and_realloc_vf(vf);\n-\t}\n-\n-\tice_flush(hw);\n-\tclear_bit(__ICE_VF_DIS, pf->state);\n \n \treturn true;\n }\n@@ -1249,7 +1274,7 @@ static int ice_alloc_vfs(struct ice_pf *pf, u16 num_alloc_vfs)\n \t/* Disable global interrupt 0 so we don't try to handle the VFLR. */\n \twr32(hw, GLINT_DYN_CTL(pf->oicr_idx),\n \t ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S);\n-\n+\tset_bit(__ICE_OICR_INTR_DIS, pf->state);\n \tice_flush(hw);\n \n \tret = pci_enable_sriov(pf->pdev, num_alloc_vfs);\n@@ -1278,13 +1303,13 @@ static int ice_alloc_vfs(struct ice_pf *pf, u16 num_alloc_vfs)\n \t}\n \tpf->num_alloc_vfs = num_alloc_vfs;\n \n-\t/* VF resources get allocated during reset */\n-\tif (!ice_reset_all_vfs(pf, true)) {\n+\t/* VF resources get allocated with initialization */\n+\tif (!ice_config_res_vfs(pf)) {\n \t\tret = -EIO;\n \t\tgoto err_unroll_sriov;\n \t}\n \n-\tgoto err_unroll_intr;\n+\treturn ret;\n \n err_unroll_sriov:\n \tpf->vf = NULL;\n@@ -1296,6 +1321,7 @@ static int ice_alloc_vfs(struct ice_pf *pf, u16 num_alloc_vfs)\n err_unroll_intr:\n \t/* rearm interrupts here */\n \tice_irq_dynamic_ena(hw, NULL, NULL);\n+\tclear_bit(__ICE_OICR_INTR_DIS, pf->state);\n \treturn ret;\n }\n \n", "prefixes": [ "S23", "04/15" ] }