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GET /api/patches/1122935/?format=api
{ "id": 1122935, "url": "http://patchwork.ozlabs.org/api/patches/1122935/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20190626092027.52845-2-anthony.l.nguyen@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20190626092027.52845-2-anthony.l.nguyen@intel.com>", "list_archive_url": null, "date": "2019-06-26T09:20:13", "name": "[S22,02/16] ice: track hardware stat registers past rollover", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "a713647154781a53ebbc70cdf718b2cac5d0c0da", "submitter": { "id": 68875, "url": "http://patchwork.ozlabs.org/api/people/68875/?format=api", "name": "Tony Nguyen", "email": "anthony.l.nguyen@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20190626092027.52845-2-anthony.l.nguyen@intel.com/mbox/", "series": [ { "id": 116295, "url": "http://patchwork.ozlabs.org/api/series/116295/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=116295", "date": "2019-06-26T09:20:14", "name": "[S22,01/16] ice: add lp_advertising flow control support", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/116295/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1122935/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1122935/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=osuosl.org\n\t(client-ip=140.211.166.136; helo=silver.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=intel.com" ], "Received": [ "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 45Yr923zc9z9s8m\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 27 Jun 2019 03:48:06 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id 01E3B22011;\n\tWed, 26 Jun 2019 17:48:05 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id 0r6JLWntdhSW; Wed, 26 Jun 2019 17:48:01 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby silver.osuosl.org (Postfix) with ESMTP id 1EDE321FF6;\n\tWed, 26 Jun 2019 17:48:01 +0000 (UTC)", "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\tby ash.osuosl.org (Postfix) with ESMTP id B09651BF326\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 26 Jun 2019 17:47:56 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id A9AE9868E7\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 26 Jun 2019 17:47:56 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id EcqSaFMgwfJc for <intel-wired-lan@lists.osuosl.org>;\n\tWed, 26 Jun 2019 17:47:52 +0000 (UTC)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n\tby whitealder.osuosl.org (Postfix) with ESMTPS id BFCFB8654D\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tWed, 26 Jun 2019 17:47:52 +0000 (UTC)", "from fmsmga001.fm.intel.com ([10.253.24.23])\n\tby orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t26 Jun 2019 10:47:52 -0700", "from unknown (HELO localhost.jf.intel.com) ([10.166.244.174])\n\tby fmsmga001.fm.intel.com with ESMTP; 26 Jun 2019 10:47:51 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.63,420,1557212400\"; d=\"scan'208\";a=\"183218109\"", "From": "Tony Nguyen <anthony.l.nguyen@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Wed, 26 Jun 2019 02:20:13 -0700", "Message-Id": "<20190626092027.52845-2-anthony.l.nguyen@intel.com>", "X-Mailer": "git-send-email 2.20.1", "In-Reply-To": "<20190626092027.52845-1-anthony.l.nguyen@intel.com>", "References": "<20190626092027.52845-1-anthony.l.nguyen@intel.com>", "MIME-Version": "1.0", "Subject": "[Intel-wired-lan] [PATCH S22 02/16] ice: track hardware stat\n\tregisters past rollover", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "From: Jacob Keller <jacob.e.keller@intel.com>\n\nCurrently, ice_stat_update32 and ice_stat_update40 will limit the\nvalue of the software statistic to 32 or 40 bits wide, depending on\nwhich register is being read.\n\nThis means that if a driver is running for a long time, the displayed\nsoftware register values will roll over to zero at 40 bits or 32 bits.\n\nThis occurs because the functions directly assign the difference between\nthe previous value and current value of the hardware statistic.\n\nInstead, add this value to the current software statistic, and then\nupdate the previous value.\n\nIn this way, each time ice_stat_update40 or ice_stat_update32 are\ncalled, they will increment the software tracking value by the\ndifference of the hardware register from its last read. The software\ntracking value will correctly count up until it overflows a u64.\n\nThe only requirement is that the ice_stat_update functions be called at\nleast once each time the hardware register overflows.\n\nWhile we're fixing ice_stat_update40, modify it to use rd64 instead of\ntwo calls to rd32. Additionally, drop the now unnecessary hireg\nfunction parameter.\n\nSigned-off-by: Jacob Keller <jacob.e.keller@intel.com>\nSigned-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>\n---\n drivers/net/ethernet/intel/ice/ice_common.c | 57 +++++++-----\n drivers/net/ethernet/intel/ice/ice_common.h | 4 +-\n .../net/ethernet/intel/ice/ice_hw_autogen.h | 30 -------\n drivers/net/ethernet/intel/ice/ice_lib.c | 40 ++++-----\n drivers/net/ethernet/intel/ice/ice_main.c | 90 ++++++++-----------\n 5 files changed, 91 insertions(+), 130 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c\nindex 2e0731c1e1a3..4be3559de207 100644\n--- a/drivers/net/ethernet/intel/ice/ice_common.c\n+++ b/drivers/net/ethernet/intel/ice/ice_common.c\n@@ -3240,40 +3240,44 @@ void ice_replay_post(struct ice_hw *hw)\n /**\n * ice_stat_update40 - read 40 bit stat from the chip and update stat values\n * @hw: ptr to the hardware info\n- * @hireg: high 32 bit HW register to read from\n- * @loreg: low 32 bit HW register to read from\n+ * @reg: offset of 64 bit HW register to read from\n * @prev_stat_loaded: bool to specify if previous stats are loaded\n * @prev_stat: ptr to previous loaded stat value\n * @cur_stat: ptr to current stat value\n */\n void\n-ice_stat_update40(struct ice_hw *hw, u32 hireg, u32 loreg,\n-\t\t bool prev_stat_loaded, u64 *prev_stat, u64 *cur_stat)\n+ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,\n+\t\t u64 *prev_stat, u64 *cur_stat)\n {\n-\tu64 new_data;\n-\n-\tnew_data = rd32(hw, loreg);\n-\tnew_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;\n+\tu64 new_data = rd64(hw, reg) & (BIT_ULL(40) - 1);\n \n \t/* device stats are not reset at PFR, they likely will not be zeroed\n-\t * when the driver starts. So save the first values read and use them as\n-\t * offsets to be subtracted from the raw values in order to report stats\n-\t * that count from zero.\n+\t * when the driver starts. Thus, save the value from the first read\n+\t * without adding to the statistic value so that we report stats which\n+\t * count up from zero.\n \t */\n-\tif (!prev_stat_loaded)\n+\tif (!prev_stat_loaded) {\n \t\t*prev_stat = new_data;\n+\t\treturn;\n+\t}\n+\n+\t/* Calculate the difference between the new and old values, and then\n+\t * add it to the software stat value.\n+\t */\n \tif (new_data >= *prev_stat)\n-\t\t*cur_stat = new_data - *prev_stat;\n+\t\t*cur_stat += new_data - *prev_stat;\n \telse\n \t\t/* to manage the potential roll-over */\n-\t\t*cur_stat = (new_data + BIT_ULL(40)) - *prev_stat;\n-\t*cur_stat &= 0xFFFFFFFFFFULL;\n+\t\t*cur_stat += (new_data + BIT_ULL(40)) - *prev_stat;\n+\n+\t/* Update the previously stored value to prepare for next read */\n+\t*prev_stat = new_data;\n }\n \n /**\n * ice_stat_update32 - read 32 bit stat from the chip and update stat values\n * @hw: ptr to the hardware info\n- * @reg: HW register to read from\n+ * @reg: offset of HW register to read from\n * @prev_stat_loaded: bool to specify if previous stats are loaded\n * @prev_stat: ptr to previous loaded stat value\n * @cur_stat: ptr to current stat value\n@@ -3287,17 +3291,26 @@ ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,\n \tnew_data = rd32(hw, reg);\n \n \t/* device stats are not reset at PFR, they likely will not be zeroed\n-\t * when the driver starts. So save the first values read and use them as\n-\t * offsets to be subtracted from the raw values in order to report stats\n-\t * that count from zero.\n+\t * when the driver starts. Thus, save the value from the first read\n+\t * without adding to the statistic value so that we report stats which\n+\t * count up from zero.\n \t */\n-\tif (!prev_stat_loaded)\n+\tif (!prev_stat_loaded) {\n \t\t*prev_stat = new_data;\n+\t\treturn;\n+\t}\n+\n+\t/* Calculate the difference between the new and old values, and then\n+\t * add it to the software stat value.\n+\t */\n \tif (new_data >= *prev_stat)\n-\t\t*cur_stat = new_data - *prev_stat;\n+\t\t*cur_stat += new_data - *prev_stat;\n \telse\n \t\t/* to manage the potential roll-over */\n-\t\t*cur_stat = (new_data + BIT_ULL(32)) - *prev_stat;\n+\t\t*cur_stat += (new_data + BIT_ULL(32)) - *prev_stat;\n+\n+\t/* Update the previously stored value to prepare for next read */\n+\t*prev_stat = new_data;\n }\n \n /**\ndiff --git a/drivers/net/ethernet/intel/ice/ice_common.h b/drivers/net/ethernet/intel/ice/ice_common.h\nindex d1f8353fe6bb..68218e63afc2 100644\n--- a/drivers/net/ethernet/intel/ice/ice_common.h\n+++ b/drivers/net/ethernet/intel/ice/ice_common.h\n@@ -123,8 +123,8 @@ enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle);\n void ice_replay_post(struct ice_hw *hw);\n void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf);\n void\n-ice_stat_update40(struct ice_hw *hw, u32 hireg, u32 loreg,\n-\t\t bool prev_stat_loaded, u64 *prev_stat, u64 *cur_stat);\n+ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,\n+\t\t u64 *prev_stat, u64 *cur_stat);\n void\n ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,\n \t\t u64 *prev_stat, u64 *cur_stat);\ndiff --git a/drivers/net/ethernet/intel/ice/ice_hw_autogen.h b/drivers/net/ethernet/intel/ice/ice_hw_autogen.h\nindex 6c5ce05742b1..3250dfc00002 100644\n--- a/drivers/net/ethernet/intel/ice/ice_hw_autogen.h\n+++ b/drivers/net/ethernet/intel/ice/ice_hw_autogen.h\n@@ -281,14 +281,10 @@\n #define GL_PWR_MODE_CTL\t\t\t\t0x000B820C\n #define GL_PWR_MODE_CTL_CAR_MAX_BW_S\t\t30\n #define GL_PWR_MODE_CTL_CAR_MAX_BW_M\t\tICE_M(0x3, 30)\n-#define GLPRT_BPRCH(_i)\t\t\t\t(0x00381384 + ((_i) * 8))\n #define GLPRT_BPRCL(_i)\t\t\t\t(0x00381380 + ((_i) * 8))\n-#define GLPRT_BPTCH(_i)\t\t\t\t(0x00381244 + ((_i) * 8))\n #define GLPRT_BPTCL(_i)\t\t\t\t(0x00381240 + ((_i) * 8))\n #define GLPRT_CRCERRS(_i)\t\t\t(0x00380100 + ((_i) * 8))\n-#define GLPRT_GORCH(_i)\t\t\t\t(0x00380004 + ((_i) * 8))\n #define GLPRT_GORCL(_i)\t\t\t\t(0x00380000 + ((_i) * 8))\n-#define GLPRT_GOTCH(_i)\t\t\t\t(0x00380B44 + ((_i) * 8))\n #define GLPRT_GOTCL(_i)\t\t\t\t(0x00380B40 + ((_i) * 8))\n #define GLPRT_ILLERRC(_i)\t\t\t(0x003801C0 + ((_i) * 8))\n #define GLPRT_LXOFFRXC(_i)\t\t\t(0x003802C0 + ((_i) * 8))\n@@ -296,38 +292,22 @@\n #define GLPRT_LXONRXC(_i)\t\t\t(0x00380280 + ((_i) * 8))\n #define GLPRT_LXONTXC(_i)\t\t\t(0x00381140 + ((_i) * 8))\n #define GLPRT_MLFC(_i)\t\t\t\t(0x00380040 + ((_i) * 8))\n-#define GLPRT_MPRCH(_i)\t\t\t\t(0x00381344 + ((_i) * 8))\n #define GLPRT_MPRCL(_i)\t\t\t\t(0x00381340 + ((_i) * 8))\n-#define GLPRT_MPTCH(_i)\t\t\t\t(0x00381204 + ((_i) * 8))\n #define GLPRT_MPTCL(_i)\t\t\t\t(0x00381200 + ((_i) * 8))\n #define GLPRT_MRFC(_i)\t\t\t\t(0x00380080 + ((_i) * 8))\n-#define GLPRT_PRC1023H(_i)\t\t\t(0x00380A04 + ((_i) * 8))\n #define GLPRT_PRC1023L(_i)\t\t\t(0x00380A00 + ((_i) * 8))\n-#define GLPRT_PRC127H(_i)\t\t\t(0x00380944 + ((_i) * 8))\n #define GLPRT_PRC127L(_i)\t\t\t(0x00380940 + ((_i) * 8))\n-#define GLPRT_PRC1522H(_i)\t\t\t(0x00380A44 + ((_i) * 8))\n #define GLPRT_PRC1522L(_i)\t\t\t(0x00380A40 + ((_i) * 8))\n-#define GLPRT_PRC255H(_i)\t\t\t(0x00380984 + ((_i) * 8))\n #define GLPRT_PRC255L(_i)\t\t\t(0x00380980 + ((_i) * 8))\n-#define GLPRT_PRC511H(_i)\t\t\t(0x003809C4 + ((_i) * 8))\n #define GLPRT_PRC511L(_i)\t\t\t(0x003809C0 + ((_i) * 8))\n-#define GLPRT_PRC64H(_i)\t\t\t(0x00380904 + ((_i) * 8))\n #define GLPRT_PRC64L(_i)\t\t\t(0x00380900 + ((_i) * 8))\n-#define GLPRT_PRC9522H(_i)\t\t\t(0x00380A84 + ((_i) * 8))\n #define GLPRT_PRC9522L(_i)\t\t\t(0x00380A80 + ((_i) * 8))\n-#define GLPRT_PTC1023H(_i)\t\t\t(0x00380C84 + ((_i) * 8))\n #define GLPRT_PTC1023L(_i)\t\t\t(0x00380C80 + ((_i) * 8))\n-#define GLPRT_PTC127H(_i)\t\t\t(0x00380BC4 + ((_i) * 8))\n #define GLPRT_PTC127L(_i)\t\t\t(0x00380BC0 + ((_i) * 8))\n-#define GLPRT_PTC1522H(_i)\t\t\t(0x00380CC4 + ((_i) * 8))\n #define GLPRT_PTC1522L(_i)\t\t\t(0x00380CC0 + ((_i) * 8))\n-#define GLPRT_PTC255H(_i)\t\t\t(0x00380C04 + ((_i) * 8))\n #define GLPRT_PTC255L(_i)\t\t\t(0x00380C00 + ((_i) * 8))\n-#define GLPRT_PTC511H(_i)\t\t\t(0x00380C44 + ((_i) * 8))\n #define GLPRT_PTC511L(_i)\t\t\t(0x00380C40 + ((_i) * 8))\n-#define GLPRT_PTC64H(_i)\t\t\t(0x00380B84 + ((_i) * 8))\n #define GLPRT_PTC64L(_i)\t\t\t(0x00380B80 + ((_i) * 8))\n-#define GLPRT_PTC9522H(_i)\t\t\t(0x00380D04 + ((_i) * 8))\n #define GLPRT_PTC9522L(_i)\t\t\t(0x00380D00 + ((_i) * 8))\n #define GLPRT_PXOFFRXC(_i, _j)\t\t\t(0x00380500 + ((_i) * 8 + (_j) * 64))\n #define GLPRT_PXOFFTXC(_i, _j)\t\t\t(0x00380F40 + ((_i) * 8 + (_j) * 64))\n@@ -340,27 +320,17 @@\n #define GLPRT_RUC(_i)\t\t\t\t(0x00380200 + ((_i) * 8))\n #define GLPRT_RXON2OFFCNT(_i, _j)\t\t(0x00380700 + ((_i) * 8 + (_j) * 64))\n #define GLPRT_TDOLD(_i)\t\t\t\t(0x00381280 + ((_i) * 8))\n-#define GLPRT_UPRCH(_i)\t\t\t\t(0x00381304 + ((_i) * 8))\n #define GLPRT_UPRCL(_i)\t\t\t\t(0x00381300 + ((_i) * 8))\n-#define GLPRT_UPTCH(_i)\t\t\t\t(0x003811C4 + ((_i) * 8))\n #define GLPRT_UPTCL(_i)\t\t\t\t(0x003811C0 + ((_i) * 8))\n-#define GLV_BPRCH(_i)\t\t\t\t(0x003B6004 + ((_i) * 8))\n #define GLV_BPRCL(_i)\t\t\t\t(0x003B6000 + ((_i) * 8))\n-#define GLV_BPTCH(_i)\t\t\t\t(0x0030E004 + ((_i) * 8))\n #define GLV_BPTCL(_i)\t\t\t\t(0x0030E000 + ((_i) * 8))\n-#define GLV_GORCH(_i)\t\t\t\t(0x003B0004 + ((_i) * 8))\n #define GLV_GORCL(_i)\t\t\t\t(0x003B0000 + ((_i) * 8))\n-#define GLV_GOTCH(_i)\t\t\t\t(0x00300004 + ((_i) * 8))\n #define GLV_GOTCL(_i)\t\t\t\t(0x00300000 + ((_i) * 8))\n-#define GLV_MPRCH(_i)\t\t\t\t(0x003B4004 + ((_i) * 8))\n #define GLV_MPRCL(_i)\t\t\t\t(0x003B4000 + ((_i) * 8))\n-#define GLV_MPTCH(_i)\t\t\t\t(0x0030C004 + ((_i) * 8))\n #define GLV_MPTCL(_i)\t\t\t\t(0x0030C000 + ((_i) * 8))\n #define GLV_RDPC(_i)\t\t\t\t(0x00294C04 + ((_i) * 4))\n #define GLV_TEPC(_VSI)\t\t\t\t(0x00312000 + ((_VSI) * 4))\n-#define GLV_UPRCH(_i)\t\t\t\t(0x003B2004 + ((_i) * 8))\n #define GLV_UPRCL(_i)\t\t\t\t(0x003B2000 + ((_i) * 8))\n-#define GLV_UPTCH(_i)\t\t\t\t(0x0030A004 + ((_i) * 8))\n #define GLV_UPTCL(_i)\t\t\t\t(0x0030A000 + ((_i) * 8))\n #define PF_VT_PFALLOC_HIF\t\t\t0x0009DD80\n #define VSIQF_HKEY_MAX_INDEX\t\t\t12\ndiff --git a/drivers/net/ethernet/intel/ice/ice_lib.c b/drivers/net/ethernet/intel/ice/ice_lib.c\nindex cb998b97cde6..7311ce9c2f16 100644\n--- a/drivers/net/ethernet/intel/ice/ice_lib.c\n+++ b/drivers/net/ethernet/intel/ice/ice_lib.c\n@@ -1532,40 +1532,32 @@ void ice_update_eth_stats(struct ice_vsi *vsi)\n \tprev_es = &vsi->eth_stats_prev;\n \tcur_es = &vsi->eth_stats;\n \n-\tice_stat_update40(hw, GLV_GORCH(vsi_num), GLV_GORCL(vsi_num),\n-\t\t\t vsi->stat_offsets_loaded, &prev_es->rx_bytes,\n-\t\t\t &cur_es->rx_bytes);\n+\tice_stat_update40(hw, GLV_GORCL(vsi_num), vsi->stat_offsets_loaded,\n+\t\t\t &prev_es->rx_bytes, &cur_es->rx_bytes);\n \n-\tice_stat_update40(hw, GLV_UPRCH(vsi_num), GLV_UPRCL(vsi_num),\n-\t\t\t vsi->stat_offsets_loaded, &prev_es->rx_unicast,\n-\t\t\t &cur_es->rx_unicast);\n+\tice_stat_update40(hw, GLV_UPRCL(vsi_num), vsi->stat_offsets_loaded,\n+\t\t\t &prev_es->rx_unicast, &cur_es->rx_unicast);\n \n-\tice_stat_update40(hw, GLV_MPRCH(vsi_num), GLV_MPRCL(vsi_num),\n-\t\t\t vsi->stat_offsets_loaded, &prev_es->rx_multicast,\n-\t\t\t &cur_es->rx_multicast);\n+\tice_stat_update40(hw, GLV_MPRCL(vsi_num), vsi->stat_offsets_loaded,\n+\t\t\t &prev_es->rx_multicast, &cur_es->rx_multicast);\n \n-\tice_stat_update40(hw, GLV_BPRCH(vsi_num), GLV_BPRCL(vsi_num),\n-\t\t\t vsi->stat_offsets_loaded, &prev_es->rx_broadcast,\n-\t\t\t &cur_es->rx_broadcast);\n+\tice_stat_update40(hw, GLV_BPRCL(vsi_num), vsi->stat_offsets_loaded,\n+\t\t\t &prev_es->rx_broadcast, &cur_es->rx_broadcast);\n \n \tice_stat_update32(hw, GLV_RDPC(vsi_num), vsi->stat_offsets_loaded,\n \t\t\t &prev_es->rx_discards, &cur_es->rx_discards);\n \n-\tice_stat_update40(hw, GLV_GOTCH(vsi_num), GLV_GOTCL(vsi_num),\n-\t\t\t vsi->stat_offsets_loaded, &prev_es->tx_bytes,\n-\t\t\t &cur_es->tx_bytes);\n+\tice_stat_update40(hw, GLV_GOTCL(vsi_num), vsi->stat_offsets_loaded,\n+\t\t\t &prev_es->tx_bytes, &cur_es->tx_bytes);\n \n-\tice_stat_update40(hw, GLV_UPTCH(vsi_num), GLV_UPTCL(vsi_num),\n-\t\t\t vsi->stat_offsets_loaded, &prev_es->tx_unicast,\n-\t\t\t &cur_es->tx_unicast);\n+\tice_stat_update40(hw, GLV_UPTCL(vsi_num), vsi->stat_offsets_loaded,\n+\t\t\t &prev_es->tx_unicast, &cur_es->tx_unicast);\n \n-\tice_stat_update40(hw, GLV_MPTCH(vsi_num), GLV_MPTCL(vsi_num),\n-\t\t\t vsi->stat_offsets_loaded, &prev_es->tx_multicast,\n-\t\t\t &cur_es->tx_multicast);\n+\tice_stat_update40(hw, GLV_MPTCL(vsi_num), vsi->stat_offsets_loaded,\n+\t\t\t &prev_es->tx_multicast, &cur_es->tx_multicast);\n \n-\tice_stat_update40(hw, GLV_BPTCH(vsi_num), GLV_BPTCL(vsi_num),\n-\t\t\t vsi->stat_offsets_loaded, &prev_es->tx_broadcast,\n-\t\t\t &cur_es->tx_broadcast);\n+\tice_stat_update40(hw, GLV_BPTCL(vsi_num), vsi->stat_offsets_loaded,\n+\t\t\t &prev_es->tx_broadcast, &cur_es->tx_broadcast);\n \n \tice_stat_update32(hw, GLV_TEPC(vsi_num), vsi->stat_offsets_loaded,\n \t\t\t &prev_es->tx_errors, &cur_es->tx_errors);\ndiff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c\nindex 5f45548f2940..40df672befe4 100644\n--- a/drivers/net/ethernet/intel/ice/ice_main.c\n+++ b/drivers/net/ethernet/intel/ice/ice_main.c\n@@ -3488,96 +3488,82 @@ static void ice_update_pf_stats(struct ice_pf *pf)\n \tcur_ps = &pf->stats;\n \tpf_id = hw->pf_id;\n \n-\tice_stat_update40(hw, GLPRT_GORCH(pf_id), GLPRT_GORCL(pf_id),\n-\t\t\t pf->stat_prev_loaded, &prev_ps->eth.rx_bytes,\n+\tice_stat_update40(hw, GLPRT_GORCL(pf_id), pf->stat_prev_loaded,\n+\t\t\t &prev_ps->eth.rx_bytes,\n \t\t\t &cur_ps->eth.rx_bytes);\n \n-\tice_stat_update40(hw, GLPRT_UPRCH(pf_id), GLPRT_UPRCL(pf_id),\n-\t\t\t pf->stat_prev_loaded, &prev_ps->eth.rx_unicast,\n+\tice_stat_update40(hw, GLPRT_UPRCL(pf_id), pf->stat_prev_loaded,\n+\t\t\t &prev_ps->eth.rx_unicast,\n \t\t\t &cur_ps->eth.rx_unicast);\n \n-\tice_stat_update40(hw, GLPRT_MPRCH(pf_id), GLPRT_MPRCL(pf_id),\n-\t\t\t pf->stat_prev_loaded, &prev_ps->eth.rx_multicast,\n+\tice_stat_update40(hw, GLPRT_MPRCL(pf_id), pf->stat_prev_loaded,\n+\t\t\t &prev_ps->eth.rx_multicast,\n \t\t\t &cur_ps->eth.rx_multicast);\n \n-\tice_stat_update40(hw, GLPRT_BPRCH(pf_id), GLPRT_BPRCL(pf_id),\n-\t\t\t pf->stat_prev_loaded, &prev_ps->eth.rx_broadcast,\n+\tice_stat_update40(hw, GLPRT_BPRCL(pf_id), pf->stat_prev_loaded,\n+\t\t\t &prev_ps->eth.rx_broadcast,\n \t\t\t &cur_ps->eth.rx_broadcast);\n \n-\tice_stat_update40(hw, GLPRT_GOTCH(pf_id), GLPRT_GOTCL(pf_id),\n-\t\t\t pf->stat_prev_loaded, &prev_ps->eth.tx_bytes,\n+\tice_stat_update40(hw, GLPRT_GOTCL(pf_id), pf->stat_prev_loaded,\n+\t\t\t &prev_ps->eth.tx_bytes,\n \t\t\t &cur_ps->eth.tx_bytes);\n \n-\tice_stat_update40(hw, GLPRT_UPTCH(pf_id), GLPRT_UPTCL(pf_id),\n-\t\t\t pf->stat_prev_loaded, &prev_ps->eth.tx_unicast,\n+\tice_stat_update40(hw, GLPRT_UPTCL(pf_id), pf->stat_prev_loaded,\n+\t\t\t &prev_ps->eth.tx_unicast,\n \t\t\t &cur_ps->eth.tx_unicast);\n \n-\tice_stat_update40(hw, GLPRT_MPTCH(pf_id), GLPRT_MPTCL(pf_id),\n-\t\t\t pf->stat_prev_loaded, &prev_ps->eth.tx_multicast,\n+\tice_stat_update40(hw, GLPRT_MPTCL(pf_id), pf->stat_prev_loaded,\n+\t\t\t &prev_ps->eth.tx_multicast,\n \t\t\t &cur_ps->eth.tx_multicast);\n \n-\tice_stat_update40(hw, GLPRT_BPTCH(pf_id), GLPRT_BPTCL(pf_id),\n-\t\t\t pf->stat_prev_loaded, &prev_ps->eth.tx_broadcast,\n+\tice_stat_update40(hw, GLPRT_BPTCL(pf_id), pf->stat_prev_loaded,\n+\t\t\t &prev_ps->eth.tx_broadcast,\n \t\t\t &cur_ps->eth.tx_broadcast);\n \n \tice_stat_update32(hw, GLPRT_TDOLD(pf_id), pf->stat_prev_loaded,\n \t\t\t &prev_ps->tx_dropped_link_down,\n \t\t\t &cur_ps->tx_dropped_link_down);\n \n-\tice_stat_update40(hw, GLPRT_PRC64H(pf_id), GLPRT_PRC64L(pf_id),\n-\t\t\t pf->stat_prev_loaded, &prev_ps->rx_size_64,\n-\t\t\t &cur_ps->rx_size_64);\n+\tice_stat_update40(hw, GLPRT_PRC64L(pf_id), pf->stat_prev_loaded,\n+\t\t\t &prev_ps->rx_size_64, &cur_ps->rx_size_64);\n \n-\tice_stat_update40(hw, GLPRT_PRC127H(pf_id), GLPRT_PRC127L(pf_id),\n-\t\t\t pf->stat_prev_loaded, &prev_ps->rx_size_127,\n-\t\t\t &cur_ps->rx_size_127);\n+\tice_stat_update40(hw, GLPRT_PRC127L(pf_id), pf->stat_prev_loaded,\n+\t\t\t &prev_ps->rx_size_127, &cur_ps->rx_size_127);\n \n-\tice_stat_update40(hw, GLPRT_PRC255H(pf_id), GLPRT_PRC255L(pf_id),\n-\t\t\t pf->stat_prev_loaded, &prev_ps->rx_size_255,\n-\t\t\t &cur_ps->rx_size_255);\n+\tice_stat_update40(hw, GLPRT_PRC255L(pf_id), pf->stat_prev_loaded,\n+\t\t\t &prev_ps->rx_size_255, &cur_ps->rx_size_255);\n \n-\tice_stat_update40(hw, GLPRT_PRC511H(pf_id), GLPRT_PRC511L(pf_id),\n-\t\t\t pf->stat_prev_loaded, &prev_ps->rx_size_511,\n-\t\t\t &cur_ps->rx_size_511);\n+\tice_stat_update40(hw, GLPRT_PRC511L(pf_id), pf->stat_prev_loaded,\n+\t\t\t &prev_ps->rx_size_511, &cur_ps->rx_size_511);\n \n-\tice_stat_update40(hw, GLPRT_PRC1023H(pf_id),\n-\t\t\t GLPRT_PRC1023L(pf_id), pf->stat_prev_loaded,\n+\tice_stat_update40(hw, GLPRT_PRC1023L(pf_id), pf->stat_prev_loaded,\n \t\t\t &prev_ps->rx_size_1023, &cur_ps->rx_size_1023);\n \n-\tice_stat_update40(hw, GLPRT_PRC1522H(pf_id),\n-\t\t\t GLPRT_PRC1522L(pf_id), pf->stat_prev_loaded,\n+\tice_stat_update40(hw, GLPRT_PRC1522L(pf_id), pf->stat_prev_loaded,\n \t\t\t &prev_ps->rx_size_1522, &cur_ps->rx_size_1522);\n \n-\tice_stat_update40(hw, GLPRT_PRC9522H(pf_id),\n-\t\t\t GLPRT_PRC9522L(pf_id), pf->stat_prev_loaded,\n+\tice_stat_update40(hw, GLPRT_PRC9522L(pf_id), pf->stat_prev_loaded,\n \t\t\t &prev_ps->rx_size_big, &cur_ps->rx_size_big);\n \n-\tice_stat_update40(hw, GLPRT_PTC64H(pf_id), GLPRT_PTC64L(pf_id),\n-\t\t\t pf->stat_prev_loaded, &prev_ps->tx_size_64,\n-\t\t\t &cur_ps->tx_size_64);\n+\tice_stat_update40(hw, GLPRT_PTC64L(pf_id), pf->stat_prev_loaded,\n+\t\t\t &prev_ps->tx_size_64, &cur_ps->tx_size_64);\n \n-\tice_stat_update40(hw, GLPRT_PTC127H(pf_id), GLPRT_PTC127L(pf_id),\n-\t\t\t pf->stat_prev_loaded, &prev_ps->tx_size_127,\n-\t\t\t &cur_ps->tx_size_127);\n+\tice_stat_update40(hw, GLPRT_PTC127L(pf_id), pf->stat_prev_loaded,\n+\t\t\t &prev_ps->tx_size_127, &cur_ps->tx_size_127);\n \n-\tice_stat_update40(hw, GLPRT_PTC255H(pf_id), GLPRT_PTC255L(pf_id),\n-\t\t\t pf->stat_prev_loaded, &prev_ps->tx_size_255,\n-\t\t\t &cur_ps->tx_size_255);\n+\tice_stat_update40(hw, GLPRT_PTC255L(pf_id), pf->stat_prev_loaded,\n+\t\t\t &prev_ps->tx_size_255, &cur_ps->tx_size_255);\n \n-\tice_stat_update40(hw, GLPRT_PTC511H(pf_id), GLPRT_PTC511L(pf_id),\n-\t\t\t pf->stat_prev_loaded, &prev_ps->tx_size_511,\n-\t\t\t &cur_ps->tx_size_511);\n+\tice_stat_update40(hw, GLPRT_PTC511L(pf_id), pf->stat_prev_loaded,\n+\t\t\t &prev_ps->tx_size_511, &cur_ps->tx_size_511);\n \n-\tice_stat_update40(hw, GLPRT_PTC1023H(pf_id),\n-\t\t\t GLPRT_PTC1023L(pf_id), pf->stat_prev_loaded,\n+\tice_stat_update40(hw, GLPRT_PTC1023L(pf_id), pf->stat_prev_loaded,\n \t\t\t &prev_ps->tx_size_1023, &cur_ps->tx_size_1023);\n \n-\tice_stat_update40(hw, GLPRT_PTC1522H(pf_id),\n-\t\t\t GLPRT_PTC1522L(pf_id), pf->stat_prev_loaded,\n+\tice_stat_update40(hw, GLPRT_PTC1522L(pf_id), pf->stat_prev_loaded,\n \t\t\t &prev_ps->tx_size_1522, &cur_ps->tx_size_1522);\n \n-\tice_stat_update40(hw, GLPRT_PTC9522H(pf_id),\n-\t\t\t GLPRT_PTC9522L(pf_id), pf->stat_prev_loaded,\n+\tice_stat_update40(hw, GLPRT_PTC9522L(pf_id), pf->stat_prev_loaded,\n \t\t\t &prev_ps->tx_size_big, &cur_ps->tx_size_big);\n \n \tice_stat_update32(hw, GLPRT_LXONRXC(pf_id), pf->stat_prev_loaded,\n", "prefixes": [ "S22", "02/16" ] }