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GET /api/patches/1117705/?format=api
{ "id": 1117705, "url": "http://patchwork.ozlabs.org/api/patches/1117705/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/1560843991-24123-4-git-send-email-skomatineni@nvidia.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1560843991-24123-4-git-send-email-skomatineni@nvidia.com>", "list_archive_url": null, "date": "2019-06-18T07:46:17", "name": "[V3,03/17] gpio: tegra: use resume_noirq for tegra gpio resume", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "15d6be0f4d70a426d867d0a4b364961c6d338691", "submitter": { "id": 75554, "url": "http://patchwork.ozlabs.org/api/people/75554/?format=api", "name": "Sowjanya Komatineni", "email": "skomatineni@nvidia.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/1560843991-24123-4-git-send-email-skomatineni@nvidia.com/mbox/", "series": [ { "id": 114436, "url": "http://patchwork.ozlabs.org/api/series/114436/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=114436", "date": "2019-06-18T07:46:16", "name": "SC7 entry and exit support for Tegra210", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/114436/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1117705/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1117705/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<linux-gpio-owner@vger.kernel.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=pass (p=none dis=none) header.from=nvidia.com", "ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=nvidia.com header.i=@nvidia.com\n\theader.b=\"jGud0Hqr\"; dkim-atps=neutral" ], "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 45SgDd0T1xz9sBp\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 18 Jun 2019 17:48:17 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1728018AbfFRHsL (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tTue, 18 Jun 2019 03:48:11 -0400", "from hqemgate14.nvidia.com ([216.228.121.143]:9689 \"EHLO\n\thqemgate14.nvidia.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1725870AbfFRHqp (ORCPT\n\t<rfc822; linux-gpio@vger.kernel.org>); Tue, 18 Jun 2019 03:46:45 -0400", "from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by\n\thqemgate14.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA)\n\tid <B5d0896e30000>; Tue, 18 Jun 2019 00:46:43 -0700", "from hqmail.nvidia.com ([172.20.161.6])\n\tby hqpgpgate102.nvidia.com (PGP Universal service);\n\tTue, 18 Jun 2019 00:46:43 -0700", "from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL108.nvidia.com\n\t(172.18.146.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3;\n\tTue, 18 Jun 2019 07:46:42 +0000", "from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL107.nvidia.com\n\t(172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via\n\tFrontend Transport; Tue, 18 Jun 2019 07:46:43 +0000", "from skomatineni-linux.nvidia.com (Not Verified[10.2.168.217]) by\n\thqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121)\n\tid <B5d0896e00007>; Tue, 18 Jun 2019 00:46:43 -0700" ], "X-PGP-Universal": "processed;\n\tby hqpgpgate102.nvidia.com on Tue, 18 Jun 2019 00:46:43 -0700", "From": "Sowjanya Komatineni <skomatineni@nvidia.com>", "To": "<thierry.reding@gmail.com>, <jonathanh@nvidia.com>,\n\t<tglx@linutronix.de>, <jason@lakedaemon.net>,\n\t<marc.zyngier@arm.com>, <linus.walleij@linaro.org>,\n\t<stefan@agner.ch>, <mark.rutland@arm.com>", "CC": "<pdeschrijver@nvidia.com>, <pgaikwad@nvidia.com>,\n\t<sboyd@kernel.org>, <linux-clk@vger.kernel.org>,\n\t<linux-gpio@vger.kernel.org>, <jckuo@nvidia.com>,\n\t<josephl@nvidia.com>, <talho@nvidia.com>, <skomatineni@nvidia.com>,\n\t<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>,\n\t<mperttunen@nvidia.com>, <spatra@nvidia.com>, <robh+dt@kernel.org>,\n\t<digetx@gmail.com>, <devicetree@vger.kernel.org>", "Subject": "[PATCH V3 03/17] gpio: tegra: use resume_noirq for tegra gpio resume", "Date": "Tue, 18 Jun 2019 00:46:17 -0700", "Message-ID": "<1560843991-24123-4-git-send-email-skomatineni@nvidia.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1560843991-24123-1-git-send-email-skomatineni@nvidia.com>", "References": "<1560843991-24123-1-git-send-email-skomatineni@nvidia.com>", "X-NVConfidentiality": "public", "MIME-Version": "1.0", "Content-Type": "text/plain", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1;\n\tt=1560844003; bh=Pr7vcEZPGjVmliq8J2fR0U6t7tGM+0Ul14bqoyMQjC8=;\n\th=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer:\n\tIn-Reply-To:References:X-NVConfidentiality:MIME-Version:\n\tContent-Type;\n\tb=jGud0Hqrlsdyja3FOUV8qfAb9/4AjvqCEy+IDTOk/kPu0lNqbprnH2jFYsLQ4EC5M\n\tU2XSv8t087I75tzlOkfwctsi3NmUotvna3lIkYSONSLYoWWajX7GNafV4+ij8tpezF\n\tMw21p5uJU43qufboDfyCleg0SIxnndHAaIuEfzG3uxMZ4GngvKLsFr1gqyOoL5mfz/\n\tZIIlbj//xqDWBmrgy0f0kG3dkuJK60yGyVn/1wLQh0evQ4krDB4UBltD2YKosfW8x2\n\toIH+nwZG7THKehLdRSGrpseyWT9MvJKabRplQJimonT1jpJvL/nmvPIWAd6V0jI6iT\n\ttSRzL8xFaF20Q==", "Sender": "linux-gpio-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<linux-gpio.vger.kernel.org>", "X-Mailing-List": "linux-gpio@vger.kernel.org" }, "content": "During SC7 resume, PARKED bit clear from the pinmux registers may\ncause a glitch on the GPIO lines.\n\nSo, Tegra GPIOs restore should happen prior to restoring Tegra pinmux\nto keep the GPIO lines in a known good state prior to clearing PARKED\nbit.\n\nThis patch has fix for this by moving Tegra GPIO restore to happen\nduring resume_noirq.\n\nSigned-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>\n---\n drivers/gpio/gpio-tegra.c | 17 +++++++++++------\n 1 file changed, 11 insertions(+), 6 deletions(-)", "diff": "diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c\nindex f57bfc07ae22..f3c58c597ab9 100644\n--- a/drivers/gpio/gpio-tegra.c\n+++ b/drivers/gpio/gpio-tegra.c\n@@ -410,7 +410,7 @@ static void tegra_gpio_irq_handler(struct irq_desc *desc)\n }\n \n #ifdef CONFIG_PM_SLEEP\n-static int tegra_gpio_resume(struct device *dev)\n+static int tegra_gpio_resume_noirq(struct device *dev)\n {\n \tstruct tegra_gpio_info *tgi = dev_get_drvdata(dev);\n \tunsigned long flags;\n@@ -506,6 +506,15 @@ static int tegra_gpio_irq_set_wake(struct irq_data *d, unsigned int enable)\n \n \treturn irq_set_irq_wake(bank->irq, enable);\n }\n+\n+static const struct dev_pm_ops tegra_gpio_pm_ops = {\n+\t.suspend = &tegra_gpio_suspend,\n+\t.resume_noirq = &tegra_gpio_resume_noirq\n+};\n+\n+#define TEGRA_GPIO_PM\t(&tegra_gpio_pm_ops)\n+#else\n+#define TEGRA_GPIO_PM\tNULL\n #endif\n \n #ifdef\tCONFIG_DEBUG_FS\n@@ -553,10 +562,6 @@ static inline void tegra_gpio_debuginit(struct tegra_gpio_info *tgi)\n \n #endif\n \n-static const struct dev_pm_ops tegra_gpio_pm_ops = {\n-\tSET_SYSTEM_SLEEP_PM_OPS(tegra_gpio_suspend, tegra_gpio_resume)\n-};\n-\n static int tegra_gpio_probe(struct platform_device *pdev)\n {\n \tstruct tegra_gpio_info *tgi;\n@@ -706,7 +711,7 @@ static const struct of_device_id tegra_gpio_of_match[] = {\n static struct platform_driver tegra_gpio_driver = {\n \t.driver\t\t= {\n \t\t.name\t= \"tegra-gpio\",\n-\t\t.pm\t= &tegra_gpio_pm_ops,\n+\t\t.pm\t= TEGRA_GPIO_PM,\n \t\t.of_match_table = tegra_gpio_of_match,\n \t},\n \t.probe\t\t= tegra_gpio_probe,\n", "prefixes": [ "V3", "03/17" ] }