Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/1104081/?format=api
{ "id": 1104081, "url": "http://patchwork.ozlabs.org/api/patches/1104081/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20190523122327.37264-6-Zhiqiang.Hou@nxp.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20190523122327.37264-6-Zhiqiang.Hou@nxp.com>", "list_archive_url": null, "date": "2019-05-23T12:22:18", "name": "[U-Boot,PATCHv2,5/8] t2080: dts: Added PCIe DT nodes", "commit_ref": null, "pull_url": null, "state": "awaiting-upstream", "archived": false, "hash": "a11bdb49f449f682393c084302fe7ea5ca014e77", "submitter": { "id": 67929, "url": "http://patchwork.ozlabs.org/api/people/67929/?format=api", "name": "Z.Q. Hou", "email": "zhiqiang.hou@nxp.com" }, "delegate": { "id": 2467, "url": "http://patchwork.ozlabs.org/api/users/2467/?format=api", "username": "prabhu_kush", "first_name": "Prabhakar", "last_name": "Kushwaha", "email": "prabhakar@freescale.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20190523122327.37264-6-Zhiqiang.Hou@nxp.com/mbox/", "series": [ { "id": 109483, "url": "http://patchwork.ozlabs.org/api/series/109483/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=109483", "date": "2019-05-23T12:21:57", "name": "dm: pci: add Freescale PowerPC PCIe driver", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/109483/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1104081/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1104081/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=nxp.com", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=nxp.com header.i=@nxp.com header.b=\"leuLo5g3\";\n\tdkim-atps=neutral", "spf=none (sender IP is )\n\tsmtp.mailfrom=zhiqiang.hou@nxp.com; " ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 458pb91W5Pz9s55\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 23 May 2019 22:24:21 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid C6E27C21EEF; Thu, 23 May 2019 12:23:54 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 14FE1C21EE5;\n\tThu, 23 May 2019 12:22:59 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 81829C21E90; Thu, 23 May 2019 12:22:23 +0000 (UTC)", "from EUR02-VE1-obe.outbound.protection.outlook.com\n\t(mail-eopbgr20041.outbound.protection.outlook.com [40.107.2.41])\n\tby lists.denx.de (Postfix) with ESMTPS id E616BC21EE5\n\tfor <u-boot@lists.denx.de>; Thu, 23 May 2019 12:22:19 +0000 (UTC)", "from AM6PR04MB5781.eurprd04.prod.outlook.com (20.179.3.19) by\n\tAM6PR04MB5701.eurprd04.prod.outlook.com (20.179.1.75) with Microsoft\n\tSMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n\t15.20.1922.16; Thu, 23 May 2019 12:22:19 +0000", "from AM6PR04MB5781.eurprd04.prod.outlook.com\n\t([fe80::6491:59e7:6b25:2993]) by\n\tAM6PR04MB5781.eurprd04.prod.outlook.com\n\t([fe80::6491:59e7:6b25:2993%7]) with mapi id 15.20.1922.013;\n\tThu, 23 May 2019 12:22:19 +0000" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=0.0 required=5.0 tests=SPF_HELO_PASS, T_DKIM_INVALID\n\tautolearn=unavailable autolearn_force=no version=3.4.0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n\tbh=WPwFHtnSEKcHuYxT9mVLjmr/cXr+aKGfUAaItuHZlwI=;\n\tb=leuLo5g3QSeNfxLA5Pd63QVI14Ne0oEeGXUWm3G9Zava7R5ncKLyby/J50Wdi4+8pyZpRBKWAot6d/+ohiLTGngl5LcmnaJoRsY12Hha2bxfb4AYWJNe7IzxY8QPNa53q6VqVqpE5LEl0A8lfMiOQkpvkrwPwCWA0uid1O8cZe0=", "From": "\"Z.q. Hou\" <zhiqiang.hou@nxp.com>", "To": "\"u-boot@lists.denx.de\" <u-boot@lists.denx.de>, Prabhakar Kushwaha\n\t<prabhakar.kushwaha@nxp.com>, \"wd@denx.de\" <wd@denx.de>, Shengzhou Liu\n\t<shengzhou.liu@nxp.com>, \"bmeng.cn@gmail.com\" <bmeng.cn@gmail.com>,\n\tJagdish\n\tGediya <jagdish.gediya@nxp.com>, \"sjg@chromium.org\" <sjg@chromium.org>,\n\t\"ley.foon.tan@intel.com\" <ley.foon.tan@intel.com>,\n\t\"sr@denx.de\" <sr@denx.de>", "Thread-Topic": "[PATCHv2 5/8] t2080: dts: Added PCIe DT nodes", "Thread-Index": "AQHVEWIqHGfUdu+rgkO9hQwJd4TUng==", "Date": "Thu, 23 May 2019 12:22:18 +0000", "Message-ID": "<20190523122327.37264-6-Zhiqiang.Hou@nxp.com>", "References": "<20190523122327.37264-1-Zhiqiang.Hou@nxp.com>", "In-Reply-To": "<20190523122327.37264-1-Zhiqiang.Hou@nxp.com>", "Accept-Language": "zh-CN, en-US", "Content-Language": "en-US", "X-MS-Has-Attach": "", "X-MS-TNEF-Correlator": "", "x-clientproxiedby": "HK2PR06CA0017.apcprd06.prod.outlook.com\n\t(2603:1096:202:2e::29) To AM6PR04MB5781.eurprd04.prod.outlook.com\n\t(2603:10a6:20b:ad::19)", "authentication-results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=nxp.com", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=nxp.com header.i=@nxp.com header.b=\"leuLo5g3\";\n\tdkim-atps=neutral", "spf=none (sender IP is )\n\tsmtp.mailfrom=zhiqiang.hou@nxp.com; " ], "x-ms-exchange-messagesentrepresentingtype": "1", "x-mailer": "git-send-email 2.17.1", "x-originating-ip": "[119.31.174.73]", "x-ms-publictraffictype": "Email", "x-ms-office365-filtering-correlation-id": "30c82c32-e050-4065-9683-08d6df794c6e", "x-ms-office365-filtering-ht": "Tenant", "x-microsoft-antispam": "BCL:0; PCL:0;\n\tRULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600141)(711020)(4605104)(4618075)(2017052603328)(7193020);\n\tSRVR:AM6PR04MB5701; ", "x-ms-traffictypediagnostic": "AM6PR04MB5701:", "x-microsoft-antispam-prvs": "<AM6PR04MB57015A4B3AD817A219A4D9E484010@AM6PR04MB5701.eurprd04.prod.outlook.com>", "x-ms-oob-tlc-oobclassifiers": "OLM:4125;", "x-forefront-prvs": "00462943DE", "x-forefront-antispam-report": "SFV:NSPM;\n\tSFS:(10009020)(39860400002)(396003)(346002)(376002)(366004)(136003)(199004)(189003)(256004)(478600001)(486006)(305945005)(446003)(66446008)(66556008)(64756008)(66476007)(1076003)(66946007)(73956011)(6506007)(386003)(36756003)(14454004)(476003)(2616005)(11346002)(7736002)(52116002)(76176011)(186003)(68736007)(102836004)(5660300002)(71200400001)(71190400001)(316002)(6512007)(6486002)(6436002)(26005)(2501003)(3846002)(6116002)(53936002)(110136005)(25786009)(2201001)(54906003)(66066001)(99286004)(8676002)(8936002)(50226002)(81156014)(81166006)(2906002)(86362001)(4326008);\n\tDIR:OUT; SFP:1101; SCL:1; SRVR:AM6PR04MB5701;\n\tH:AM6PR04MB5781.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en;\n\tPTR:InfoNoRecords; A:1; MX:1; ", "received-spf": "None (protection.outlook.com: nxp.com does not designate\n\tpermitted sender hosts)", "x-ms-exchange-senderadcheck": "1", "x-microsoft-antispam-message-info": "PPtA8apzibmKR6Ucx0OZm8aJkhh4SytrLM8ezcglCetuyoKhpXBpM6X+hLhXw2cZND+GIsp1jeuFK4Zmg4U5FpDGQmDZYK91KsshzBC9AiR9Vc4mN1agBWAu9BhANQUkOeH1DlONHKI8ylvwefY7P2J54rYZ05tKRwZyxEHrhVO2vTe59ag0MythD0MKb/6M3yC4WCwfth3ceUL+lsAWfeOrHYEvUI6BitEhssrqNkVmS4O5txiKPCdqOMwaEmgcbLRkf+VDJeohtcPV91cXVsvZMQ0ntmOiNymBto+MA+ujJqrSqTsmNF7lavYYRR/04ycxv12LkIw/r2KU3IJl1kkl8tSd/O6uXKOJfQ0R6dNGOf04emFyZELvfQBimA/7sF+xU7/UqwhLXbvsrEHoqGatNWNVBW0HAuwcN2rYNW0=", "Content-ID": "<CE5331C7AF94DF49BEED7D58CD430E08@eurprd04.prod.outlook.com>", "MIME-Version": "1.0", "X-OriginatorOrg": "nxp.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "30c82c32-e050-4065-9683-08d6df794c6e", "X-MS-Exchange-CrossTenant-originalarrivaltime": "23 May 2019 12:22:18.8605\n\t(UTC)", "X-MS-Exchange-CrossTenant-fromentityheader": "Hosted", "X-MS-Exchange-CrossTenant-id": "686ea1d3-bc2b-4c6f-a92c-d99c5c301635", "X-MS-Exchange-CrossTenant-mailboxtype": "HOSTED", "X-MS-Exchange-CrossTenant-userprincipalname": "zhiqiang.hou@nxp.com", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "AM6PR04MB5701", "Cc": "\"Z.q. Hou\" <zhiqiang.hou@nxp.com>, Xiaowei Bao <xiaowei.bao@nxp.com>", "Subject": "[U-Boot] [PATCHv2 5/8] t2080: dts: Added PCIe DT nodes", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>\n\nT2080 integrated 4 PCIe controllers, which is compatible with\nthe PCI Express™ Base Specification, Revision 3.0, and this\npatch is to add DT node for each PCIe controller.\n\nSigned-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>\nReviewed-by: Simon Glass <sjg@chromium.org>\n---\nV2:\n - No change.\n\n arch/powerpc/dts/t2080.dtsi | 48 +++++++++++++++++++++++++++++++++++++\n 1 file changed, 48 insertions(+)", "diff": "diff --git a/arch/powerpc/dts/t2080.dtsi b/arch/powerpc/dts/t2080.dtsi\r\nindex db65ea5725..89b2c618ae 100644\r\n--- a/arch/powerpc/dts/t2080.dtsi\r\n+++ b/arch/powerpc/dts/t2080.dtsi\r\n@@ -59,4 +59,52 @@\r\n \t\t\tclock-frequency = <0x0>;\r\n \t\t};\r\n \t};\r\n+\r\n+\tpcie@ffe240000 {\r\n+\t\tcompatible = \"fsl,pcie-t2080\", \"fsl,pcie-fsl-qoriq\";\r\n+\t\treg = <0xf 0xfe240000 0x0 0x4000>; /* registers */\r\n+\t\tlaw_trgt_if = <0>;\r\n+\t\t#address-cells = <3>;\r\n+\t\t#size-cells = <2>;\r\n+\t\tdevice_type = \"pci\";\r\n+\t\tbus-range = <0x0 0xff>;\r\n+\t\tranges = <0x01000000 0x0 0x00000000 0xf 0xf8000000 0x0 0x00010000 /* downstream I/O */\r\n+\t\t\t 0x02000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000>; /* non-prefetchable memory */\r\n+\t};\r\n+\r\n+\tpcie@ffe250000 {\r\n+\t\tcompatible = \"fsl,pcie-t2080\", \"fsl,pcie-fsl-qoriq\";\r\n+\t\treg = <0xf 0xfe250000 0x0 0x1000>; /* registers */\r\n+\t\tlaw_trgt_if = <1>;\r\n+\t\t#address-cells = <3>;\r\n+\t\t#size-cells = <2>;\r\n+\t\tdevice_type = \"pci\";\r\n+\t\tbus-range = <0x0 0xff>;\r\n+\t\tranges = <0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000 /* downstream I/O */\r\n+\t\t\t 0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x10000000>; /* non-prefetchable memory */\r\n+\t};\r\n+\r\n+\tpcie@ffe260000 {\r\n+\t\tcompatible = \"fsl,pcie-t2080\", \"fsl,pcie-fsl-qoriq\";\r\n+\t\treg = <0xf 0xfe260000 0x0 0x1000>; /* registers */\r\n+\t\tlaw_trgt_if = <2>;\r\n+\t\t#address-cells = <3>;\r\n+\t\t#size-cells = <2>;\r\n+\t\tdevice_type = \"pci\";\r\n+\t\tbus-range = <0x0 0xff>;\r\n+\t\tranges = <0x01000000 0x0 0x00000000 0xf 0xf8020000 0x0 0x00010000 /* downstream I/O */\r\n+\t\t\t 0x02000000 0x0 0xe0000000 0xc 0x30000000 0x0 0x10000000>; /* non-prefetchable memory */\r\n+\t};\r\n+\r\n+\tpcie@ffe270000 {\r\n+\t\tcompatible = \"fsl,pcie-t2080\", \"fsl,pcie-fsl-qoriq\";\r\n+\t\treg = <0xf 0xfe270000 0x0 0x1000>; /* registers */\r\n+\t\tlaw_trgt_if = <3>;\r\n+\t\t#address-cells = <3>;\r\n+\t\t#size-cells = <2>;\r\n+\t\tdevice_type = \"pci\";\r\n+\t\tbus-range = <0x0 0xff>;\r\n+\t\tranges = <0x01000000 0x0 0x00000000 0xf 0xf8030000 0x0 0x00010000 /* downstream I/O */\r\n+\t\t\t 0x02000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x10000000>; /* non-prefetchable memory */\r\n+\t};\r\n };\r\n", "prefixes": [ "U-Boot", "PATCHv2", "5/8" ] }