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GET /api/patches/1104079/?format=api
HTTP 200 OK
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{
    "id": 1104079,
    "url": "http://patchwork.ozlabs.org/api/patches/1104079/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20190523122327.37264-2-Zhiqiang.Hou@nxp.com/",
    "project": {
        "id": 18,
        "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api",
        "name": "U-Boot",
        "link_name": "uboot",
        "list_id": "u-boot.lists.denx.de",
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        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20190523122327.37264-2-Zhiqiang.Hou@nxp.com>",
    "list_archive_url": null,
    "date": "2019-05-23T12:22:01",
    "name": "[U-Boot,PATCHv2,1/8] powerpc: mpc85xx: Move CONFIG_FSL_PCIE_DISABLE_ASPM to Kconfig",
    "commit_ref": "c16dfd016afb92771d425ae84a2949da1d7e112b",
    "pull_url": null,
    "state": "accepted",
    "archived": false,
    "hash": "16a796c07dcf3365b1354b9074ea386e2e803950",
    "submitter": {
        "id": 67929,
        "url": "http://patchwork.ozlabs.org/api/people/67929/?format=api",
        "name": "Z.Q. Hou",
        "email": "zhiqiang.hou@nxp.com"
    },
    "delegate": {
        "id": 2467,
        "url": "http://patchwork.ozlabs.org/api/users/2467/?format=api",
        "username": "prabhu_kush",
        "first_name": "Prabhakar",
        "last_name": "Kushwaha",
        "email": "prabhakar@freescale.com"
    },
    "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20190523122327.37264-2-Zhiqiang.Hou@nxp.com/mbox/",
    "series": [
        {
            "id": 109483,
            "url": "http://patchwork.ozlabs.org/api/series/109483/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=109483",
            "date": "2019-05-23T12:21:57",
            "name": "dm: pci: add Freescale PowerPC PCIe driver",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/109483/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/1104079/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/1104079/checks/",
    "tags": {},
    "related": [],
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        "From": "\"Z.q. Hou\" <zhiqiang.hou@nxp.com>",
        "To": "\"u-boot@lists.denx.de\" <u-boot@lists.denx.de>, Prabhakar Kushwaha\n\t<prabhakar.kushwaha@nxp.com>, \"wd@denx.de\" <wd@denx.de>, Shengzhou Liu\n\t<shengzhou.liu@nxp.com>, \"bmeng.cn@gmail.com\" <bmeng.cn@gmail.com>,\n\tJagdish\n\tGediya <jagdish.gediya@nxp.com>, \"sjg@chromium.org\" <sjg@chromium.org>,\n\t\"ley.foon.tan@intel.com\" <ley.foon.tan@intel.com>,\n\t\"sr@denx.de\" <sr@denx.de>",
        "Thread-Topic": "[PATCHv2 1/8] powerpc: mpc85xx: Move\n\tCONFIG_FSL_PCIE_DISABLE_ASPM to Kconfig",
        "Thread-Index": "AQHVEWIfnM6Vbok6pU+p1uMN59wJ4w==",
        "Date": "Thu, 23 May 2019 12:22:01 +0000",
        "Message-ID": "<20190523122327.37264-2-Zhiqiang.Hou@nxp.com>",
        "References": "<20190523122327.37264-1-Zhiqiang.Hou@nxp.com>",
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        "Cc": "\"Z.q. Hou\" <zhiqiang.hou@nxp.com>, Xiaowei Bao <xiaowei.bao@nxp.com>",
        "Subject": "[U-Boot] [PATCHv2 1/8] powerpc: mpc85xx: Move\n\tCONFIG_FSL_PCIE_DISABLE_ASPM to Kconfig",
        "X-BeenThere": "u-boot@lists.denx.de",
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        "List-Id": "U-Boot discussion <u-boot.lists.denx.de>",
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    },
    "content": "From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>\n\nUse the Kconfig option to select the PCIe ASPM errata.\n\nSigned-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>\n---\nV2:\n - New patch.\n\n arch/powerpc/cpu/mpc85xx/Kconfig          | 8 ++++++++\n arch/powerpc/include/asm/config_mpc85xx.h | 5 -----\n 2 files changed, 8 insertions(+), 5 deletions(-)",
    "diff": "diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig\r\nindex 0057f195b3..02bc1caa3f 100644\r\n--- a/arch/powerpc/cpu/mpc85xx/Kconfig\r\n+++ b/arch/powerpc/cpu/mpc85xx/Kconfig\r\n@@ -702,6 +702,7 @@ config ARCH_P1011\r\n \tselect SYS_FSL_ERRATUM_A005125\r\n \tselect SYS_FSL_ERRATUM_ELBC_A001\r\n \tselect SYS_FSL_ERRATUM_ESDHC111\r\n+\tselect FSL_PCIE_DISABLE_ASPM\r\n \tselect SYS_FSL_HAS_DDR3\r\n \tselect SYS_FSL_HAS_SEC\r\n \tselect SYS_FSL_SEC_BE\r\n@@ -716,6 +717,7 @@ config ARCH_P1020\r\n \tselect SYS_FSL_ERRATUM_A005125\r\n \tselect SYS_FSL_ERRATUM_ELBC_A001\r\n \tselect SYS_FSL_ERRATUM_ESDHC111\r\n+\tselect FSL_PCIE_DISABLE_ASPM\r\n \tselect SYS_FSL_HAS_DDR3\r\n \tselect SYS_FSL_HAS_SEC\r\n \tselect SYS_FSL_SEC_BE\r\n@@ -735,6 +737,7 @@ config ARCH_P1021\r\n \tselect SYS_FSL_ERRATUM_A005125\r\n \tselect SYS_FSL_ERRATUM_ELBC_A001\r\n \tselect SYS_FSL_ERRATUM_ESDHC111\r\n+\tselect FSL_PCIE_DISABLE_ASPM\r\n \tselect SYS_FSL_HAS_DDR3\r\n \tselect SYS_FSL_HAS_SEC\r\n \tselect SYS_FSL_SEC_BE\r\n@@ -782,6 +785,7 @@ config ARCH_P1024\r\n \tselect SYS_FSL_ERRATUM_A005125\r\n \tselect SYS_FSL_ERRATUM_ELBC_A001\r\n \tselect SYS_FSL_ERRATUM_ESDHC111\r\n+\tselect FSL_PCIE_DISABLE_ASPM\r\n \tselect SYS_FSL_HAS_DDR3\r\n \tselect SYS_FSL_HAS_SEC\r\n \tselect SYS_FSL_SEC_BE\r\n@@ -802,6 +806,7 @@ config ARCH_P1025\r\n \tselect SYS_FSL_ERRATUM_A005125\r\n \tselect SYS_FSL_ERRATUM_ELBC_A001\r\n \tselect SYS_FSL_ERRATUM_ESDHC111\r\n+\tselect FSL_PCIE_DISABLE_ASPM\r\n \tselect SYS_FSL_HAS_DDR3\r\n \tselect SYS_FSL_HAS_SEC\r\n \tselect SYS_FSL_SEC_BE\r\n@@ -1431,6 +1436,9 @@ config SYS_P4080_ERRATUM_SERDES_A001\r\n config SYS_P4080_ERRATUM_SERDES_A005\r\n \tbool\r\n \r\n+config FSL_PCIE_DISABLE_ASPM\r\n+\tbool\r\n+\r\n config SYS_FSL_QORIQ_CHASSIS1\r\n \tbool\r\n \r\ndiff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h\r\nindex 7c963cdc35..946e74a93b 100644\r\n--- a/arch/powerpc/include/asm/config_mpc85xx.h\r\n+++ b/arch/powerpc/include/asm/config_mpc85xx.h\r\n@@ -61,19 +61,16 @@\r\n /* P1011 is single core version of P1020 */\r\n #elif defined(CONFIG_ARCH_P1011)\r\n #define CONFIG_TSECV2\r\n-#define CONFIG_FSL_PCIE_DISABLE_ASPM\r\n #define CONFIG_USB_MAX_CONTROLLER_COUNT\t2\r\n \r\n #elif defined(CONFIG_ARCH_P1020)\r\n #define CONFIG_TSECV2\r\n-#define CONFIG_FSL_PCIE_DISABLE_ASPM\r\n #ifndef CONFIG_USB_MAX_CONTROLLER_COUNT\r\n #define CONFIG_USB_MAX_CONTROLLER_COUNT\t2\r\n #endif\r\n \r\n #elif defined(CONFIG_ARCH_P1021)\r\n #define CONFIG_TSECV2\r\n-#define CONFIG_FSL_PCIE_DISABLE_ASPM\r\n #define QE_MURAM_SIZE\t\t\t0x6000UL\r\n #define MAX_QE_RISC\t\t\t1\r\n #define QE_NUM_OF_SNUM\t\t\t28\r\n@@ -95,14 +92,12 @@\r\n /* P1024 is lower end variant of P1020 */\r\n #elif defined(CONFIG_ARCH_P1024)\r\n #define CONFIG_TSECV2\r\n-#define CONFIG_FSL_PCIE_DISABLE_ASPM\r\n #define CONFIG_USB_MAX_CONTROLLER_COUNT\t2\r\n \r\n /* P1025 is lower end variant of P1021 */\r\n #elif defined(CONFIG_ARCH_P1025)\r\n #define CONFIG_USB_MAX_CONTROLLER_COUNT\t1\r\n #define CONFIG_TSECV2\r\n-#define CONFIG_FSL_PCIE_DISABLE_ASPM\r\n #define QE_MURAM_SIZE\t\t\t0x6000UL\r\n #define MAX_QE_RISC\t\t\t1\r\n #define QE_NUM_OF_SNUM\t\t\t28\r\n",
    "prefixes": [
        "U-Boot",
        "PATCHv2",
        "1/8"
    ]
}