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GET /api/patches/1103809/?format=api
{ "id": 1103809, "url": "http://patchwork.ozlabs.org/api/patches/1103809/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/1558604623-921-1-git-send-email-meenakshi.aggarwal@nxp.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1558604623-921-1-git-send-email-meenakshi.aggarwal@nxp.com>", "list_archive_url": null, "date": "2019-05-23T09:43:43", "name": "[U-Boot,v4] drivers: net: mc: Report extra memory to Linux", "commit_ref": "cf0bbbd1ee7b7c5e40db81c6b61d82e853dd50fb", "pull_url": null, "state": "accepted", "archived": false, "hash": "25011fcf483c20d91921e93deef2cc8a8b7bc201", "submitter": { "id": 75448, "url": "http://patchwork.ozlabs.org/api/people/75448/?format=api", "name": "Meenakshi Aggarwal", "email": "meenakshi.aggarwal@nxp.com" }, "delegate": { "id": 2467, "url": "http://patchwork.ozlabs.org/api/users/2467/?format=api", "username": "prabhu_kush", "first_name": "Prabhakar", "last_name": "Kushwaha", "email": "prabhakar@freescale.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/1558604623-921-1-git-send-email-meenakshi.aggarwal@nxp.com/mbox/", "series": [ { "id": 109387, "url": "http://patchwork.ozlabs.org/api/series/109387/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=109387", "date": "2019-05-23T09:43:43", "name": "[U-Boot,v4] drivers: net: mc: Report extra memory to Linux", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/109387/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1103809/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1103809/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=nxp.com" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 458bN06HJqz9s5c\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 23 May 2019 13:58:56 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 862C8C21E08; Thu, 23 May 2019 03:58:50 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id DEFA4C21CB6;\n\tThu, 23 May 2019 03:58:47 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid AE34AC21CB6; Thu, 23 May 2019 03:58:45 +0000 (UTC)", "from inva020.nxp.com (inva020.nxp.com [92.121.34.13])\n\tby lists.denx.de (Postfix) with ESMTPS id 28E99C21C29\n\tfor <u-boot@lists.denx.de>; Thu, 23 May 2019 03:58:45 +0000 (UTC)", "from inva020.nxp.com (localhost [127.0.0.1])\n\tby inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id EF8811A00DB;\n\tThu, 23 May 2019 05:58:44 +0200 (CEST)", "from inv0113.in-blr01.nxp.com (inv0113.in-blr01.nxp.com\n\t[165.114.116.118])\n\tby inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 9C51C1A0070;\n\tThu, 23 May 2019 05:58:44 +0200 (CEST)", "from uefi-OptiPlex-790.ap.freescale.net\n\t(uefi-OptiPlex-790.ap.freescale.net [10.232.132.78])\n\tby inv0113.in-blr01.nxp.com (Postfix) with ESMTP id DF651329;\n\tThu, 23 May 2019 09:28:43 +0530 (IST)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "**", "X-Spam-Status": "No, score=2.4 required=5.0 tests=DATE_IN_FUTURE_03_06\n\tautolearn=no autolearn_force=no version=3.4.0", "From": "Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>", "To": "u-boot@lists.denx.de,\n\tprabhakar.kushwaha@nxp.com", "Date": "Thu, 23 May 2019 15:13:43 +0530", "Message-Id": "<1558604623-921-1-git-send-email-meenakshi.aggarwal@nxp.com>", "X-Mailer": "git-send-email 1.9.1", "In-Reply-To": "<1558602172-325-1-git-send-email-meenakshi.aggarwal@nxp.com>", "References": "<1558602172-325-1-git-send-email-meenakshi.aggarwal@nxp.com>", "X-Virus-Scanned": "ClamAV using ClamSMTP", "Subject": "[U-Boot] [PATCH v4] drivers: net: mc: Report extra memory to Linux", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "MC firmware need to be aligned to 512M, so minimum 512MB DDR is reserved.\nBut MC support to work with 128MB or 256MB DDR memory also, in this\ncase, rest of the memory is not usable.\nSo reporting this extra memory to Linux through dtb memory fixup.\n\nSigned-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>\n---\nchanged for v1:\n - Incorporated review comments in one board, Missed for\n\t other boards\nchanged for v2:\n\t- Incorporated review comments in all boards\nchanged for v3:\n - Include revision history in patch\nchanged for v4:\n\t- Remove macro TRUE/FALSE\n---\n board/freescale/ls1088a/ls1088a.c | 31 ++++++++++++++++++++++++++++---\n board/freescale/ls2080ardb/ls2080ardb.c | 32 +++++++++++++++++++++++++++++---\n board/freescale/lx2160a/lx2160a.c | 31 ++++++++++++++++++++++++++++---\n drivers/net/fsl-mc/mc.c | 10 ++++++++++\n include/fsl-mc/fsl_mc.h | 1 +\n 5 files changed, 96 insertions(+), 9 deletions(-)", "diff": "diff --git a/board/freescale/ls1088a/ls1088a.c b/board/freescale/ls1088a/ls1088a.c\nindex 6d11a13..db26938 100644\n--- a/board/freescale/ls1088a/ls1088a.c\n+++ b/board/freescale/ls1088a/ls1088a.c\n@@ -738,11 +738,26 @@ void fsl_fdt_fixup_flash(void *fdt)\n int ft_board_setup(void *blob, bd_t *bd)\n {\n \tint i;\n-\tu64 base[CONFIG_NR_DRAM_BANKS];\n-\tu64 size[CONFIG_NR_DRAM_BANKS];\n+\tu16 mc_memory_bank = 0;\n+\n+\tu64 *base;\n+\tu64 *size;\n+\tu64 mc_memory_base = 0;\n+\tu64 mc_memory_size = 0;\n+\tu16 total_memory_banks;\n \n \tft_cpu_setup(blob, bd);\n \n+\tfdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size);\n+\n+\tif (mc_memory_base != 0)\n+\t\tmc_memory_bank++;\n+\n+\ttotal_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank;\n+\n+\tbase = calloc(total_memory_banks, sizeof(u64));\n+\tsize = calloc(total_memory_banks, sizeof(u64));\n+\n \t/* fixup DT for the two GPP DDR banks */\n \tfor (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {\n \t\tbase[i] = gd->bd->bi_dram[i].start;\n@@ -759,7 +774,17 @@ int ft_board_setup(void *blob, bd_t *bd)\n \t\tsize[1] = gd->arch.resv_ram - base[1];\n #endif\n \n-\tfdt_fixup_memory_banks(blob, base, size, CONFIG_NR_DRAM_BANKS);\n+\tif (mc_memory_base != 0) {\n+\t\tfor (i = 0; i <= total_memory_banks; i++) {\n+\t\t\tif (base[i] == 0 && size[i] == 0) {\n+\t\t\t\tbase[i] = mc_memory_base;\n+\t\t\t\tsize[i] = mc_memory_size;\n+\t\t\t\tbreak;\n+\t\t\t}\n+\t\t}\n+\t}\n+\n+\tfdt_fixup_memory_banks(blob, base, size, total_memory_banks);\n \n \tfdt_fsl_mc_fixup_iommu_map_entry(blob);\n \ndiff --git a/board/freescale/ls2080ardb/ls2080ardb.c b/board/freescale/ls2080ardb/ls2080ardb.c\nindex ce419df..318ee65 100644\n--- a/board/freescale/ls2080ardb/ls2080ardb.c\n+++ b/board/freescale/ls2080ardb/ls2080ardb.c\n@@ -409,11 +409,27 @@ void fsl_fdt_fixup_flash(void *fdt)\n \n int ft_board_setup(void *blob, bd_t *bd)\n {\n-\tu64 base[CONFIG_NR_DRAM_BANKS];\n-\tu64 size[CONFIG_NR_DRAM_BANKS];\n+\tint i;\n+\tu16 mc_memory_bank = 0;\n+\n+\tu64 *base;\n+\tu64 *size;\n+\tu64 mc_memory_base = 0;\n+\tu64 mc_memory_size = 0;\n+\tu16 total_memory_banks;\n \n \tft_cpu_setup(blob, bd);\n \n+\tfdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size);\n+\n+\tif (mc_memory_base != 0)\n+\t\tmc_memory_bank++;\n+\n+\ttotal_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank;\n+\n+\tbase = calloc(total_memory_banks, sizeof(u64));\n+\tsize = calloc(total_memory_banks, sizeof(u64));\n+\n \t/* fixup DT for the two GPP DDR banks */\n \tbase[0] = gd->bd->bi_dram[0].start;\n \tsize[0] = gd->bd->bi_dram[0].size;\n@@ -430,7 +446,17 @@ int ft_board_setup(void *blob, bd_t *bd)\n \t\tsize[1] = gd->arch.resv_ram - base[1];\n #endif\n \n-\tfdt_fixup_memory_banks(blob, base, size, 2);\n+\tif (mc_memory_base != 0) {\n+\t\tfor (i = 0; i <= total_memory_banks; i++) {\n+\t\t\tif (base[i] == 0 && size[i] == 0) {\n+\t\t\t\tbase[i] = mc_memory_base;\n+\t\t\t\tsize[i] = mc_memory_size;\n+\t\t\t\tbreak;\n+\t\t\t}\n+\t\t}\n+\t}\n+\n+\tfdt_fixup_memory_banks(blob, base, size, total_memory_banks);\n \n \tfdt_fsl_mc_fixup_iommu_map_entry(blob);\n \ndiff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c\nindex 3875d04..aa2ff74 100644\n--- a/board/freescale/lx2160a/lx2160a.c\n+++ b/board/freescale/lx2160a/lx2160a.c\n@@ -520,11 +520,26 @@ void board_quiesce_devices(void)\n int ft_board_setup(void *blob, bd_t *bd)\n {\n \tint i;\n-\tu64 base[CONFIG_NR_DRAM_BANKS];\n-\tu64 size[CONFIG_NR_DRAM_BANKS];\n+\tu16 mc_memory_bank = 0;\n+\n+\tu64 *base;\n+\tu64 *size;\n+\tu64 mc_memory_base = 0;\n+\tu64 mc_memory_size = 0;\n+\tu16 total_memory_banks;\n \n \tft_cpu_setup(blob, bd);\n \n+\tfdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size);\n+\n+\tif (mc_memory_base != 0)\n+\t\tmc_memory_bank++;\n+\n+\ttotal_memory_banks = CONFIG_NR_DRAM_BANKS + mc_memory_bank;\n+\n+\tbase = calloc(total_memory_banks, sizeof(u64));\n+\tsize = calloc(total_memory_banks, sizeof(u64));\n+\n \t/* fixup DT for the three GPP DDR banks */\n \tfor (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {\n \t\tbase[i] = gd->bd->bi_dram[i].start;\n@@ -544,7 +559,17 @@ int ft_board_setup(void *blob, bd_t *bd)\n \t\tsize[2] = gd->arch.resv_ram - base[2];\n #endif\n \n-\tfdt_fixup_memory_banks(blob, base, size, CONFIG_NR_DRAM_BANKS);\n+\tif (mc_memory_base != 0) {\n+\t\tfor (i = 0; i <= total_memory_banks; i++) {\n+\t\t\tif (base[i] == 0 && size[i] == 0) {\n+\t\t\t\tbase[i] = mc_memory_base;\n+\t\t\t\tsize[i] = mc_memory_size;\n+\t\t\t\tbreak;\n+\t\t\t}\n+\t\t}\n+\t}\n+\n+\tfdt_fixup_memory_banks(blob, base, size, total_memory_banks);\n \n #ifdef CONFIG_USB\n \tfsl_fdt_fixup_dr_usb(blob, bd);\ndiff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c\nindex cc59b21..f424025 100644\n--- a/drivers/net/fsl-mc/mc.c\n+++ b/drivers/net/fsl-mc/mc.c\n@@ -281,6 +281,16 @@ static int mc_fixup_dpl_mac_addr(void *blob, int dpmac_id,\n \t\t\t\t MC_FIXUP_DPL);\n }\n \n+void fdt_fixup_mc_ddr(u64 *base, u64 *size)\n+{\n+\tu64 mc_size = mc_get_dram_block_size();\n+\n+\tif (mc_size < MC_DRAM_BLOCK_DEFAULT_SIZE) {\n+\t\t*base = mc_get_dram_addr() + mc_size;\n+\t\t*size = MC_DRAM_BLOCK_DEFAULT_SIZE - mc_size;\n+\t}\n+}\n+\n void fdt_fsl_mc_fixup_iommu_map_entry(void *blob)\n {\n \tu32 *prop;\ndiff --git a/include/fsl-mc/fsl_mc.h b/include/fsl-mc/fsl_mc.h\nindex 0abd797..a4d7d85 100644\n--- a/include/fsl-mc/fsl_mc.h\n+++ b/include/fsl-mc/fsl_mc.h\n@@ -55,6 +55,7 @@ void fdt_fsl_mc_fixup_iommu_map_entry(void *blob);\n int get_mc_boot_status(void);\n int get_dpl_apply_status(void);\n int is_lazy_dpl_addr_valid(void);\n+void fdt_fixup_mc_ddr(u64 *base, u64 *size);\n #ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET\n int get_aiop_apply_status(void);\n #endif\n", "prefixes": [ "U-Boot", "v4" ] }