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GET /api/patches/1086469/?format=api
{ "id": 1086469, "url": "http://patchwork.ozlabs.org/api/patches/1086469/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20190416172439.27908-5-anirudh.venkataramanan@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20190416172439.27908-5-anirudh.venkataramanan@intel.com>", "list_archive_url": null, "date": "2019-04-16T17:24:28", "name": "[S19,04/15] ice: Call out dev/func caps when printing", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "e3c8489575dba4bb44cd6f828f9000b6ccf58941", "submitter": { "id": 73601, "url": "http://patchwork.ozlabs.org/api/people/73601/?format=api", "name": "Anirudh Venkataramanan", "email": "anirudh.venkataramanan@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20190416172439.27908-5-anirudh.venkataramanan@intel.com/mbox/", "series": [ { "id": 103107, "url": "http://patchwork.ozlabs.org/api/series/103107/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=103107", "date": "2019-04-16T17:24:38", "name": "Fixes and feature updates for ice", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/103107/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1086469/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1086469/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=osuosl.org\n\t(client-ip=140.211.166.138; helo=whitealder.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=intel.com" ], "Received": [ "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 44kC1k3PNjz9s3l\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 17 Apr 2019 03:25:30 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 0171687117;\n\tTue, 16 Apr 2019 17:25:28 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id LaHDMWG77Pzy; Tue, 16 Apr 2019 17:25:21 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 0B45487101;\n\tTue, 16 Apr 2019 17:25:18 +0000 (UTC)", "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\tby ash.osuosl.org (Postfix) with ESMTP id 5FC9D1BF9A0\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 16 Apr 2019 17:25:15 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id 5C8FA86E4E\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 16 Apr 2019 17:25:15 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id w0O9y9FstwLd for <intel-wired-lan@lists.osuosl.org>;\n\tTue, 16 Apr 2019 17:25:13 +0000 (UTC)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby whitealder.osuosl.org (Postfix) with ESMTPS id 5BC8686E1A\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tTue, 16 Apr 2019 17:25:13 +0000 (UTC)", "from orsmga001.jf.intel.com ([10.7.209.18])\n\tby orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t16 Apr 2019 10:25:11 -0700", "from shasta.jf.intel.com ([10.166.244.191])\n\tby orsmga001.jf.intel.com with ESMTP; 16 Apr 2019 10:25:11 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.60,358,1549958400\"; d=\"scan'208\";a=\"224064167\"", "From": "Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Tue, 16 Apr 2019 10:24:28 -0700", "Message-Id": "<20190416172439.27908-5-anirudh.venkataramanan@intel.com>", "X-Mailer": "git-send-email 2.20.1", "In-Reply-To": "<20190416172439.27908-1-anirudh.venkataramanan@intel.com>", "References": "<20190416172439.27908-1-anirudh.venkataramanan@intel.com>", "MIME-Version": "1.0", "Subject": "[Intel-wired-lan] [PATCH S19 04/15] ice: Call out dev/func caps\n\twhen printing", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "ice_parse_caps is used to parse both device and function capabilities.\nCurrently, capabilities are printed with a cryptic \"HW caps\" prefix,\nwhich makes it difficult to distinguish whether the capabilities being\nprinted are device or function capabilities.\n\nThis patch makes a change to add a \"func cap\" prefix when printing\nfunction capabilities, and a \"dev cap\" prefix when printing device\ncapabilities.\n\nThis patch also changes some of the capability print strings for\nconsistency.\n\nSigned-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>\n---\n drivers/net/ethernet/intel/ice/ice_common.c | 56 +++++++++++----------\n 1 file changed, 30 insertions(+), 26 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/ice/ice_common.c b/drivers/net/ethernet/intel/ice/ice_common.c\nindex 28d7eacfb801..5e2ec1eab5e5 100644\n--- a/drivers/net/ethernet/intel/ice/ice_common.c\n+++ b/drivers/net/ethernet/intel/ice/ice_common.c\n@@ -1447,6 +1447,7 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,\n \tstruct ice_hw_func_caps *func_p = NULL;\n \tstruct ice_hw_dev_caps *dev_p = NULL;\n \tstruct ice_hw_common_caps *caps;\n+\tchar const *prefix;\n \tu32 i;\n \n \tif (!buf)\n@@ -1457,9 +1458,11 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,\n \tif (opc == ice_aqc_opc_list_dev_caps) {\n \t\tdev_p = &hw->dev_caps;\n \t\tcaps = &dev_p->common_cap;\n+\t\tprefix = \"dev cap\";\n \t} else if (opc == ice_aqc_opc_list_func_caps) {\n \t\tfunc_p = &hw->func_caps;\n \t\tcaps = &func_p->common_cap;\n+\t\tprefix = \"func cap\";\n \t} else {\n \t\tice_debug(hw, ICE_DBG_INIT, \"wrong opcode\\n\");\n \t\treturn;\n@@ -1475,28 +1478,29 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,\n \t\tcase ICE_AQC_CAPS_VALID_FUNCTIONS:\n \t\t\tcaps->valid_functions = number;\n \t\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t\t \"HW caps: Valid Functions = %d\\n\",\n+\t\t\t\t \"%s: valid functions = %d\\n\", prefix,\n \t\t\t\t caps->valid_functions);\n \t\t\tbreak;\n \t\tcase ICE_AQC_CAPS_SRIOV:\n \t\t\tcaps->sr_iov_1_1 = (number == 1);\n \t\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t\t \"HW caps: SR-IOV = %d\\n\", caps->sr_iov_1_1);\n+\t\t\t\t \"%s: SR-IOV = %d\\n\", prefix,\n+\t\t\t\t caps->sr_iov_1_1);\n \t\t\tbreak;\n \t\tcase ICE_AQC_CAPS_VF:\n \t\t\tif (dev_p) {\n \t\t\t\tdev_p->num_vfs_exposed = number;\n \t\t\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t\t\t \"HW caps: VFs exposed = %d\\n\",\n+\t\t\t\t\t \"%s: VFs exposed = %d\\n\", prefix,\n \t\t\t\t\t dev_p->num_vfs_exposed);\n \t\t\t} else if (func_p) {\n \t\t\t\tfunc_p->num_allocd_vfs = number;\n \t\t\t\tfunc_p->vf_base_id = logical_id;\n \t\t\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t\t\t \"HW caps: VFs allocated = %d\\n\",\n+\t\t\t\t\t \"%s: VFs allocated = %d\\n\", prefix,\n \t\t\t\t\t func_p->num_allocd_vfs);\n \t\t\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t\t\t \"HW caps: VF base_id = %d\\n\",\n+\t\t\t\t\t \"%s: VF base_id = %d\\n\", prefix,\n \t\t\t\t\t func_p->vf_base_id);\n \t\t\t}\n \t\t\tbreak;\n@@ -1504,69 +1508,69 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,\n \t\t\tif (dev_p) {\n \t\t\t\tdev_p->num_vsi_allocd_to_host = number;\n \t\t\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t\t\t \"HW caps: Dev.VSI cnt = %d\\n\",\n+\t\t\t\t\t \"%s: num VSI alloc to host = %d\\n\",\n+\t\t\t\t\t prefix,\n \t\t\t\t\t dev_p->num_vsi_allocd_to_host);\n \t\t\t} else if (func_p) {\n \t\t\t\tfunc_p->guar_num_vsi =\n \t\t\t\t\tice_get_num_per_func(hw, ICE_MAX_VSI);\n \t\t\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t\t\t \"HW caps: Func.VSI cnt = %d\\n\",\n-\t\t\t\t\t number);\n+\t\t\t\t\t \"%s: num guaranteed VSI (fw) = %d\\n\",\n+\t\t\t\t\t prefix, number);\n+\t\t\t\tice_debug(hw, ICE_DBG_INIT,\n+\t\t\t\t\t \"%s: num guaranteed VSI = %d\\n\",\n+\t\t\t\t\t prefix, func_p->guar_num_vsi);\n \t\t\t}\n \t\t\tbreak;\n \t\tcase ICE_AQC_CAPS_RSS:\n \t\t\tcaps->rss_table_size = number;\n \t\t\tcaps->rss_table_entry_width = logical_id;\n \t\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t\t \"HW caps: RSS table size = %d\\n\",\n+\t\t\t\t \"%s: RSS table size = %d\\n\", prefix,\n \t\t\t\t caps->rss_table_size);\n \t\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t\t \"HW caps: RSS table width = %d\\n\",\n+\t\t\t\t \"%s: RSS table width = %d\\n\", prefix,\n \t\t\t\t caps->rss_table_entry_width);\n \t\t\tbreak;\n \t\tcase ICE_AQC_CAPS_RXQS:\n \t\t\tcaps->num_rxq = number;\n \t\t\tcaps->rxq_first_id = phys_id;\n \t\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t\t \"HW caps: Num Rx Qs = %d\\n\", caps->num_rxq);\n+\t\t\t\t \"%s: num Rx queues = %d\\n\", prefix,\n+\t\t\t\t caps->num_rxq);\n \t\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t\t \"HW caps: Rx first queue ID = %d\\n\",\n+\t\t\t\t \"%s: Rx first queue ID = %d\\n\", prefix,\n \t\t\t\t caps->rxq_first_id);\n \t\t\tbreak;\n \t\tcase ICE_AQC_CAPS_TXQS:\n \t\t\tcaps->num_txq = number;\n \t\t\tcaps->txq_first_id = phys_id;\n \t\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t\t \"HW caps: Num Tx Qs = %d\\n\", caps->num_txq);\n+\t\t\t\t \"%s: num Tx queues = %d\\n\", prefix,\n+\t\t\t\t caps->num_txq);\n \t\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t\t \"HW caps: Tx first queue ID = %d\\n\",\n+\t\t\t\t \"%s: Tx first queue ID = %d\\n\", prefix,\n \t\t\t\t caps->txq_first_id);\n \t\t\tbreak;\n \t\tcase ICE_AQC_CAPS_MSIX:\n \t\t\tcaps->num_msix_vectors = number;\n \t\t\tcaps->msix_vector_first_id = phys_id;\n \t\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t\t \"HW caps: MSIX vector count = %d\\n\",\n+\t\t\t\t \"%s: MSIX vector count = %d\\n\", prefix,\n \t\t\t\t caps->num_msix_vectors);\n \t\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t\t \"HW caps: MSIX first vector index = %d\\n\",\n+\t\t\t\t \"%s: MSIX first vector index = %d\\n\", prefix,\n \t\t\t\t caps->msix_vector_first_id);\n \t\t\tbreak;\n \t\tcase ICE_AQC_CAPS_MAX_MTU:\n \t\t\tcaps->max_mtu = number;\n-\t\t\tif (dev_p)\n-\t\t\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t\t\t \"HW caps: Dev.MaxMTU = %d\\n\",\n-\t\t\t\t\t caps->max_mtu);\n-\t\t\telse if (func_p)\n-\t\t\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t\t\t \"HW caps: func.MaxMTU = %d\\n\",\n-\t\t\t\t\t caps->max_mtu);\n+\t\t\tice_debug(hw, ICE_DBG_INIT, \"%s: max MTU = %d\\n\",\n+\t\t\t\t prefix, caps->max_mtu);\n \t\t\tbreak;\n \t\tdefault:\n \t\t\tice_debug(hw, ICE_DBG_INIT,\n-\t\t\t\t \"HW caps: Unknown capability[%d]: 0x%x\\n\", i,\n-\t\t\t\t cap);\n+\t\t\t\t \"%s: unknown capability[%d]: 0x%x\\n\", prefix,\n+\t\t\t\t i, cap);\n \t\t\tbreak;\n \t\t}\n \t}\n", "prefixes": [ "S19", "04/15" ] }