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GET /api/patches/1085591/?format=api
{ "id": 1085591, "url": "http://patchwork.ozlabs.org/api/patches/1085591/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20190415111035.31815-1-sasha.neftin@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20190415111035.31815-1-sasha.neftin@intel.com>", "list_archive_url": null, "date": "2019-04-15T11:10:35", "name": "[v1,1/1] igc: Remove the obsolete workaround", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "c2f2a192080b5033bf5a09ccefb2a13ee66487de", "submitter": { "id": 69860, "url": "http://patchwork.ozlabs.org/api/people/69860/?format=api", "name": "Sasha Neftin", "email": "sasha.neftin@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20190415111035.31815-1-sasha.neftin@intel.com/mbox/", "series": [ { "id": 102776, "url": "http://patchwork.ozlabs.org/api/series/102776/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=102776", "date": "2019-04-15T11:10:35", "name": "[v1,1/1] igc: Remove the obsolete workaround", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/102776/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1085591/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1085591/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=osuosl.org\n\t(client-ip=140.211.166.136; helo=silver.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=intel.com" ], "Received": [ "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 44jQln4T9Fz9s0W\n\tfor <incoming@patchwork.ozlabs.org>;\n\tMon, 15 Apr 2019 21:10:45 +1000 (AEST)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id 30E6922E3F;\n\tMon, 15 Apr 2019 11:10:43 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id FcR6IHIh7DQe; Mon, 15 Apr 2019 11:10:40 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby silver.osuosl.org (Postfix) with ESMTP id 2833622CB0;\n\tMon, 15 Apr 2019 11:10:40 +0000 (UTC)", "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\tby ash.osuosl.org (Postfix) with ESMTP id AA0DD1BF327\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 15 Apr 2019 11:10:38 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id A668C875A7\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 15 Apr 2019 11:10:38 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id xPbjrWLMnkDG for <intel-wired-lan@lists.osuosl.org>;\n\tMon, 15 Apr 2019 11:10:38 +0000 (UTC)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby hemlock.osuosl.org (Postfix) with ESMTPS id 189A1873B6\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tMon, 15 Apr 2019 11:10:38 +0000 (UTC)", "from orsmga004.jf.intel.com ([10.7.209.38])\n\tby orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t15 Apr 2019 04:10:37 -0700", "from ccdlinuxdev08.iil.intel.com ([143.185.161.150])\n\tby orsmga004.jf.intel.com with ESMTP; 15 Apr 2019 04:10:36 -0700" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.60,353,1549958400\"; d=\"scan'208\";a=\"291658970\"", "From": "Sasha Neftin <sasha.neftin@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Mon, 15 Apr 2019 14:10:35 +0300", "Message-Id": "<20190415111035.31815-1-sasha.neftin@intel.com>", "X-Mailer": "git-send-email 2.11.0", "Subject": "[Intel-wired-lan] [PATCH v1 1/1] igc: Remove the obsolete workaround", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "Enables a resend request after the completion timeout workaround is not\nrelevant for i225 device. This patch is clean code relevant this\nworkaround.\nMinor cosmetic fixes, replace the 'spaces' with 'tabs'\n\nSigned-off-by: Sasha Neftin <sasha.neftin@intel.com>\n---\n drivers/net/ethernet/intel/igc/igc_base.c | 49 ----------------------------\n drivers/net/ethernet/intel/igc/igc_defines.h | 12 ++-----\n 2 files changed, 3 insertions(+), 58 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/igc/igc_base.c b/drivers/net/ethernet/intel/igc/igc_base.c\nindex 51a8b8769c67..59258d791106 100644\n--- a/drivers/net/ethernet/intel/igc/igc_base.c\n+++ b/drivers/net/ethernet/intel/igc/igc_base.c\n@@ -10,50 +10,6 @@\n #include \"igc.h\"\n \n /**\n- * igc_set_pcie_completion_timeout - set pci-e completion timeout\n- * @hw: pointer to the HW structure\n- */\n-static s32 igc_set_pcie_completion_timeout(struct igc_hw *hw)\n-{\n-\tu32 gcr = rd32(IGC_GCR);\n-\tu16 pcie_devctl2;\n-\ts32 ret_val = 0;\n-\n-\t/* only take action if timeout value is defaulted to 0 */\n-\tif (gcr & IGC_GCR_CMPL_TMOUT_MASK)\n-\t\tgoto out;\n-\n-\t/* if capabilities version is type 1 we can write the\n-\t * timeout of 10ms to 200ms through the GCR register\n-\t */\n-\tif (!(gcr & IGC_GCR_CAP_VER2)) {\n-\t\tgcr |= IGC_GCR_CMPL_TMOUT_10ms;\n-\t\tgoto out;\n-\t}\n-\n-\t/* for version 2 capabilities we need to write the config space\n-\t * directly in order to set the completion timeout value for\n-\t * 16ms to 55ms\n-\t */\n-\tret_val = igc_read_pcie_cap_reg(hw, PCIE_DEVICE_CONTROL2,\n-\t\t\t\t\t&pcie_devctl2);\n-\tif (ret_val)\n-\t\tgoto out;\n-\n-\tpcie_devctl2 |= PCIE_DEVICE_CONTROL2_16ms;\n-\n-\tret_val = igc_write_pcie_cap_reg(hw, PCIE_DEVICE_CONTROL2,\n-\t\t\t\t\t &pcie_devctl2);\n-out:\n-\t/* disable completion timeout resend */\n-\tgcr &= ~IGC_GCR_CMPL_TMOUT_RESEND;\n-\n-\twr32(IGC_GCR, gcr);\n-\n-\treturn ret_val;\n-}\n-\n-/**\n * igc_reset_hw_base - Reset hardware\n * @hw: pointer to the HW structure\n *\n@@ -72,11 +28,6 @@ static s32 igc_reset_hw_base(struct igc_hw *hw)\n \tif (ret_val)\n \t\thw_dbg(\"PCI-E Master disable polling has failed.\\n\");\n \n-\t/* set the completion timeout for interface */\n-\tret_val = igc_set_pcie_completion_timeout(hw);\n-\tif (ret_val)\n-\t\thw_dbg(\"PCI-E Set completion timeout has failed.\\n\");\n-\n \thw_dbg(\"Masking off all interrupts\\n\");\n \twr32(IGC_IMC, 0xffffffff);\n \ndiff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h\nindex 6f17ed3de995..5f6bc67cb33b 100644\n--- a/drivers/net/ethernet/intel/igc/igc_defines.h\n+++ b/drivers/net/ethernet/intel/igc/igc_defines.h\n@@ -5,8 +5,8 @@\n #define _IGC_DEFINES_H_\n \n /* Number of Transmit and Receive Descriptors must be a multiple of 8 */\n-#define REQ_TX_DESCRIPTOR_MULTIPLE 8\n-#define REQ_RX_DESCRIPTOR_MULTIPLE 8\n+#define REQ_TX_DESCRIPTOR_MULTIPLE\t8\n+#define REQ_RX_DESCRIPTOR_MULTIPLE\t8\n \n #define IGC_CTRL_EXT_DRV_LOAD\t0x10000000 /* Drv loaded bit for FW */\n \n@@ -29,12 +29,6 @@\n /* Status of Master requests. */\n #define IGC_STATUS_GIO_MASTER_ENABLE\t0x00080000\n \n-/* PCI Express Control */\n-#define IGC_GCR_CMPL_TMOUT_MASK\t\t0x0000F000\n-#define IGC_GCR_CMPL_TMOUT_10ms\t\t0x00001000\n-#define IGC_GCR_CMPL_TMOUT_RESEND\t0x00010000\n-#define IGC_GCR_CAP_VER2\t\t0x00040000\n-\n /* Receive Address\n * Number of high/low register pairs in the RAR. The RAR (Receive Address\n * Registers) holds the directed and multicast addresses that we monitor.\n@@ -395,7 +389,7 @@\n #define IGC_MDIC_ERROR\t\t0x40000000\n #define IGC_MDIC_DEST\t\t0x80000000\n \n-#define IGC_N0_QUEUE -1\n+#define IGC_N0_QUEUE\t\t-1\n \n #define IGC_MAX_MAC_HDR_LEN\t127\n #define IGC_MAX_NETWORK_HDR_LEN\t511\n", "prefixes": [ "v1", "1/1" ] }