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GET /api/patches/1083259/?format=api
{ "id": 1083259, "url": "http://patchwork.ozlabs.org/api/patches/1083259/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20190410084335.16828-3-andy.tang@nxp.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20190410084335.16828-3-andy.tang@nxp.com>", "list_archive_url": null, "date": "2019-04-10T08:43:35", "name": "[U-Boot,3/3,v3] armv8: ls1028aqds: Add support of LS1028AQDS", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "e7e33596cfbc68f57a60cba27bd01465185d7986", "submitter": { "id": 71141, "url": "http://patchwork.ozlabs.org/api/people/71141/?format=api", "name": "Andy Tang", "email": "andy.tang@nxp.com" }, "delegate": { "id": 2467, "url": "http://patchwork.ozlabs.org/api/users/2467/?format=api", "username": "prabhu_kush", "first_name": "Prabhakar", "last_name": "Kushwaha", "email": "prabhakar@freescale.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20190410084335.16828-3-andy.tang@nxp.com/mbox/", "series": [ { "id": 101925, "url": "http://patchwork.ozlabs.org/api/series/101925/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=101925", "date": "2019-04-10T08:43:33", "name": "[U-Boot,1/3,v3] armv8: ls1028a: Add NXP LS1028A SoC support", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/101925/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1083259/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1083259/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=nxp.com" ], "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 44fHvt0ywyz9s0W\n\tfor <incoming@patchwork.ozlabs.org>;\n\tWed, 10 Apr 2019 18:51:53 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid 75703C21E08; Wed, 10 Apr 2019 08:51:48 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 33B58C21E26;\n\tWed, 10 Apr 2019 08:50:47 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid 5F894C21DE8; Wed, 10 Apr 2019 08:50:46 +0000 (UTC)", "from inva020.nxp.com (inva020.nxp.com [92.121.34.13])\n\tby lists.denx.de (Postfix) with ESMTPS id B8663C21E12\n\tfor <u-boot@lists.denx.de>; Wed, 10 Apr 2019 08:50:37 +0000 (UTC)", "from inva020.nxp.com (localhost [127.0.0.1])\n\tby inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 38D211A006E;\n\tWed, 10 Apr 2019 10:50:37 +0200 (CEST)", "from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com\n\t[165.114.16.14])\n\tby inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id AAF6A1A000E;\n\tWed, 10 Apr 2019 10:50:32 +0200 (CEST)", "from titan.ap.freescale.net (TITAN.ap.freescale.net\n\t[10.192.208.233])\n\tby invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 3C6EA402DB;\n\tWed, 10 Apr 2019 16:50:27 +0800 (SGT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=0.0 required=5.0 tests=none autolearn=unavailable\n\tautolearn_force=no version=3.4.0", "From": "Yuantian Tang <andy.tang@nxp.com>", "To": "prabhakar.kushwaha@nxp.com", "Date": "Wed, 10 Apr 2019 16:43:35 +0800", "Message-Id": "<20190410084335.16828-3-andy.tang@nxp.com>", "X-Mailer": "git-send-email 2.14.1", "In-Reply-To": "<20190410084335.16828-2-andy.tang@nxp.com>", "References": "<20190410084335.16828-1-andy.tang@nxp.com>\n\t<20190410084335.16828-2-andy.tang@nxp.com>", "X-Virus-Scanned": "ClamAV using ClamSMTP", "Cc": "sudhanshu.gupta@nxp.com, Yuantian Tang <andy.tang@nxp.com>,\n\tu-boot@lists.denx.de, ran.wang_1@nxp.com, Bhaskar.Upadhaya@nxp.com", "Subject": "[U-Boot] [PATCH 3/3 v3] armv8: ls1028aqds: Add support of LS1028AQDS", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "LS1028AQDS Development System is a high-performance\ncomputing, evaluation, and development platform that supports\nLS1028A QorIQ Architecture processor.\n\nSigned-off-by: Sudhanshu Gupta <sudhanshu.gupta@nxp.com>\nSigned-off-by: Rai Harninder <harninder.rai@nxp.com>\nSigned-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>\nSigned-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>\nSigned-off-by: Tang yuantian <andy.tang@nxp.com>\n---\nv3:\n\t-- fix some issues\n arch/arm/Kconfig | 11 +++\n arch/arm/cpu/armv8/Kconfig | 2 +-\n arch/arm/dts/fsl-ls1028a-qds.dts | 88 +++++++++++++++++++\n board/freescale/ls1028a/Kconfig | 39 +++++++++\n board/freescale/ls1028a/MAINTAINERS | 11 +++\n board/freescale/ls1028a/README | 85 ++++++++++++++++++\n board/freescale/ls1028a/ls1028a.c | 38 ++++++++\n configs/ls1028aqds_tfa_defconfig | 61 +++++++++++++\n include/configs/ls1028aqds.h | 167 ++++++++++++++++++++++++++++++++++++\n 9 files changed, 501 insertions(+), 1 deletion(-)\n create mode 100644 arch/arm/dts/fsl-ls1028a-qds.dts\n create mode 100644 configs/ls1028aqds_tfa_defconfig\n create mode 100644 include/configs/ls1028aqds.h", "diff": "diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig\nindex aaaf36a..7741ea2 100644\n--- a/arch/arm/Kconfig\n+++ b/arch/arm/Kconfig\n@@ -1203,6 +1203,17 @@ config TARGET_LS1012AFRDM\n \t development platform that supports the QorIQ LS1012A\n \t Layerscape Architecture processor.\n \n+config TARGET_LS1028AQDS\n+\tbool \"Support ls1028aqds\"\n+\tselect ARCH_LS1028A\n+\tselect ARM64\n+\tselect ARMV8_MULTIENTRY\n+\thelp\n+\t Support for Freescale LS1028AQDS platform\n+\t The LS1028A Development System (QDS) is a high-performance\n+\t development platform that supports the QorIQ LS1028A\n+\t Layerscape Architecture processor.\n+\n config TARGET_LS1028ARDB\n \tbool \"Support ls1028ardb\"\n \tselect ARCH_LS1028A\ndiff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig\nindex a4fa63b..3e9d47a 100644\n--- a/arch/arm/cpu/armv8/Kconfig\n+++ b/arch/arm/cpu/armv8/Kconfig\n@@ -104,7 +104,7 @@ config PSCI_RESET\n \t\t !TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \\\n \t\t !TARGET_LS1012A2G5RDB && !TARGET_LS1012AQDS && \\\n \t\t !TARGET_LS1012AFRWY && \\\n-\t\t !TARGET_LS1028ARDB && \\\n+\t\t !TARGET_LS1028ARDB && !TARGET_LS1028AQDS && \\\n \t\t !TARGET_LS1043ARDB && !TARGET_LS1043AQDS && \\\n \t\t !TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \\\n \t\t !TARGET_LS2081ARDB && !TARGET_LX2160ARDB && \\\ndiff --git a/arch/arm/dts/fsl-ls1028a-qds.dts b/arch/arm/dts/fsl-ls1028a-qds.dts\nnew file mode 100644\nindex 0000000..46a0419\n--- /dev/null\n+++ b/arch/arm/dts/fsl-ls1028a-qds.dts\n@@ -0,0 +1,88 @@\n+// SPDX-License-Identifier: GPL-2.0+ OR X11\n+/*\n+ * NXP ls1028AQDS device tree source\n+ *\n+ * Copyright 2019 NXP\n+ *\n+ */\n+\n+/dts-v1/;\n+\n+#include \"fsl-ls1028a.dtsi\"\n+\n+/ {\n+\tmodel = \"NXP Layerscape 1028a QDS Board\";\n+\tcompatible = \"fsl,ls1028a-qds\", \"fsl,ls1028a\";\n+};\n+\n+&dspi0 {\n+\tstatus = \"okay\";\n+};\n+\n+&dspi1 {\n+\tstatus = \"okay\";\n+};\n+\n+&dspi2 {\n+\tstatus = \"okay\";\n+};\n+\n+&esdhc0 {\n+\tstatus = \"okay\";\n+};\n+\n+&esdhc1 {\n+\tstatus = \"okay\";\n+};\n+\n+&i2c0 {\n+\tstatus = \"okay\";\n+};\n+\n+&i2c1 {\n+\tstatus = \"okay\";\n+};\n+\n+&i2c2 {\n+\tstatus = \"okay\";\n+};\n+\n+&i2c3 {\n+\tstatus = \"okay\";\n+};\n+\n+&i2c4 {\n+\tstatus = \"okay\";\n+};\n+\n+&i2c5 {\n+\tstatus = \"okay\";\n+};\n+\n+&i2c6 {\n+\tstatus = \"okay\";\n+};\n+\n+&i2c7 {\n+\tstatus = \"okay\";\n+};\n+\n+&sata {\n+\tstatus = \"okay\";\n+};\n+\n+&serial0 {\n+\tstatus = \"okay\";\n+};\n+\n+&serial1 {\n+\tstatus = \"okay\";\n+};\n+\n+&usb1 {\n+\tstatus = \"okay\";\n+};\n+\n+&usb2 {\n+\tstatus = \"okay\";\n+};\ndiff --git a/board/freescale/ls1028a/Kconfig b/board/freescale/ls1028a/Kconfig\nindex bbfd4dd..ca22c92 100644\n--- a/board/freescale/ls1028a/Kconfig\n+++ b/board/freescale/ls1028a/Kconfig\n@@ -1,3 +1,42 @@\n+if TARGET_LS1028AQDS\n+\n+config SYS_BOARD\n+\tdefault \"ls1028a\"\n+\n+config SYS_VENDOR\n+\tdefault \"freescale\"\n+\n+config SYS_SOC\n+\tdefault \"fsl-layerscape\"\n+\n+config SYS_CONFIG_NAME\n+\tdefault \"ls1028aqds\"\n+\n+config EMMC_BOOT\n+\tbool \"Support for booting from EMMC\"\n+\tdefault n\n+\n+config SYS_TEXT_BASE\n+\tdefault 0x96000000 if SD_BOOT || EMMC_BOOT\n+\tdefault 0x82000000 if TFABOOT\n+\tdefault 0x20100000\n+\n+if FSL_LS_PPA\n+config SYS_LS_PPA_FW_ADDR\n+\thex \"PPA Firmware Addr\"\n+\tdefault 0x20400000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1028A\n+\tdefault 0x400000 if SYS_LS_PPA_FW_IN_MMC && ARCH_LS1028A\n+if CHAIN_OF_TRUST\n+config SYS_LS_PPA_ESBC_ADDR\n+\thex \"PPA header Addr\"\n+\tdefault 0x20600000 if SYS_LS_PPA_FW_IN_XIP && ARCH_LS1028A\n+endif\n+endif\n+\n+source \"board/freescale/common/Kconfig\"\n+\n+endif\n+\n if TARGET_LS1028ARDB\n \n config SYS_BOARD\ndiff --git a/board/freescale/ls1028a/MAINTAINERS b/board/freescale/ls1028a/MAINTAINERS\nindex 135454c..6f1a95e 100644\n--- a/board/freescale/ls1028a/MAINTAINERS\n+++ b/board/freescale/ls1028a/MAINTAINERS\n@@ -1,3 +1,14 @@\n+LS1028AQDS BOARD\n+M:\tSudhanshu Gupta <sudhanshu.gupta@nxp.com>\n+M:\tRai Harninder <harninder.rai@nxp.com>\n+M:\tRajesh Bhagat <rajesh.bhagat@nxp.com>\n+M:\tTang Yuantian <andy.tang@nxp.com>\n+S:\tMaintained\n+F:\tboard/freescale/ls1028a/\n+F:\tinclude/configs/ls1028a_common.h\n+F:\tinclude/configs/ls1028aqds.h\n+F:\tconfigs/ls1028aqds_tfa_defconfig\n+\n LS1028ARDB BOARD\n M:\tSudhanshu Gupta <sudhanshu.gupta@nxp.com>\n M:\tRai Harninder <harninder.rai@nxp.com>\ndiff --git a/board/freescale/ls1028a/README b/board/freescale/ls1028a/README\nindex 94a390c..323881f 100644\n--- a/board/freescale/ls1028a/README\n+++ b/board/freescale/ls1028a/README\n@@ -77,3 +77,88 @@ Serial audio interface(SAI)\n - Audio codec SGTL5000 provides headphone and audio LINEOUT for\n stereo speakers\n - IEEE1588 interface to support audio on SAI4\n+\n+QDS Default Switch Settings (1: ON; 0: OFF)\n+-------------------------------------------\n+For SD Boot\n+SW1 : 1000_0000\n+SW2 : 1110_0110\n+SW3 : 0000_0010\n+SW4 : 0000_0000\n+SW5 : 0000_0000\n+SW6 : 0000_0000\n+SW7 : 1111_0011\n+SW8 : 1110_0000\n+SW9 : 1000_0001\n+SW10: 1110_0000\n+\n+For XSPI Boot\n+SW1 : 1111_0000\n+SW2 : 0000_0110\n+SW3 : 0000_0010\n+SW4 : 0000_0000\n+SW5 : 0110_0000\n+SW6 : 0101_0000\n+SW7 : 1111_0011\n+SW8 : 1110_0000\n+SW9 : 1000_0000\n+SW10: 1110_0000\n+\n+LS1028AQDS board Overview\n+-------------------------\n+Processor\n+ Two Arm Cortex- A72 processor cores:\n+ - Based on 64-bit ARMv8 architecture\n+ - Up to 1.3 GHz operation\n+ - Single-threaded cores with 48 KB L1 instruction cache and 32 KB L1\n+ data cache\n+ - Arranged as a single cluster of two cores sharing a single 1 MB L2\n+ cache\n+DDR memory\n+ - Supports data rates of up to 1.6 GT/s for both, DDR4 and DDR3L\n+ - Supports a single- or dual-ranked SODIMM or UDIMM connector\n+ - 32-bit data and 4-bit ECC\n+ - Supports x8/x16 devices\n+ - Supports ECC error detection and correction\n+ - 1.35 V or 1.2 V DDR power supply, with automatic tracking of VTT, to\n+ all devices in case of DDR3L or DDR4, respectively. Power can\n+ switch to 1.35 V or 1.2 V, based on the switch settings for DDR3L or\n+ DDR4 devices, respectively\n+SerDes (Serializer/Deserializer)\n+ - Four-lane (0-3) SerDes:\n+ - Lane 0: supports PCIe Gen1/2/3 with x1, x2, and x4 operation, 10\n+ Gbit SXGMII, 1 Gbit SGMII\n+ - Lane 1: supports PCIe Gen1/2/3 with x1, x2, and x4 operation, 1 Gbit\n+ SGMII, 10 Gbit QXGMII, 5 Gbit QSGMII, 1 Gbit SGMII\n+ - Lane 2: supports PCIe Gen1/2/3 with x1, x2, and x4 operation, 1 Gbit\n+ SGMII\n+ - Lane 3: supports PCIe Gen1/2/3 with x1, x2, and x4 operation, 1 Gbit\n+ SGMII, SATA 2.0/3.0\n+ - Four slots on SerDes lanes support PCIe Gen1/2/3, 1 Gbit SGMII\n+ add-in cards\n+ - Lane 1 connects to a 2x10 connector with SFP+ through a retimer;\n+ lane 2 (TX lines) connects to an SMA connector\n+ Lane 3 connects to 1x7 header to support SATA devices\n+eSDHC\n+ - eSDHC1, eSDHC2\n+SPI\n+ - SPI1 and SPI2 support three onboard SPI flash memory devices:\n+ 512 Mbit high-speed flash (with speed of up to 108/54 MHz)\n+ memory for storage\n+ 4 Mbit low-speed flash memory (with speed of up to 40 MHz)\n+ 64 Mbit high-speed flash memory (with speed of up to 104/80\n+ MHz)\n+ - SPI3 supports one onboard 64 Mbit SPI flash memory (with speed of\n+ up to 104/80 MHz)\n+ - All memories operate at 1.8 V\n+ - A header is provided on SPI1 to test SPI slave mode\n+I2C\n+ - LS1028A supports eight I2C controllers\n+Serial audio interface(SAI)\n+ Two SAI ports with audio codec SGTL5000:\n+ - Include stereo LINEIN with support for external analog input\n+ - Provide headphone and line output\n+Display\n+ - DisplayPort connector to connect the DP data to a 4K display device\n+ (computer monitor)\n+ - eDP connector to connect the DP data to a 4K display panel\ndiff --git a/board/freescale/ls1028a/ls1028a.c b/board/freescale/ls1028a/ls1028a.c\nindex e3666c3..e5de4eb 100644\n--- a/board/freescale/ls1028a/ls1028a.c\n+++ b/board/freescale/ls1028a/ls1028a.c\n@@ -27,6 +27,35 @@\n \n DECLARE_GLOBAL_DATA_PTR;\n \n+int config_board_mux(void)\n+{\n+#if defined(CONFIG_TARGET_LS1028AQDS) && defined(CONFIG_FSL_QIXIS)\n+\tu8 reg;\n+\n+\treg = QIXIS_READ(brdcfg[13]);\n+\t/* Field| Function\n+\t * 7-6 | Controls I2C3 routing (net CFG_MUX_I2C3):\n+\t * I2C3 | 10= Routes {SCL, SDA} to CAN1 transceiver as {TX, RX}.\n+\t * 5-4 | Controls I2C4 routing (net CFG_MUX_I2C4):\n+\t * I2C4 |11= Routes {SCL, SDA} to CAN2 transceiver as {TX, RX}.\n+\t */\n+\treg &= ~(0xf0);\n+\treg |= 0xb0;\n+\tQIXIS_WRITE(brdcfg[13], reg);\n+\n+\treg = QIXIS_READ(brdcfg[15]);\n+\t/* Field| Function\n+\t * 7 | Controls the CAN1 transceiver (net CFG_CAN1_STBY):\n+\t * CAN1 | 0= CAN #1 transceiver enabled\n+\t * 6 | Controls the CAN2 transceiver (net CFG_CAN2_STBY):\n+\t * CAN2 | 0= CAN #2 transceiver enabled\n+\t */\n+\treg &= ~(0xc0);\n+\tQIXIS_WRITE(brdcfg[15], reg);\n+#endif\n+\treturn 0;\n+}\n+\n int board_init(void)\n {\n #ifdef CONFIG_ENV_IS_NOWHERE\n@@ -54,6 +83,15 @@ int board_eth_init(bd_t *bis)\n \treturn pci_eth_init(bis);\n }\n \n+#if defined(CONFIG_ARCH_MISC_INIT)\n+int arch_misc_init(void)\n+{\n+\tconfig_board_mux();\n+\n+\treturn 0;\n+}\n+#endif\n+\n int board_early_init_f(void)\n {\n #ifdef CONFIG_SYS_I2C_EARLY_INIT\ndiff --git a/configs/ls1028aqds_tfa_defconfig b/configs/ls1028aqds_tfa_defconfig\nnew file mode 100644\nindex 0000000..2a592a0\n--- /dev/null\n+++ b/configs/ls1028aqds_tfa_defconfig\n@@ -0,0 +1,61 @@\n+CONFIG_ARM=y\n+CONFIG_TARGET_LS1028AQDS=y\n+CONFIG_SYS_FSL_SDHC_CLK_DIV=1\n+CONFIG_TFABOOT=y\n+CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y\n+CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y\n+CONFIG_AHCI=y\n+CONFIG_DISTRO_DEFAULTS=y\n+CONFIG_NR_DRAM_BANKS=2\n+# CONFIG_SYS_MALLOC_F is not set\n+CONFIG_FIT_VERBOSE=y\n+CONFIG_OF_BOARD_SETUP=y\n+CONFIG_OF_STDOUT_VIA_ALIAS=y\n+CONFIG_BOOTDELAY=10\n+CONFIG_USE_BOOTARGS=y\n+CONFIG_BOOTARGS=\"console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x2000000 default_hugepagesz=2m hugepagesz=2m hugepages=256 video=1920x1080-32@60 cma=256M\"\n+CONFIG_CMD_GREPENV=y\n+CONFIG_CMD_GPT=y\n+CONFIG_CMD_I2C=y\n+CONFIG_CMD_MMC=y\n+CONFIG_CMD_PCI=y\n+CONFIG_CMD_SF=y\n+CONFIG_CMD_USB=y\n+# CONFIG_CMD_SETEXPR is not set\n+CONFIG_CMD_CACHE=y\n+CONFIG_OF_CONTROL=y\n+CONFIG_DEFAULT_DEVICE_TREE=\"fsl-ls1028a-qds\"\n+CONFIG_ENV_IS_IN_MMC=y\n+CONFIG_ENV_IS_IN_SPI_FLASH=y\n+CONFIG_NET_RANDOM_ETHADDR=y\n+CONFIG_NETCONSOLE=y\n+CONFIG_DM=y\n+CONFIG_SCSI_AHCI=y\n+CONFIG_SATA_CEVA=y\n+CONFIG_FSL_CAAM=y\n+CONFIG_DM_MMC=y\n+CONFIG_DM_SPI_FLASH=y\n+CONFIG_SPI_FLASH=y\n+CONFIG_SPI_FLASH_SPANSION=y\n+CONFIG_SPI_FLASH_STMICRO=y\n+# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set\n+CONFIG_PHYLIB=y\n+CONFIG_PHY_ATHEROS=y\n+CONFIG_DM_ETH=y\n+CONFIG_PHY_GIGE=y\n+CONFIG_E1000=y\n+CONFIG_PCI=y\n+CONFIG_DM_PCI=y\n+CONFIG_DM_PCI_COMPAT=y\n+CONFIG_PCIE_LAYERSCAPE=y\n+CONFIG_SCSI=y\n+CONFIG_DM_SCSI=y\n+CONFIG_SYS_NS16550=y\n+CONFIG_SPI=y\n+CONFIG_DM_SPI=y\n+CONFIG_FSL_DSPI=y\n+CONFIG_USB=y\n+CONFIG_DM_USB=y\n+CONFIG_USB_XHCI_HCD=y\n+CONFIG_USB_XHCI_DWC3=y\n+CONFIG_EFI_LOADER_BOUNCE_BUFFER=y\ndiff --git a/include/configs/ls1028aqds.h b/include/configs/ls1028aqds.h\nnew file mode 100644\nindex 0000000..8443ea4\n--- /dev/null\n+++ b/include/configs/ls1028aqds.h\n@@ -0,0 +1,167 @@\n+/* SPDX-License-Identifier: GPL-2.0+ */\n+/*\n+ * Copyright 2019 NXP\n+ */\n+\n+#ifndef __LS1028A_QDS_H\n+#define __LS1028A_QDS_H\n+\n+#include \"ls1028a_common.h\"\n+\n+#define CONFIG_SYS_CLK_FREQ\t\t100000000\n+#define CONFIG_DDR_CLK_FREQ\t\t100000000\n+#define COUNTER_FREQUENCY_REAL\t\t(CONFIG_SYS_CLK_FREQ / 4)\n+\n+/* DDR */\n+#define CONFIG_DIMM_SLOTS_PER_CTLR\t\t2\n+\n+#define CONFIG_QIXIS_I2C_ACCESS\n+#define CONFIG_SYS_I2C_EARLY_INIT\n+\n+/*\n+ * QIXIS Definitions\n+ */\n+#define CONFIG_FSL_QIXIS\n+\n+#ifdef CONFIG_FSL_QIXIS\n+#define QIXIS_BASE\t\t\t0x7fb00000\n+#define QIXIS_BASE_PHYS\t\t\tQIXIS_BASE\n+#define CONFIG_SYS_I2C_FPGA_ADDR\t0x66\n+#define QIXIS_LBMAP_SWITCH\t\t1\n+#define QIXIS_LBMAP_MASK\t\t0x0f\n+#define QIXIS_LBMAP_SHIFT\t\t5\n+#define QIXIS_LBMAP_DFLTBANK\t\t0x00\n+#define QIXIS_LBMAP_ALTBANK\t\t0x00\n+#define QIXIS_LBMAP_SD\t\t\t0x00\n+#define QIXIS_LBMAP_EMMC\t\t0x00\n+#define QIXIS_LBMAP_QSPI\t\t0x00\n+#define QIXIS_RCW_SRC_SD\t\t0x8\n+#define QIXIS_RCW_SRC_EMMC\t\t0x9\n+#define QIXIS_RCW_SRC_QSPI\t\t0xf\n+#define QIXIS_RST_CTL_RESET\t\t0x31\n+#define QIXIS_RCFG_CTL_RECONFIG_IDLE\t0x20\n+#define QIXIS_RCFG_CTL_RECONFIG_START\t0x21\n+#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE\t0x08\n+#define QIXIS_RST_FORCE_MEM\t\t0x01\n+\n+#define CONFIG_SYS_FPGA_CSPR_EXT\t(0x0)\n+#define CONFIG_SYS_FPGA_CSPR\t\t(CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \\\n+\t\t\t\t\tCSPR_PORT_SIZE_8 | \\\n+\t\t\t\t\tCSPR_MSEL_GPCM | \\\n+\t\t\t\t\tCSPR_V)\n+#define CONFIG_SYS_FPGA_AMASK\t\tIFC_AMASK(64 * 1024)\n+#define CONFIG_SYS_FPGA_CSOR\t\t(CSOR_NOR_ADM_SHIFT(4) | \\\n+\t\t\t\t\tCSOR_NOR_NOR_MODE_AVD_NOR | \\\n+\t\t\t\t\tCSOR_NOR_TRHZ_80)\n+#endif\n+\n+/* RTC */\n+#define CONFIG_SYS_RTC_BUS_NUM 1\n+#define I2C_MUX_CH_RTC 0xB\n+\n+/* Store environment at top of flash */\n+#define CONFIG_ENV_SIZE\t\t\t0x2000\n+\n+#ifdef CONFIG_SPL_BUILD\n+#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE\n+#else\n+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE\n+#endif\n+\n+/* SATA */\n+#define CONFIG_SCSI_AHCI_PLAT\n+\n+#define CONFIG_SYS_SATA1\t\t\tAHCI_BASE_ADDR1\n+#ifndef CONFIG_CMD_EXT2\n+#define CONFIG_CMD_EXT2\n+#endif\n+#define CONFIG_SYS_SCSI_MAX_SCSI_ID\t\t1\n+#define CONFIG_SYS_SCSI_MAX_LUN\t\t\t1\n+#define CONFIG_SYS_SCSI_MAX_DEVICE\t\t(CONFIG_SYS_SCSI_MAX_SCSI_ID * \\\n+\t\t\t\t\t\tCONFIG_SYS_SCSI_MAX_LUN)\n+/* DSPI */\n+#ifdef CONFIG_FSL_DSPI\n+#define CONFIG_SPI_FLASH_SST\n+#define CONFIG_SPI_FLASH_EON\n+#endif\n+\n+#ifndef SPL_NO_ENV\n+#undef CONFIG_EXTRA_ENV_SETTINGS\n+#define CONFIG_EXTRA_ENV_SETTINGS \\\n+\t\"board=ls1028aqds\\0\" \\\n+\t\"hwconfig=fsl_ddr:bank_intlv=auto\\0\" \\\n+\t\"ramdisk_addr=0x800000\\0\" \\\n+\t\"ramdisk_size=0x2000000\\0\" \\\n+\t\"fdt_high=0xffffffffffffffff\\0\" \\\n+\t\"initrd_high=0xffffffffffffffff\\0\" \\\n+\t\"fdt_addr=0x00f00000\\0\" \\\n+\t\"kernel_addr=0x01000000\\0\" \\\n+\t\"scriptaddr=0x80000000\\0\" \\\n+\t\"scripthdraddr=0x80080000\\0\" \\\n+\t\"fdtheader_addr_r=0x80100000\\0\" \\\n+\t\"kernelheader_addr_r=0x80200000\\0\" \\\n+\t\"load_addr=0xa0000000\\0\" \\\n+\t\"kernel_addr_r=0x81000000\\0\" \\\n+\t\"fdt_addr_r=0x90000000\\0\" \\\n+\t\"ramdisk_addr_r=0xa0000000\\0\" \\\n+\t\"kernel_start=0x1000000\\0\" \\\n+\t\"kernelheader_start=0x800000\\0\" \\\n+\t\"kernel_load=0xa0000000\\0\" \\\n+\t\"kernel_size=0x2800000\\0\" \\\n+\t\"kernelheader_size=0x40000\\0\" \\\n+\t\"kernel_addr_sd=0x8000\\0\" \\\n+\t\"kernel_size_sd=0x14000\\0\" \\\n+\t\"kernelhdr_addr_sd=0x4000\\0\" \\\n+\t\"kernelhdr_size_sd=0x10\\0\" \\\n+\t\"console=ttyS0,115200\\0\" \\\n+\t\"mtdparts=\" CONFIG_MTDPARTS_DEFAULT \"\\0\" \\\n+\tBOOTENV \\\n+\t\"boot_scripts=ls1028aqds_boot.scr\\0\" \\\n+\t\"boot_script_hdr=hdr_ls1028aqds_bs.out\\0\" \\\n+\t\"scan_dev_for_boot_part=\" \\\n+\t\t\"part list ${devtype} ${devnum} devplist; \" \\\n+\t\t\"env exists devplist || setenv devplist 1; \" \\\n+\t\t\"for distro_bootpart in ${devplist}; do \" \\\n+\t\t \"if fstype ${devtype} \" \\\n+\t\t\t\"${devnum}:${distro_bootpart} \" \\\n+\t\t\t\"bootfstype; then \" \\\n+\t\t\t\"run scan_dev_for_boot; \" \\\n+\t\t \"fi; \" \\\n+\t\t\"done\\0\" \\\n+\t\"scan_dev_for_boot=\" \\\n+\t\t\"echo Scanning ${devtype} \" \\\n+\t\t\t\t\"${devnum}:${distro_bootpart}...; \" \\\n+\t\t\"for prefix in ${boot_prefixes}; do \" \\\n+\t\t\t\"run scan_dev_for_scripts; \" \\\n+\t\t\"done;\" \\\n+\t\t\"\\0\" \\\n+\t\"boot_a_script=\" \\\n+\t\t\"load ${devtype} ${devnum}:${distro_bootpart} \" \\\n+\t\t\t\"${scriptaddr} ${prefix}${script}; \" \\\n+\t\t\"env exists secureboot && load ${devtype} \" \\\n+\t\t\t\"${devnum}:${distro_bootpart} \" \\\n+\t\t\t\"${scripthdraddr} ${prefix}${boot_script_hdr} \" \\\n+\t\t\t\"&& esbc_validate ${scripthdraddr};\" \\\n+\t\t\"source ${scriptaddr}\\0\" \\\n+\t\"sd_bootcmd=echo Trying load from SD ..;\" \\\n+\t\t\"mmcinfo; mmc read $load_addr \" \\\n+\t\t\"$kernel_addr_sd $kernel_size_sd && \" \\\n+\t\t\"env exists secureboot && mmc read $kernelheader_addr_r \" \\\n+\t\t\"$kernelhdr_addr_sd $kernelhdr_size_sd \" \\\n+\t\t\" && esbc_validate ${kernelheader_addr_r};\" \\\n+\t\t\"bootm $load_addr#$board\\0\" \\\n+\t\"sd_hdploadcmd=echo Trying load HDP firmware from SD..;\" \\\n+\t\t\"mmcinfo;mmc read $load_addr 0x4800 0x200 \" \\\n+\t\t\"&& hdp load $load_addr 0x2000\\0\" \\\n+\t\"emmc_bootcmd=echo Trying load from EMMC ..;\" \\\n+\t\t\"mmcinfo; mmc dev 1; mmc read $load_addr \" \\\n+\t\t\"$kernel_addr_sd $kernel_size_sd && \" \\\n+\t\t\"env exists secureboot && mmc read $kernelheader_addr_r \" \\\n+\t\t\"$kernelhdr_addr_sd $kernelhdr_size_sd \" \\\n+\t\t\" && esbc_validate ${kernelheader_addr_r};\"\t\\\n+\t\t\"bootm $load_addr#$board\\0\"\t\\\n+\t\"emmc_hdploadcmd=echo Trying load HDP firmware from EMMC..;\" \\\n+\t\t\"mmc dev 1;mmcinfo;mmc read $load_addr 0x4800 0x200 \" \\\n+\t\t\"&& hdp load $load_addr 0x2000\\0\"\n+#endif\n+#endif /* __LS1028A_QDS_H */\n", "prefixes": [ "U-Boot", "3/3", "v3" ] }