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GET /api/patches/1038967/?format=api
{ "id": 1038967, "url": "http://patchwork.ozlabs.org/api/patches/1038967/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20190208205101.12078-9-anirudh.venkataramanan@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20190208205101.12078-9-anirudh.venkataramanan@intel.com>", "list_archive_url": null, "date": "2019-02-08T20:50:55", "name": "[S12,08/14] ice: configure GLINT_ITR to always have an ITR gran of 2", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "2dd029d174c9d820e00d3f408d0bfed4a7eee69d", "submitter": { "id": 73601, "url": "http://patchwork.ozlabs.org/api/people/73601/?format=api", "name": "Anirudh Venkataramanan", "email": "anirudh.venkataramanan@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20190208205101.12078-9-anirudh.venkataramanan@intel.com/mbox/", "series": [ { "id": 90914, "url": "http://patchwork.ozlabs.org/api/series/90914/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=90914", "date": "2019-02-08T20:50:49", "name": "Bug fixes and minor feature updates for ice", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/90914/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1038967/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1038967/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=osuosl.org\n\t(client-ip=140.211.166.133; helo=hemlock.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=intel.com" ], "Received": [ "from hemlock.osuosl.org (smtp2.osuosl.org [140.211.166.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 43x6px6570z9sMp\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSat, 9 Feb 2019 07:53:45 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id D1EC785AC7;\n\tFri, 8 Feb 2019 20:53:34 +0000 (UTC)", "from hemlock.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id g2qsmq-TpbgX; Fri, 8 Feb 2019 20:53:18 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby hemlock.osuosl.org (Postfix) with ESMTP id 024B386361;\n\tFri, 8 Feb 2019 20:53:18 +0000 (UTC)", "from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138])\n\tby ash.osuosl.org (Postfix) with ESMTP id E5F741BF96B\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 8 Feb 2019 20:51:04 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby whitealder.osuosl.org (Postfix) with ESMTP id DD20C88062\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 8 Feb 2019 20:51:04 +0000 (UTC)", "from whitealder.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id Rb7cauw9nyi1 for <intel-wired-lan@lists.osuosl.org>;\n\tFri, 8 Feb 2019 20:51:03 +0000 (UTC)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby whitealder.osuosl.org (Postfix) with ESMTPS id 5AE8E87B3D\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tFri, 8 Feb 2019 20:51:03 +0000 (UTC)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n\tby orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t08 Feb 2019 12:51:02 -0800", "from shasta.jf.intel.com ([10.166.241.11])\n\tby fmsmga002.fm.intel.com with ESMTP; 08 Feb 2019 12:51:01 -0800" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.58,348,1544515200\"; d=\"scan'208\";a=\"141869792\"", "From": "Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Fri, 8 Feb 2019 12:50:55 -0800", "Message-Id": "<20190208205101.12078-9-anirudh.venkataramanan@intel.com>", "X-Mailer": "git-send-email 2.14.5", "In-Reply-To": "<20190208205101.12078-1-anirudh.venkataramanan@intel.com>", "References": "<20190208205101.12078-1-anirudh.venkataramanan@intel.com>", "Subject": "[Intel-wired-lan] [PATCH S12 08/14] ice: configure GLINT_ITR to\n\talways have an ITR gran of 2", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "From: Brett Creeley <brett.creeley@intel.com>\n\nInstead of hoping that our ITR granularity will be 2 usec program the\nGLINT_CTL register to make sure the ITR granularity is always 2 usecs.\n\nNow that we know what the ITR granularity will be get rid of the check\nin ice_probe() to verify our previous assumption.\n\nSigned-off-by: Brett Creeley <brett.creeley@intel.com>\nSigned-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>\n---\n drivers/net/ethernet/intel/ice/ice_hw_autogen.h | 10 ++++++++\n drivers/net/ethernet/intel/ice/ice_lib.c | 33 +++++++++++++++++++++++++\n drivers/net/ethernet/intel/ice/ice_main.c | 18 --------------\n drivers/net/ethernet/intel/ice/ice_txrx.h | 1 +\n 4 files changed, 44 insertions(+), 18 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/ice/ice_hw_autogen.h b/drivers/net/ethernet/intel/ice/ice_hw_autogen.h\nindex 6bf5cc064270..24255ff64ab0 100644\n--- a/drivers/net/ethernet/intel/ice/ice_hw_autogen.h\n+++ b/drivers/net/ethernet/intel/ice/ice_hw_autogen.h\n@@ -106,6 +106,16 @@\n #define VPGEN_VFRTRIG_VFSWR_M\t\t\tBIT(0)\n #define PFHMC_ERRORDATA\t\t\t\t0x00520500\n #define PFHMC_ERRORINFO\t\t\t\t0x00520400\n+#define GLINT_CTL\t\t\t\t0x0016CC54\n+#define GLINT_CTL_DIS_AUTOMASK_M\t\tBIT(0)\n+#define GLINT_CTL_ITR_GRAN_200_S\t\t16\n+#define GLINT_CTL_ITR_GRAN_200_M\t\tICE_M(0xF, 16)\n+#define GLINT_CTL_ITR_GRAN_100_S\t\t20\n+#define GLINT_CTL_ITR_GRAN_100_M\t\tICE_M(0xF, 20)\n+#define GLINT_CTL_ITR_GRAN_50_S\t\t\t24\n+#define GLINT_CTL_ITR_GRAN_50_M\t\t\tICE_M(0xF, 24)\n+#define GLINT_CTL_ITR_GRAN_25_S\t\t\t28\n+#define GLINT_CTL_ITR_GRAN_25_M\t\t\tICE_M(0xF, 28)\n #define GLINT_DYN_CTL(_INT)\t\t\t(0x00160000 + ((_INT) * 4))\n #define GLINT_DYN_CTL_INTENA_M\t\t\tBIT(0)\n #define GLINT_DYN_CTL_CLEARPBA_M\t\tBIT(1)\ndiff --git a/drivers/net/ethernet/intel/ice/ice_lib.c b/drivers/net/ethernet/intel/ice/ice_lib.c\nindex 1418251b9275..40e9df15777b 100644\n--- a/drivers/net/ethernet/intel/ice/ice_lib.c\n+++ b/drivers/net/ethernet/intel/ice/ice_lib.c\n@@ -1738,6 +1738,37 @@ static u32 ice_intrl_usec_to_reg(u8 intrl, u8 gran)\n \treturn 0;\n }\n \n+/**\n+ * ice_cfg_itr_gran - set the ITR granularity to 2 usecs if not already set\n+ * @hw: board specific structure\n+ */\n+static void ice_cfg_itr_gran(struct ice_hw *hw)\n+{\n+\tu32 regval = rd32(hw, GLINT_CTL);\n+\n+\t/* no need to update global register if ITR gran is already set */\n+\tif (!(regval & GLINT_CTL_DIS_AUTOMASK_M) &&\n+\t (((regval & GLINT_CTL_ITR_GRAN_200_M) >>\n+\t GLINT_CTL_ITR_GRAN_200_S) == ICE_ITR_GRAN_US) &&\n+\t (((regval & GLINT_CTL_ITR_GRAN_100_M) >>\n+\t GLINT_CTL_ITR_GRAN_100_S) == ICE_ITR_GRAN_US) &&\n+\t (((regval & GLINT_CTL_ITR_GRAN_50_M) >>\n+\t GLINT_CTL_ITR_GRAN_50_S) == ICE_ITR_GRAN_US) &&\n+\t (((regval & GLINT_CTL_ITR_GRAN_25_M) >>\n+\t GLINT_CTL_ITR_GRAN_25_S) == ICE_ITR_GRAN_US))\n+\t\treturn;\n+\n+\tregval = ((ICE_ITR_GRAN_US << GLINT_CTL_ITR_GRAN_200_S) &\n+\t\t GLINT_CTL_ITR_GRAN_200_M) |\n+\t\t ((ICE_ITR_GRAN_US << GLINT_CTL_ITR_GRAN_100_S) &\n+\t\t GLINT_CTL_ITR_GRAN_100_M) |\n+\t\t ((ICE_ITR_GRAN_US << GLINT_CTL_ITR_GRAN_50_S) &\n+\t\t GLINT_CTL_ITR_GRAN_50_M) |\n+\t\t ((ICE_ITR_GRAN_US << GLINT_CTL_ITR_GRAN_25_S) &\n+\t\t GLINT_CTL_ITR_GRAN_25_M);\n+\twr32(hw, GLINT_CTL, regval);\n+}\n+\n /**\n * ice_cfg_itr - configure the initial interrupt throttle values\n * @hw: pointer to the HW structure\n@@ -1750,6 +1781,8 @@ static u32 ice_intrl_usec_to_reg(u8 intrl, u8 gran)\n static void\n ice_cfg_itr(struct ice_hw *hw, struct ice_q_vector *q_vector, u16 vector)\n {\n+\tice_cfg_itr_gran(hw);\n+\n \tif (q_vector->num_ring_rx) {\n \t\tstruct ice_ring_container *rc = &q_vector->rx;\n \ndiff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c\nindex f5ade04cb9de..23db0cda6655 100644\n--- a/drivers/net/ethernet/intel/ice/ice_main.c\n+++ b/drivers/net/ethernet/intel/ice/ice_main.c\n@@ -2032,23 +2032,6 @@ static int ice_init_interrupt_scheme(struct ice_pf *pf)\n \treturn 0;\n }\n \n-/**\n- * ice_verify_itr_gran - verify driver's assumption of ITR granularity\n- * @pf: pointer to the PF structure\n- *\n- * There is no error returned here because the driver will be able to handle a\n- * different ITR granularity, but interrupt moderation will not be accurate if\n- * the driver's assumptions are not verified. This assumption is made so we can\n- * use constants in the hot path instead of accessing structure members.\n- */\n-static void ice_verify_itr_gran(struct ice_pf *pf)\n-{\n-\tif (pf->hw.itr_gran != (ICE_ITR_GRAN_S << 1))\n-\t\tdev_warn(&pf->pdev->dev,\n-\t\t\t \"%d ITR granularity assumption is invalid, actual ITR granularity is %d. Interrupt moderation will be inaccurate!\\n\",\n-\t\t\t (ICE_ITR_GRAN_S << 1), pf->hw.itr_gran);\n-}\n-\n /**\n * ice_verify_cacheline_size - verify driver's assumption of 64 Byte cache lines\n * @pf: pointer to the PF structure\n@@ -2212,7 +2195,6 @@ static int ice_probe(struct pci_dev *pdev,\n \tmod_timer(&pf->serv_tmr, round_jiffies(jiffies + pf->serv_tmr_period));\n \n \tice_verify_cacheline_size(pf);\n-\tice_verify_itr_gran(pf);\n \n \treturn 0;\n \ndiff --git a/drivers/net/ethernet/intel/ice/ice_txrx.h b/drivers/net/ethernet/intel/ice/ice_txrx.h\nindex fc358ea81816..b7ff0ff82517 100644\n--- a/drivers/net/ethernet/intel/ice/ice_txrx.h\n+++ b/drivers/net/ethernet/intel/ice/ice_txrx.h\n@@ -125,6 +125,7 @@ enum ice_rx_dtype {\n #define ITR_IS_DYNAMIC(setting) (!!((setting) & ICE_ITR_DYNAMIC))\n #define ITR_TO_REG(setting)\t((setting) & ~ICE_ITR_DYNAMIC)\n #define ICE_ITR_GRAN_S\t\t1\t/* Assume ITR granularity is 2us */\n+#define ICE_ITR_GRAN_US\t\tBIT(ICE_ITR_GRAN_S)\n #define ICE_ITR_MASK\t\t0x1FFE\t/* ITR register value alignment mask */\n #define ITR_REG_ALIGN(setting)\t__ALIGN_MASK(setting, ~ICE_ITR_MASK)\n \n", "prefixes": [ "S12", "08/14" ] }