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GET /api/patches/1005614/?format=api
{ "id": 1005614, "url": "http://patchwork.ozlabs.org/api/patches/1005614/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20181129191507.12478-1-jeffrey.t.kirsher@intel.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20181129191507.12478-1-jeffrey.t.kirsher@intel.com>", "list_archive_url": null, "date": "2018-11-29T19:15:06", "name": "[net-next,1/2] ixgbe: register a mdiobus", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "e7336c43970ea85ac3dae91f8ff485b9dff31501", "submitter": { "id": 473, "url": "http://patchwork.ozlabs.org/api/people/473/?format=api", "name": "Kirsher, Jeffrey T", "email": "jeffrey.t.kirsher@intel.com" }, "delegate": { "id": 68, "url": "http://patchwork.ozlabs.org/api/users/68/?format=api", "username": "jtkirshe", "first_name": "Jeff", "last_name": "Kirsher", "email": "jeffrey.t.kirsher@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20181129191507.12478-1-jeffrey.t.kirsher@intel.com/mbox/", "series": [ { "id": 78890, "url": "http://patchwork.ozlabs.org/api/series/78890/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=78890", "date": "2018-11-29T19:15:07", "name": "[net-next,1/2] ixgbe: register a mdiobus", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/78890/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/1005614/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/1005614/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@bilbo.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=osuosl.org\n\t(client-ip=140.211.166.136; helo=silver.osuosl.org;\n\tenvelope-from=intel-wired-lan-bounces@osuosl.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org;\n\tdmarc=fail (p=none dis=none) header.from=intel.com" ], "Received": [ "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 435S035cvfz9s9G\n\tfor <incoming@patchwork.ozlabs.org>;\n\tFri, 30 Nov 2018 06:15:15 +1100 (AEDT)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id DE2A822844;\n\tThu, 29 Nov 2018 19:15:13 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id byELrICPKJ-F; Thu, 29 Nov 2018 19:15:12 +0000 (UTC)", "from ash.osuosl.org (ash.osuosl.org [140.211.166.34])\n\tby silver.osuosl.org (Postfix) with ESMTP id 8C8E02F7B4;\n\tThu, 29 Nov 2018 19:15:12 +0000 (UTC)", "from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136])\n\tby ash.osuosl.org (Postfix) with ESMTP id 6FDA31C2E33\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 29 Nov 2018 19:15:11 +0000 (UTC)", "from localhost (localhost [127.0.0.1])\n\tby silver.osuosl.org (Postfix) with ESMTP id 6D5022F7B4\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 29 Nov 2018 19:15:11 +0000 (UTC)", "from silver.osuosl.org ([127.0.0.1])\n\tby localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024)\n\twith ESMTP id Lcy9vUZifuMT for <intel-wired-lan@lists.osuosl.org>;\n\tThu, 29 Nov 2018 19:15:10 +0000 (UTC)", "from mga12.intel.com (mga12.intel.com [192.55.52.136])\n\tby silver.osuosl.org (Postfix) with ESMTPS id 914BF22844\n\tfor <intel-wired-lan@lists.osuosl.org>;\n\tThu, 29 Nov 2018 19:15:10 +0000 (UTC)", "from fmsmga001.fm.intel.com ([10.253.24.23])\n\tby fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t29 Nov 2018 11:15:10 -0800", "from mrfrick-mobl1.amr.corp.intel.com (HELO\n\tjtkirshe-MOBL1.amr.corp.intel.com) ([10.251.13.151])\n\tby fmsmga001.fm.intel.com with ESMTP; 29 Nov 2018 11:15:09 -0800" ], "X-Virus-Scanned": [ "amavisd-new at osuosl.org", "amavisd-new at osuosl.org" ], "X-Greylist": "domain auto-whitelisted by SQLgrey-1.7.6", "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.56,295,1539673200\"; d=\"scan'208\";a=\"119039996\"", "From": "Jeff Kirsher <jeffrey.t.kirsher@intel.com>", "To": "intel-wired-lan@lists.osuosl.org", "Date": "Thu, 29 Nov 2018 11:15:06 -0800", "Message-Id": "<20181129191507.12478-1-jeffrey.t.kirsher@intel.com>", "X-Mailer": "git-send-email 2.19.2", "MIME-Version": "1.0", "Subject": "[Intel-wired-lan] [net-next,1/2] ixgbe: register a mdiobus", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n\t<intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>, \n\t<mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Cc": "Steve Douthit <stephend@silicom-usa.com>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "From: Steve Douthit <stephend@silicom-usa.com>\n\nMost dsa devices expect a 'struct mii_bus' pointer to talk to switches\nvia the MII interface.\n\nSigned-off-by: Stephen Douthit <stephend@silicom-usa.com>\n---\n drivers/net/ethernet/intel/ixgbe/ixgbe.h | 2 +\n drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 6 +\n drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c | 192 ++++++++++++++++++\n drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h | 2 +\n 4 files changed, 202 insertions(+)", "diff": "diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe.h b/drivers/net/ethernet/intel/ixgbe/ixgbe.h\nindex 143bdd5ee2a0..08d85e336bd4 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe.h\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe.h\n@@ -12,6 +12,7 @@\n #include <linux/aer.h>\n #include <linux/if_vlan.h>\n #include <linux/jiffies.h>\n+#include <linux/phy.h>\n \n #include <linux/timecounter.h>\n #include <linux/net_tstamp.h>\n@@ -561,6 +562,7 @@ struct ixgbe_adapter {\n \tstruct net_device *netdev;\n \tstruct bpf_prog *xdp_prog;\n \tstruct pci_dev *pdev;\n+\tstruct mii_bus *mii_bus;\n \n \tunsigned long state;\n \ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\nindex 49a4ea38eb07..c2141fe35685 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\n@@ -39,6 +39,7 @@\n #include \"ixgbe.h\"\n #include \"ixgbe_common.h\"\n #include \"ixgbe_dcb_82599.h\"\n+#include \"ixgbe_phy.h\"\n #include \"ixgbe_sriov.h\"\n #include \"ixgbe_model.h\"\n #include \"ixgbe_txrx_common.h\"\n@@ -11120,6 +11121,9 @@ static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)\n \t\t\tIXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,\n \t\t\ttrue);\n \n+\tif (ixgbe_mii_bus_init(hw))\n+\t\te_err(probe, \"failed to create mii_bus\\n\");\n+\n \treturn 0;\n \n err_register:\n@@ -11170,6 +11174,8 @@ static void ixgbe_remove(struct pci_dev *pdev)\n \tset_bit(__IXGBE_REMOVING, &adapter->state);\n \tcancel_work_sync(&adapter->service_task);\n \n+\tif (adapter->mii_bus)\n+\t\tmdiobus_unregister(adapter->mii_bus);\n \n #ifdef CONFIG_IXGBE_DCA\n \tif (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {\ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c\nindex 919a7af84b42..75db340963ad 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.c\n@@ -658,6 +658,198 @@ s32 ixgbe_write_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,\n \treturn status;\n }\n \n+/**\n+ * ixgbe_msca - Write the command register and poll for completion/timeout\n+ * @hw: pointer to hardware structure\n+ * @cmd: command register value to write\n+ **/\n+static s32 ixgbe_msca_cmd(struct ixgbe_hw *hw, u32 cmd)\n+{\n+\tu32 i;\n+\n+\tIXGBE_WRITE_REG(hw, IXGBE_MSCA, cmd);\n+\n+\tfor (i = 0; i < IXGBE_MDIO_COMMAND_TIMEOUT; i++) {\n+\t\tudelay(10);\n+\t\tcmd = IXGBE_READ_REG(hw, IXGBE_MSCA);\n+\t\tif (!(cmd & IXGBE_MSCA_MDI_COMMAND))\n+\t\t\treturn 0;\n+\t}\n+\n+\treturn -ETIMEDOUT;\n+}\n+\n+/**\n+ * ixgbe_msca - Use device_id to figure out if MDIO bus is shared between MACs.\n+ * The embedded x550(s) in the C3000 line of SoCs only have a single mii_bus\n+ * shared between all MACs, and that introduces some new mask flags that need\n+ * to be passed to the *_swfw_sync callbacks.\n+ * @hw: pointer to hardware structure\n+ **/\n+static bool ixgbe_is_shared_mii(struct ixgbe_hw *hw)\n+{\n+\tswitch (hw->device_id) {\n+\tcase IXGBE_DEV_ID_X550EM_A_KR:\n+\tcase IXGBE_DEV_ID_X550EM_A_KR_L:\n+\tcase IXGBE_DEV_ID_X550EM_A_SFP_N:\n+\tcase IXGBE_DEV_ID_X550EM_A_SGMII:\n+\tcase IXGBE_DEV_ID_X550EM_A_SGMII_L:\n+\tcase IXGBE_DEV_ID_X550EM_A_10G_T:\n+\tcase IXGBE_DEV_ID_X550EM_A_SFP:\n+\tcase IXGBE_DEV_ID_X550EM_A_1G_T:\n+\tcase IXGBE_DEV_ID_X550EM_A_1G_T_L:\n+\t\treturn true;\n+\t}\n+\n+\treturn false;\n+}\n+\n+/**\n+ * ixgbe_mii_bus_read - Read a clause 22/45 register\n+ * @hw: pointer to hardware structure\n+ * @addr: address\n+ * @regnum: register number\n+ **/\n+static s32 ixgbe_mii_bus_read(struct mii_bus *bus, int addr, int regnum)\n+{\n+\tstruct ixgbe_adapter *adapter = (struct ixgbe_adapter *)bus->priv;\n+\tstruct ixgbe_hw *hw = &adapter->hw;\n+\tu32 hwaddr, cmd, gssr = hw->phy.phy_semaphore_mask;\n+\ts32 data;\n+\n+\tif (ixgbe_is_shared_mii(hw)) {\n+\t\tgssr |= IXGBE_GSSR_TOKEN_SM;\n+\t\tif (hw->bus.lan_id)\n+\t\t\tgssr |= IXGBE_GSSR_PHY1_SM;\n+\t\telse\n+\t\t\tgssr |= IXGBE_GSSR_PHY0_SM;\n+\t}\n+\n+\tif (hw->mac.ops.acquire_swfw_sync(hw, gssr))\n+\t\treturn -EBUSY;\n+\n+\thwaddr = addr << IXGBE_MSCA_PHY_ADDR_SHIFT;\n+\tif (regnum & MII_ADDR_C45) {\n+\t\thwaddr |= regnum & GENMASK(21, 0);\n+\t\tcmd = hwaddr | IXGBE_MSCA_ADDR_CYCLE | IXGBE_MSCA_MDI_COMMAND;\n+\t} else {\n+\t\thwaddr |= (regnum & GENMASK(5, 0)) << IXGBE_MSCA_DEV_TYPE_SHIFT;\n+\t\tcmd = hwaddr | IXGBE_MSCA_OLD_PROTOCOL |\n+\t\t\tIXGBE_MSCA_READ_AUTOINC | IXGBE_MSCA_MDI_COMMAND;\n+\t}\n+\n+\tdata = ixgbe_msca_cmd(hw, cmd);\n+\tif (data < 0)\n+\t\tgoto mii_bus_read_done;\n+\n+\t/* For a clause 45 access the address cycle just completed, we still\n+\t * need to do the read command, otherwise just get the data\n+\t */\n+\tif (!(regnum & MII_ADDR_C45))\n+\t\tgoto do_mii_bus_read;\n+\n+\tcmd = hwaddr | IXGBE_MSCA_READ | IXGBE_MSCA_MDI_COMMAND;\n+\tdata = ixgbe_msca_cmd(hw, cmd);\n+\tif (data < 0)\n+\t\tgoto mii_bus_read_done;\n+\n+do_mii_bus_read:\n+\tdata = IXGBE_READ_REG(hw, IXGBE_MSRWD);\n+\tdata = (data >> IXGBE_MSRWD_READ_DATA_SHIFT) & GENMASK(16, 0);\n+\n+mii_bus_read_done:\n+\thw->mac.ops.release_swfw_sync(hw, gssr);\n+\treturn data;\n+}\n+\n+/**\n+ * ixgbe_mii_bus_write - Write a clause 22/45 register\n+ * @hw: pointer to hardware structure\n+ * @addr: address\n+ * @regnum: register number\n+ * @val: value to write\n+ **/\n+static s32 ixgbe_mii_bus_write(struct mii_bus *bus, int addr, int regnum,\n+\t\t\t u16 val)\n+{\n+\tstruct ixgbe_adapter *adapter = (struct ixgbe_adapter *)bus->priv;\n+\tstruct ixgbe_hw *hw = &adapter->hw;\n+\tu32 hwaddr, cmd, gssr = hw->phy.phy_semaphore_mask;\n+\ts32 err;\n+\n+\tif (ixgbe_is_shared_mii(hw)) {\n+\t\tgssr |= IXGBE_GSSR_TOKEN_SM;\n+\t\tif (hw->bus.lan_id)\n+\t\t\tgssr |= IXGBE_GSSR_PHY1_SM;\n+\t\telse\n+\t\t\tgssr |= IXGBE_GSSR_PHY0_SM;\n+\t}\n+\n+\tif (hw->mac.ops.acquire_swfw_sync(hw, gssr))\n+\t\treturn -EBUSY;\n+\n+\tIXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)val);\n+\n+\thwaddr = addr << IXGBE_MSCA_PHY_ADDR_SHIFT;\n+\tif (regnum & MII_ADDR_C45) {\n+\t\thwaddr |= regnum & GENMASK(21, 0);\n+\t\tcmd = hwaddr | IXGBE_MSCA_ADDR_CYCLE | IXGBE_MSCA_MDI_COMMAND;\n+\t} else {\n+\t\thwaddr |= (regnum & GENMASK(5, 0)) << IXGBE_MSCA_DEV_TYPE_SHIFT;\n+\t\tcmd = hwaddr | IXGBE_MSCA_OLD_PROTOCOL | IXGBE_MSCA_WRITE |\n+\t\t\tIXGBE_MSCA_MDI_COMMAND;\n+\t}\n+\n+\t/* For clause 45 this is an address cycle, for clause 22 this is the\n+\t * entire transaction\n+\t */\n+\terr = ixgbe_msca_cmd(hw, cmd);\n+\tif (err < 0 || !(regnum & MII_ADDR_C45))\n+\t\tgoto mii_bus_write_done;\n+\n+\tcmd = hwaddr | IXGBE_MSCA_WRITE | IXGBE_MSCA_MDI_COMMAND;\n+\terr = ixgbe_msca_cmd(hw, cmd);\n+\n+mii_bus_write_done:\n+\thw->mac.ops.release_swfw_sync(hw, gssr);\n+\treturn err;\n+}\n+\n+/**\n+ * ixgbe_mii_bus_init - mii_bus structure setup\n+ * @hw: pointer to hardware structure\n+ *\n+ * Returns 0 on success, negative on failure\n+ *\n+ * ixgbe_mii_bus_init initializes a mii_bus structure in adapter\n+ **/\n+s32 ixgbe_mii_bus_init(struct ixgbe_hw *hw)\n+{\n+\tstruct ixgbe_adapter *adapter = hw->back;\n+\tstruct pci_dev *pdev = adapter->pdev;\n+\tstruct mii_bus *bus = adapter->mii_bus;\n+\tstruct device *dev = &adapter->netdev->dev;\n+\n+\tadapter->mii_bus = devm_mdiobus_alloc(dev);\n+\tif (!adapter->mii_bus)\n+\t\treturn -ENOMEM;\n+\n+\tbus = adapter->mii_bus;\n+\n+\t/* Use the position of the device in the PCI hierarchy as the id */\n+\tsnprintf(bus->id, MII_BUS_ID_SIZE, \"%s-mdio-%s\", ixgbe_driver_name,\n+\t\t pci_name(pdev->bus->self));\n+\n+\tbus->name = \"ixgbe-mdio\";\n+\tbus->read = &ixgbe_mii_bus_read;\n+\tbus->write = &ixgbe_mii_bus_write;\n+\tbus->priv = adapter;\n+\tbus->parent = dev;\n+\tbus->phy_mask = 0xffffffff;\n+\n+\treturn mdiobus_register(bus);\n+}\n+\n /**\n * ixgbe_setup_phy_link_generic - Set and restart autoneg\n * @hw: pointer to hardware structure\ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h\nindex 64e44e01c973..214b01085718 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_phy.h\n@@ -120,6 +120,8 @@\n /* SFP+ SFF-8472 Compliance code */\n #define IXGBE_SFF_SFF_8472_UNSUP 0x00\n \n+s32 ixgbe_mii_bus_init(struct ixgbe_hw *hw);\n+\n s32 ixgbe_identify_phy_generic(struct ixgbe_hw *hw);\n s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw);\n s32 ixgbe_read_phy_reg_generic(struct ixgbe_hw *hw, u32 reg_addr,\n", "prefixes": [ "net-next", "1/2" ] }