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    "msgid": "<20170927151527.25570-1-prasannatsmkumar@gmail.com>",
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    "date": "2017-09-27T15:15:23",
    "name": "[RFC,0/4] Add Ingenic X1000 SoC Support",
    "submitter": {
        "id": 69703,
        "url": "http://patchwork.ozlabs.org/api/people/69703/?format=api",
        "name": "PrasannaKumar Muralidharan",
        "email": "prasannatsmkumar@gmail.com"
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    "mbox": "http://patchwork.ozlabs.org/project/devicetree-bindings/cover/20170927151527.25570-1-prasannatsmkumar@gmail.com/mbox/",
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            "date": "2017-09-27T15:15:23",
            "name": "Add Ingenic X1000 SoC Support",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/5390/mbox/"
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    ],
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    "headers": {
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        "X-Received": "by 10.84.234.194 with SMTP id i2mr1524987plt.420.1506525347750; \n\tWed, 27 Sep 2017 08:15:47 -0700 (PDT)",
        "From": "PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>",
        "To": "robh+dt@kernel.org, mark.rutland@arm.com, ralf@linux-mips.org,\n\tmturquette@baylibre.com, sboyd@codeaurora.org,\n\tdevicetree@vger.kernel.org, linux-mips@linux-mips.org,\n\tlinux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tpaul@crapouillou.net, malat@debian.org, dom.peklo@gmail.com",
        "Cc": "PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>",
        "Subject": "[RFC 0/4] Add Ingenic X1000 SoC Support",
        "Date": "Wed, 27 Sep 2017 20:45:23 +0530",
        "Message-Id": "<20170927151527.25570-1-prasannatsmkumar@gmail.com>",
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        "List-ID": "<devicetree.vger.kernel.org>",
        "X-Mailing-List": "devicetree@vger.kernel.org"
    },
    "content": "Add support for Ingenic X1000 SoC. This patch set provides enough bits\nto boot a kernel to an initramfs user space.\n\nI implemented this code during 2016. Boot stuck at \"calibrating delay\nloop ...\". Now I have fixed the issue by setting the correct irq. I do\nnot have access to this device anymore so could not test the fix.\nMarking this patch series as RFC as this needs to be tested.\n\nTest and feedback appreciated.\n\nThis series enables uart, timer and interrupt controller. As this is\nvery minimal a static elf binary should be used as init and should be\navailable in initramfs.\n\nPrasannaKumar Muralidharan (4):\n  dt-bindings: Add Ingenic X1000 SoC clock define\n  clk: Add Ingenic X1000 CGU driver\n  MIPS: Ingenic: Initial X1000 SoC support\n  MIPS: Ingenic: Add Halley2 development board support\n\n arch/mips/boot/dts/ingenic/Makefile    |   1 +\n arch/mips/boot/dts/ingenic/halley2.dts |  46 ++++++++\n arch/mips/boot/dts/ingenic/x1000.dtsi  |  93 +++++++++++++++\n arch/mips/configs/halley2_defconfig    |  61 ++++++++++\n arch/mips/jz4740/Kconfig               |  10 ++\n arch/mips/jz4740/time.c                |   2 +-\n drivers/clk/ingenic/Makefile           |   1 +\n drivers/clk/ingenic/x1000-cgu.c        | 203 +++++++++++++++++++++++++++++++++\n include/dt-bindings/clock/x1000-cgu.h  |  46 ++++++++\n 9 files changed, 462 insertions(+), 1 deletion(-)\n create mode 100644 arch/mips/boot/dts/ingenic/halley2.dts\n create mode 100644 arch/mips/boot/dts/ingenic/x1000.dtsi\n create mode 100644 arch/mips/configs/halley2_defconfig\n create mode 100644 drivers/clk/ingenic/x1000-cgu.c\n create mode 100644 include/dt-bindings/clock/x1000-cgu.h"
}