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    "date": "2017-09-20T08:52:01",
    "name": "[V2,0/1] Optimise IOVA allocations for PCI devices",
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        "name": "Tomasz Nowicki",
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        "From": "Tomasz Nowicki <tomasz.nowicki@caviumnetworks.com>",
        "To": "joro@8bytes.org,\n\trobin.murphy@arm.com,\n\twill.deacon@arm.com",
        "Subject": "[PATCH V2 0/1] Optimise IOVA allocations for PCI devices",
        "Date": "Wed, 20 Sep 2017 10:52:01 +0200",
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        "List-Id": "linux-imx-kernel.lists.patchwork.ozlabs.org"
    },
    "content": "Here is my test setup where I have stareted performance measurements.\n\n ------------  PCIe  -------------   TX   -------------  PCIe  -----\n| ThunderX2  |------| Intel XL710 | ---> | Intel XL710 |------| X86 |\n| (128 cpus) |      |   40GbE     |      |    40GbE    |       -----\n ------------        -------------        -------------\n\nAs the reference lets take v4.13 host, SMMUv3 off and 1-thread iperf\ntaskset to one CPU. The performance results I got:\n\nSMMU off -> 100%\nSMMU on -> 0,02%\n\nI followed down the DMA mapping path and found out IOVA 32-bit space\nfull so that kernel was flushing rcaches for all CPUs in (1).\nFor 128 CPUs, this kills the performance. Furthermore, for my case, rcaches\ncontained PFNs > 32-bit mostly so the second round of IOVA allocation failed\nas well. As the consequence IOVA had to be allocated outside of 32-bit (2)\nfrom scratch since all rcaches have been flushed in (1).\n\n    if (dma_limit > DMA_BIT_MASK(32) && dev_is_pci(dev))\n(1)-->  iova = alloc_iova_fast(iovad, iova_len, DMA_BIT_MASK(32) >> shift);\n\n    if (!iova)\n(2)-->  iova = alloc_iova_fast(iovad, iova_len, dma_limit >> shift);\n\nMy fix simply introduces parameter for alloc_iova_fast() to decide whether\nrcache flush has to be done or not. All users follow mentioned scenario\nso they should let flush as the last chance to avoid time costly iteration\nover all CPUs.\n\nThis bring my iperf performance back to 100% with SMMU on.\n\nMy bad feelings regarding this solution is that machines with relatively\nsmall numbers of CPUs may get DAC addresses more frequently for PCI\ndevices. Please let me know your thoughts.\n\nChangelog:\n\nv1 --> v2\n- add missing documentation\n- fix typo\n\nTomasz Nowicki (1):\n  iommu/iova: Make rcache flush optional on IOVA allocation failure\n\n drivers/iommu/amd_iommu.c   |  5 +++--\n drivers/iommu/dma-iommu.c   |  6 ++++--\n drivers/iommu/intel-iommu.c |  5 +++--\n drivers/iommu/iova.c        | 11 ++++++-----\n include/linux/iova.h        |  5 +++--\n 5 files changed, 19 insertions(+), 13 deletions(-)"
}