Cover Letter Detail
Show a cover letter.
GET /api/covers/815786/?format=api
{ "id": 815786, "url": "http://patchwork.ozlabs.org/api/covers/815786/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-imx/cover/20170919184751.25110-1-jeremy.linton@arm.com/", "project": { "id": 19, "url": "http://patchwork.ozlabs.org/api/projects/19/?format=api", "name": "Linux IMX development", "link_name": "linux-imx", "list_id": "linux-imx-kernel.lists.patchwork.ozlabs.org", "list_email": "linux-imx-kernel@lists.patchwork.ozlabs.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170919184751.25110-1-jeremy.linton@arm.com>", "list_archive_url": null, "date": "2017-09-19T18:47:45", "name": "[v2,0/6] Support PPTT for ARM64", "submitter": { "id": 67035, "url": "http://patchwork.ozlabs.org/api/people/67035/?format=api", "name": "Jeremy Linton", "email": "jeremy.linton@arm.com" }, "mbox": "http://patchwork.ozlabs.org/project/linux-imx/cover/20170919184751.25110-1-jeremy.linton@arm.com/mbox/", "series": [ { "id": 3950, "url": "http://patchwork.ozlabs.org/api/series/3950/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-imx/list/?series=3950", "date": "2017-09-19T18:47:45", "name": "Support PPTT for ARM64", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/3950/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/815786/comments/", "headers": { "Return-Path": "<linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming-imx@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-imx@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.infradead.org\n\t(client-ip=65.50.211.133; helo=bombadil.infradead.org;\n\tenvelope-from=linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org;\n\treceiver=<UNKNOWN>)", "ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=lists.infradead.org\n\theader.i=@lists.infradead.org\n\theader.b=\"iigUvqAu\"; dkim-atps=neutral" ], "Received": [ "from bombadil.infradead.org (bombadil.infradead.org\n\t[65.50.211.133])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xxX2z1WJhz9sPk\n\tfor <incoming-imx@patchwork.ozlabs.org>;\n\tWed, 20 Sep 2017 04:48:59 +1000 (AEST)", "from localhost ([127.0.0.1] helo=bombadil.infradead.org)\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1duNZn-0006Ab-FP; Tue, 19 Sep 2017 18:48:55 +0000", "from foss.arm.com ([217.140.101.70])\n\tby bombadil.infradead.org with esmtp (Exim 4.87 #1 (Red Hat Linux))\n\tid 1duNZK-0005Vo-UD for linux-arm-kernel@lists.infradead.org;\n\tTue, 19 Sep 2017 18:48:30 +0000", "from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249])\n\tby usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 80AB415A2;\n\tTue, 19 Sep 2017 11:48:06 -0700 (PDT)", "from beelzebub.austin.arm.com (beelzebub.austin.arm.com\n\t[10.118.12.119])\n\tby usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id\n\t3F41B3F483; Tue, 19 Sep 2017 11:48:05 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe:\n\tList-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date:\n\tSubject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date:\n\tResent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:\n\tReferences:List-Owner; bh=qxlug//5GVwcIHpjb1hob6mgnKHkYts+K0AqYMR9LGU=;\n\tb=iig\n\tUvqAuLBOvKh4p3Hbpu0wiYZKY22hRlxcai0B7kaMY6VlgFiQ3m2Y8mnWA5aa3DxqEijAYLHCYFRJe\n\ti/EZTjoQlYwZlMHDxZqba/48zkIYmqdjIwyWZ5XODevBgjW1lcKMAFh8IAC/yDb8EDEl3Fw1trfE7\n\tUuzB+wSmjNuJm7pfCEjZEa8ok38fnjxjwrA02D8BGEu4OYl7OqHK4Tn+tOPY2f5R9y75aPsFwfHa9\n\t9RBcFFpMNwujpy7U6x5dmxJjFT04V0GGwJQFJnf1TLh9QwIvLpq2y2TzDh0K/CScqrKlQKKcK8bnN\n\tfAxVXu3vu39pjR6mJFMCPHo8t9FfaSw==;", "From": "Jeremy Linton <jeremy.linton@arm.com>", "To": "linux-acpi@vger.kernel.org", "Subject": "[PATCH v2 0/6] Support PPTT for ARM64", "Date": "Tue, 19 Sep 2017 13:47:45 -0500", "Message-Id": "<20170919184751.25110-1-jeremy.linton@arm.com>", "X-Mailer": "git-send-email 2.13.5", "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ", "X-CRM114-CacheID": "sfid-20170919_114827_127279_8690A229 ", "X-CRM114-Status": "UNSURE ( 8.66 )", "X-CRM114-Notice": "Please train this message.", "X-Spam-Score": "-6.9 (------)", "X-Spam-Report": "SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-6.9 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [217.140.101.70 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]", "X-BeenThere": "linux-arm-kernel@lists.infradead.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/linux-arm-kernel/>", "List-Post": "<mailto:linux-arm-kernel@lists.infradead.org>", "List-Help": "<mailto:linux-arm-kernel-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/linux-arm-kernel>,\n\t<mailto:linux-arm-kernel-request@lists.infradead.org?subject=subscribe>", "Cc": "mark.rutland@arm.com, Jonathan.Zhang@cavium.com,\n\tlorenzo.pieralisi@arm.com, \n\tcatalin.marinas@arm.com, gregkh@linuxfoundation.org,\n\tjhugo@codeaurora.org, \n\trjw@rjwysocki.net, mturquette@baylibre.com, linux-pm@vger.kernel.org, \n\twill.deacon@arm.com, linux-kernel@vger.kernel.org,\n\tJeremy Linton <jeremy.linton@arm.com>, linux-clk@vger.kernel.org,\n\twangxiongfeng2@huawei.com, viresh.kumar@linaro.org,\n\thanjun.guo@linaro.org, \n\tahs3@redhat.com, sudeep.holla@arm.com, sboyd@codeaurora.org,\n\tlinux-arm-kernel@lists.infradead.org", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "\"linux-arm-kernel\" <linux-arm-kernel-bounces@lists.infradead.org>", "Errors-To": "linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org", "List-Id": "linux-imx-kernel.lists.patchwork.ozlabs.org" }, "content": "ACPI 6.2 adds the Processor Properties Topology Table (PPTT), which is\nused to describe the processor and cache topology. Ideally it is\nused to extend/override information provided by the hardware, but\nright now ARM64 is entirely dependent on firmware provided tables.\n\nThis patch parses the table for the cache topology and CPU topology.\nFor the latter we also add an additional topology_cod_id() macro,\nand a package_id for arm64. Initially the physical id will match\nthe cluster id, but we update users of the cluster to utilize\nthe new macro. When we enable ACPI/PPTT for arm64 we map the socket\nto the physical id as the remainder of the kernel expects.\n\nFor example on juno:\n[root@mammon-juno-rh topology]# lstopo-no-graphics\n Package L#0\n L2 L#0 (1024KB)\n L1d L#0 (32KB) + L1i L#0 (32KB) + Core L#0 + PU L#0 (P#0)\n L1d L#1 (32KB) + L1i L#1 (32KB) + Core L#1 + PU L#1 (P#1)\n L1d L#2 (32KB) + L1i L#2 (32KB) + Core L#2 + PU L#2 (P#2)\n L1d L#3 (32KB) + L1i L#3 (32KB) + Core L#3 + PU L#3 (P#3)\n L2 L#1 (2048KB)\n L1d L#4 (32KB) + L1i L#4 (48KB) + Core L#4 + PU L#4 (P#4)\n L1d L#5 (32KB) + L1i L#5 (48KB) + Core L#5 + PU L#5 (P#5)\n HostBridge L#0\n PCIBridge\n PCIBridge\n PCIBridge\n PCI 1095:3132\n Block(Disk) L#0 \"sda\"\n PCIBridge\n PCI 1002:68f9\n GPU L#1 \"renderD128\"\n GPU L#2 \"card0\"\n GPU L#3 \"controlD64\"\n PCIBridge\n PCI 11ab:4380\n Net L#4 \"enp8s0\"\n\nv1->v2:\n\nThe parser keys off the acpi_pptt_processor node to determine\n unique cache's rather than the acpi_pptt_cache referenced by the\n processor node. This allows PPTT tables which \"share\" cache nodes\n across cpu nodes despite not being a shared cache.\n\nNormalize the socket, cluster and thread mapping so that they match\n linux's traditional mapping for the physical id, and thread id.\n Adding explicit scheduler knowledge of clusters (rather than just\n their cache sharing attributes) is a subject for a future patch.\n\nJeremy Linton (6):\n ACPI/PPTT: Add Processor Properties Topology Table parsing\n ACPI: Enable PPTT support on ARM64\n drivers: base: cacheinfo: arm64: Add support for ACPI based firmware\n tables\n Topology: Add cluster on die macros and arm64 decoding\n arm64: Fixup users of topology_physical_package_id\n arm64: topology: Enable ACPI/PPTT based CPU topology.\n\n arch/arm64/Kconfig | 1 +\n arch/arm64/include/asm/topology.h | 4 +-\n arch/arm64/kernel/cacheinfo.c | 23 +-\n arch/arm64/kernel/topology.c | 62 ++++-\n drivers/acpi/Makefile | 1 +\n drivers/acpi/arm64/Kconfig | 3 +\n drivers/acpi/pptt.c | 459 ++++++++++++++++++++++++++++++++++++++\n drivers/base/cacheinfo.c | 17 +-\n drivers/clk/clk-mb86s7x.c | 2 +-\n drivers/cpufreq/arm_big_little.c | 2 +-\n drivers/firmware/psci_checker.c | 2 +-\n include/linux/cacheinfo.h | 10 +-\n include/linux/topology.h | 4 +\n 13 files changed, 570 insertions(+), 20 deletions(-)\n create mode 100644 drivers/acpi/pptt.c" }