Cover Letter Detail
Show a cover letter.
GET /api/covers/815358/?format=api
{ "id": 815358, "url": "http://patchwork.ozlabs.org/api/covers/815358/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/cover/1505812951-25088-1-git-send-email-chin.liang.see@intel.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1505812951-25088-1-git-send-email-chin.liang.see@intel.com>", "list_archive_url": null, "date": "2017-09-19T09:22:17", "name": "[U-Boot,00/14] Enable Stratix10 SoC support", "submitter": { "id": 70182, "url": "http://patchwork.ozlabs.org/api/people/70182/?format=api", "name": "See, Chin Liang", "email": "chin.liang.see@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/cover/1505812951-25088-1-git-send-email-chin.liang.see@intel.com/mbox/", "series": [ { "id": 3810, "url": "http://patchwork.ozlabs.org/api/series/3810/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=3810", "date": "2017-09-19T09:22:17", "name": "Enable Stratix10 SoC support", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/3810/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/815358/comments/", "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=<UNKNOWN>)", "Received": [ "from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xxHVS09zMz9ryr\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 19 Sep 2017 19:23:27 +1000 (AEST)", "by lists.denx.de (Postfix, from userid 105)\n\tid C1036C21ED6; Tue, 19 Sep 2017 09:23:22 +0000 (UTC)", "from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 8294BC21DB1;\n\tTue, 19 Sep 2017 09:23:19 +0000 (UTC)", "by lists.denx.de (Postfix, from userid 105)\n\tid DA157C21D70; Tue, 19 Sep 2017 09:23:17 +0000 (UTC)", "from mga03.intel.com (mga03.intel.com [134.134.136.65])\n\tby lists.denx.de (Postfix) with ESMTPS id 50677C21D55\n\tfor <u-boot@lists.denx.de>; Tue, 19 Sep 2017 09:23:16 +0000 (UTC)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n\tby orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t19 Sep 2017 02:23:12 -0700", "from pg-interactive1.altera.com ([137.57.137.156])\n\tby fmsmga002.fm.intel.com with ESMTP; 19 Sep 2017 02:22:37 -0700" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-5.0 required=5.0 tests=RCVD_IN_DNSWL_HI\n\tautolearn=unavailable autolearn_force=no version=3.4.0", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos; i=\"5.42,417,1500966000\"; d=\"scan'208\";\n\ta=\"1220781617\"", "From": "chin.liang.see@intel.com", "To": "u-boot@lists.denx.de,\n\tMarek Vasut <marex@denx.de>", "Date": "Tue, 19 Sep 2017 17:22:17 +0800", "Message-Id": "<1505812951-25088-1-git-send-email-chin.liang.see@intel.com>", "X-Mailer": "git-send-email 2.2.2", "Cc": "Tien Fong Chee <tien.fong.chee@intel.com>,\n\tChin Liang See <chin.liang.see@intel.com>", "Subject": "[U-Boot] [PATCH 00/14] Enable Stratix10 SoC support", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.18", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<http://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n\t<mailto:u-boot-request@lists.denx.de?subject=subscribe>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "base64", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>" }, "content": "From: Chin Liang See <chin.liang.see@intel.com>\n\nThis patch series are enabling support for Stratix 10 SoC\n\nChin Liang See (14):\n arm: socfpga: stratix10: Add base address map for Statix10 SoC\n arm: dts: Add dts for Stratix10 SoC\n arm: socfpga: stratix10: Add Clock Manager driver for Stratix10 SoC\n arm: socfpga: stratix10: Add Reset Manager driver for Stratix10 SoC\n arm: socfpga: stratix10: Add pinmux support for Stratix10 SoC\n arm: socfpga: stratix10: Add misc support for Stratix10 SoC\n arm: socfpga: stratix10: Add mailbox support for Stratix10 SoC\n arm: socfpga: stratix10: Add MMU support for Stratix10 SoC\n arm: socfpga: Restructure the SPL file\n arm: socfpga: stratix10: Add SPL driver for Stratix10 SoC\n arm: socfpga: stratix10: Add timer support for Stratix10 SoC\n ddr: altera: stratix10: Add DDR support for Stratix10 SoC\n board: altera: stratix10: Add socdk board support for Stratix10 SoC\n arm: socfpga: stratix10: Enable Stratix10 SoC build\n\n arch/arm/Kconfig | 8 +-\n arch/arm/dts/Makefile | 3 +-\n arch/arm/dts/socfpga_stratix10_socdk.dts | 141 ++++++++\n arch/arm/mach-socfpga/Kconfig | 13 +\n arch/arm/mach-socfpga/Makefile | 19 +-\n arch/arm/mach-socfpga/clock_manager.c | 4 +-\n arch/arm/mach-socfpga/clock_manager_s10.c | 359 +++++++++++++++++++\n arch/arm/mach-socfpga/include/mach/base_addr_s10.h | 62 ++++\n arch/arm/mach-socfpga/include/mach/clock_manager.h | 2 +\n .../mach-socfpga/include/mach/clock_manager_s10.h | 202 +++++++++++\n arch/arm/mach-socfpga/include/mach/firewall_s10.h | 84 +++++\n arch/arm/mach-socfpga/include/mach/handoff_s10.h | 29 ++\n arch/arm/mach-socfpga/include/mach/mailbox_s10.h | 108 ++++++\n arch/arm/mach-socfpga/include/mach/reset_manager.h | 2 +\n .../mach-socfpga/include/mach/reset_manager_s10.h | 116 +++++++\n arch/arm/mach-socfpga/include/mach/sdram_s10.h | 333 ++++++++++++++++++\n .../arm/mach-socfpga/include/mach/system_manager.h | 5 +-\n .../mach-socfpga/include/mach/system_manager_s10.h | 169 +++++++++\n arch/arm/mach-socfpga/mailbox_s10.c | 239 +++++++++++++\n arch/arm/mach-socfpga/misc.c | 4 +\n arch/arm/mach-socfpga/misc_s10.c | 165 +++++++++\n arch/arm/mach-socfpga/mmu-arm64_s10.c | 71 ++++\n arch/arm/mach-socfpga/reset_manager.c | 5 +\n arch/arm/mach-socfpga/reset_manager_s10.c | 140 ++++++++\n arch/arm/mach-socfpga/spl_a10.c | 105 ++++++\n arch/arm/mach-socfpga/{spl.c => spl_gen5.c} | 46 ---\n arch/arm/mach-socfpga/spl_s10.c | 138 ++++++++\n arch/arm/mach-socfpga/system_manager_s10.c | 91 +++++\n arch/arm/mach-socfpga/timer.c | 17 +-\n arch/arm/mach-socfpga/wrap_pinmux_config_s10.c | 55 +++\n arch/arm/mach-socfpga/wrap_pll_config_s10.c | 46 +++\n board/altera/stratix10-socdk/MAINTAINERS | 7 +\n board/altera/stratix10-socdk/Makefile | 7 +\n board/altera/stratix10-socdk/socfpga.c | 7 +\n configs/socfpga_stratix10_defconfig | 39 +++\n drivers/ddr/altera/Makefile | 1 +\n drivers/ddr/altera/sdram_s10.c | 382 +++++++++++++++++++++\n include/configs/socfpga_stratix10_socdk.h | 216 ++++++++++++\n include/dt-bindings/reset/altr,rst-mgr-s10.h | 97 ++++++\n 39 files changed, 3482 insertions(+), 55 deletions(-)\n create mode 100644 arch/arm/dts/socfpga_stratix10_socdk.dts\n create mode 100644 arch/arm/mach-socfpga/clock_manager_s10.c\n create mode 100644 arch/arm/mach-socfpga/include/mach/base_addr_s10.h\n create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_s10.h\n create mode 100644 arch/arm/mach-socfpga/include/mach/firewall_s10.h\n create mode 100644 arch/arm/mach-socfpga/include/mach/handoff_s10.h\n create mode 100644 arch/arm/mach-socfpga/include/mach/mailbox_s10.h\n create mode 100644 arch/arm/mach-socfpga/include/mach/reset_manager_s10.h\n create mode 100644 arch/arm/mach-socfpga/include/mach/sdram_s10.h\n create mode 100644 arch/arm/mach-socfpga/include/mach/system_manager_s10.h\n create mode 100644 arch/arm/mach-socfpga/mailbox_s10.c\n create mode 100644 arch/arm/mach-socfpga/misc_s10.c\n create mode 100644 arch/arm/mach-socfpga/mmu-arm64_s10.c\n create mode 100644 arch/arm/mach-socfpga/reset_manager_s10.c\n create mode 100644 arch/arm/mach-socfpga/spl_a10.c\n rename arch/arm/mach-socfpga/{spl.c => spl_gen5.c} (83%)\n create mode 100644 arch/arm/mach-socfpga/spl_s10.c\n create mode 100644 arch/arm/mach-socfpga/system_manager_s10.c\n create mode 100644 arch/arm/mach-socfpga/wrap_pinmux_config_s10.c\n create mode 100644 arch/arm/mach-socfpga/wrap_pll_config_s10.c\n create mode 100644 board/altera/stratix10-socdk/MAINTAINERS\n create mode 100644 board/altera/stratix10-socdk/Makefile\n create mode 100644 board/altera/stratix10-socdk/socfpga.c\n create mode 100644 configs/socfpga_stratix10_defconfig\n create mode 100644 drivers/ddr/altera/sdram_s10.c\n create mode 100644 include/configs/socfpga_stratix10_socdk.h\n create mode 100644 include/dt-bindings/reset/altr,rst-mgr-s10.h\n\n--\n2.2.2" }