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{ "id": 815212, "url": "http://patchwork.ozlabs.org/api/covers/815212/?format=api", "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/cover/20170919002833.5677-1-s-anna@ti.com/", "project": { "id": 37, "url": "http://patchwork.ozlabs.org/api/projects/37/?format=api", "name": "Devicetree Bindings", "link_name": "devicetree-bindings", "list_id": "devicetree.vger.kernel.org", "list_email": "devicetree@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170919002833.5677-1-s-anna@ti.com>", "list_archive_url": null, "date": "2017-09-19T00:28:30", "name": "[0/3] Add and enable DSP device on OMAPL138 LCDK board", "submitter": { "id": 24498, "url": "http://patchwork.ozlabs.org/api/people/24498/?format=api", "name": "Suman Anna", "email": "s-anna@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/devicetree-bindings/cover/20170919002833.5677-1-s-anna@ti.com/mbox/", "series": [ { "id": 3756, "url": "http://patchwork.ozlabs.org/api/series/3756/?format=api", "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=3756", "date": "2017-09-19T00:28:30", "name": "Add and enable DSP device on OMAPL138 LCDK board", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/3756/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/815212/comments/", "headers": { "Return-Path": "<devicetree-owner@vger.kernel.org>", "X-Original-To": "incoming-dt@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-dt@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=ti.com header.i=@ti.com header.b=\"SsoOOJp5\"; \n\tdkim-atps=neutral" ], "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xx3ft6VYQz9s78\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tTue, 19 Sep 2017 10:29:58 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751473AbdISA3l (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tMon, 18 Sep 2017 20:29:41 -0400", "from fllnx209.ext.ti.com ([198.47.19.16]:9352 \"EHLO\n\tfllnx209.ext.ti.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751466AbdISA3k (ORCPT\n\t<rfc822; devicetree@vger.kernel.org>); Mon, 18 Sep 2017 20:29:40 -0400", "from dlelxv90.itg.ti.com ([172.17.2.17])\n\tby fllnx209.ext.ti.com (8.15.1/8.15.1) with ESMTP id v8J0Sehl021029; \n\tMon, 18 Sep 2017 19:28:40 -0500", "from DLEE114.ent.ti.com (dlee114.ent.ti.com [157.170.170.25])\n\tby dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8J0SZjO032611; \n\tMon, 18 Sep 2017 19:28:35 -0500", "from DLEE106.ent.ti.com (157.170.170.36) by DLEE114.ent.ti.com\n\t(157.170.170.25) with Microsoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34;\n\tMon, 18 Sep 2017 19:28:35 -0500", "from dflp33.itg.ti.com (10.64.6.16) by DLEE106.ent.ti.com\n\t(157.170.170.36) with Microsoft SMTP Server (version=TLS1_0,\n\tcipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend\n\tTransport; Mon, 18 Sep 2017 19:28:35 -0500", "from legion.dal.design.ti.com (legion.dal.design.ti.com\n\t[128.247.22.53])\n\tby dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8J0SZ46008470;\n\tMon, 18 Sep 2017 19:28:35 -0500", "from localhost (irmo.dhcp.ti.com [128.247.58.153])\n\tby legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id\n\tv8J0SY329418; Mon, 18 Sep 2017 19:28:34 -0500 (CDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com;\n\ts=ti-com-17Q1; t=1505780920;\n\tbh=29E3+1m+uqJ8XnsEkG4LGGPP/EMZ0JnXMDa4Ut/CGBQ=;\n\th=From:To:CC:Subject:Date;\n\tb=SsoOOJp5mhf2M1fdS0hbpozzXt4NVMRD2bL/8zsP94VvXriFNoVCvuvdOeZRsWGRu\n\thA2Sv67qxTR0aO8+0OZ+gdp0T7CBN1/nzEjdalLJI6neZA658CbJdwl7qr6o/kE4Jy\n\tVUHCrXpXRve3HBQisKqvge+x0ZbiPnetLFdOK/3M=", "From": "Suman Anna <s-anna@ti.com>", "To": "Sekhar Nori <nsekhar@ti.com>, Kevin Hilman <khilman@kernel.org>", "CC": "<linux-arm-kernel@lists.infradead.org>,\n\t<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,\n\tSuman Anna <s-anna@ti.com>", "Subject": "[PATCH 0/3] Add and enable DSP device on OMAPL138 LCDK board", "Date": "Mon, 18 Sep 2017 19:28:30 -0500", "Message-ID": "<20170919002833.5677-1-s-anna@ti.com>", "X-Mailer": "git-send-email 2.13.1", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-EXCLAIMER-MD-CONFIG": "e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180", "Sender": "devicetree-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<devicetree.vger.kernel.org>", "X-Mailing-List": "devicetree@vger.kernel.org" }, "content": "Hi Sekhar,\n\nThe following series adds the DT node for the DSP device present on\non DA850/OMAPL138 SoCs. The node is disabled in the base dts file, and\nenabled in the corresponding LCDK board file alongside the reserved\nCMA pool required by the DSP device. The DT bindings and driver\nadaptation were added to mainline in 4.14-rc1, and this series adds\nthe remaining dt portions. Nodes are added as per bindings in\nDocumentation/devicetree/bindings/remoteproc/ti,davinci-rproc.txt\n\nPatches are based on 4.14-rc1. The first 2 patches adds the base DTS\nnode and enables the device on OMAPL138 LCDK board. The last patch\nallows the non-DT clock to be bound to the DT DSP device by using\nof_auxdata which renames the device to the same as the non-DT device\nname. This is required by the davinci remoteproc driver to properly\nacquire and enable the clock for this device.\n\nValidation done on OMAPL138 LCDK board. Supported features include\nbasic load/boot (tested with rpmsg_client_sample) using external\nmemory from the CMA pool.\n\nregards\nSuman\n\nSuman Anna (3):\n ARM: dts: da850: Add DSP node\n ARM: dts: da850-lcdk: Add and enable CMA reserved pool for DSP\n ARM: davinci: da8xx-dt: Add OF_DEV_AUXDATA entry for DSP clock\n matching\n\n arch/arm/boot/dts/da850-lcdk.dts | 18 ++++++++++++++++++\n arch/arm/boot/dts/da850.dtsi | 12 ++++++++++++\n arch/arm/mach-davinci/da8xx-dt.c | 1 +\n 3 files changed, 31 insertions(+)" }