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{ "id": 815156, "url": "http://patchwork.ozlabs.org/api/covers/815156/?format=api", "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/cover/1505767187-4596-1-git-send-email-roy.pledge@nxp.com/", "project": { "id": 37, "url": "http://patchwork.ozlabs.org/api/projects/37/?format=api", "name": "Devicetree Bindings", "link_name": "devicetree-bindings", "list_id": "devicetree.vger.kernel.org", "list_email": "devicetree@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1505767187-4596-1-git-send-email-roy.pledge@nxp.com>", "list_archive_url": null, "date": "2017-09-18T20:39:35", "name": "[v5,00/12] soc/fsl/qbman: Enable QBMan on ARM Platforms", "submitter": { "id": 70252, "url": "http://patchwork.ozlabs.org/api/people/70252/?format=api", "name": "Roy Pledge", "email": "roy.pledge@nxp.com" }, "mbox": "http://patchwork.ozlabs.org/project/devicetree-bindings/cover/1505767187-4596-1-git-send-email-roy.pledge@nxp.com/mbox/", "series": [ { "id": 3732, "url": "http://patchwork.ozlabs.org/api/series/3732/?format=api", "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=3732", "date": "2017-09-18T20:39:39", "name": "soc/fsl/qbman: Enable QBMan on ARM Platforms", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/3732/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/815156/comments/", "headers": { "Return-Path": "<devicetree-owner@vger.kernel.org>", "X-Original-To": "incoming-dt@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-dt@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)", "spf=fail (sender IP is 192.88.168.50)\n\tsmtp.mailfrom=nxp.com; nxp.com; dkim=none (message not signed)\n\theader.d=none;nxp.com; dmarc=fail action=none header.from=nxp.com;" ], "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xwych3ZPzz9s7v\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tTue, 19 Sep 2017 06:42:44 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751476AbdIRUj5 (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tMon, 18 Sep 2017 16:39:57 -0400", "from mail-cys01nam02on0067.outbound.protection.outlook.com\n\t([104.47.37.67]:51776\n\t\"EHLO NAM02-CY1-obe.outbound.protection.outlook.com\"\n\trhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP\n\tid S1750813AbdIRUjy (ORCPT <rfc822;devicetree@vger.kernel.org>);\n\tMon, 18 Sep 2017 16:39:54 -0400", "from MWHPR03CA0025.namprd03.prod.outlook.com (10.174.173.142) by\n\tBN6PR03MB2691.namprd03.prod.outlook.com (10.173.144.10) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id\n\t15.20.56.11; Mon, 18 Sep 2017 20:39:52 +0000", "from BL2FFO11FD040.protection.gbl (2a01:111:f400:7c09::111) by\n\tMWHPR03CA0025.outlook.office365.com (2603:10b6:301:3b::14) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.56.8 via\n\tFrontend Transport; Mon, 18 Sep 2017 20:39:51 +0000", "from tx30smr01.am.freescale.net (192.88.168.50) by\n\tBL2FFO11FD040.mail.protection.outlook.com (10.173.161.136) with\n\tMicrosoft\n\tSMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id\n\t15.20.35.14 via Frontend Transport; Mon, 18 Sep 2017 20:39:50 +0000", "from otc-sw1.am.freescale.net (otc-sw1.am.freescale.net\n\t[10.29.200.182])\n\tby tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id\n\tv8IKdn2l025841; Mon, 18 Sep 2017 13:39:49 -0700" ], "Received-SPF": "Fail (protection.outlook.com: domain of nxp.com does not\n\tdesignate 192.88.168.50 as permitted sender)\n\treceiver=protection.outlook.com; \n\tclient-ip=192.88.168.50; helo=tx30smr01.am.freescale.net;", "From": "Roy Pledge <roy.pledge@nxp.com>", "To": "<leoyang.li@nxp.com>, <linuxppc-dev@lists.ozlabs.org>,\n\t<linux-arm-kernel@lists.infradead.org>,\n\t<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>", "CC": "<oss@buserror.net>, <madalin.bucur@nxp.com>,\n\t<catalin.marinas@arm.com>, <linux@armlinux.org.uk>,\n\t<arnd@arndb.de>, <mark.rutland@arm.com>, Roy Pledge <roy.pledge@nxp.com>", "Subject": "[v5 00/12] soc/fsl/qbman: Enable QBMan on ARM Platforms", "Date": "Mon, 18 Sep 2017 16:39:35 -0400", "Message-ID": "<1505767187-4596-1-git-send-email-roy.pledge@nxp.com>", "X-Mailer": "git-send-email 2.7.4", "Reply-To": "<roy.pledge@nxp.com>", "X-EOPAttributedMessage": "0", "X-Matching-Connectors": "131502407911943759;\n\t(91ab9b29-cfa4-454e-5278-08d120cd25b8); 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BCL:0; PCL:0;\n\tRULEID:(300000500095)(300135000095)(300000501095)(300135300095)(22001)(300000502095)(300135100095)(300000503095)(300135400095)(2017052603199)(201703131430075)(201703131517081)(300000504095)(300135200095)(300000505095)(300135600095)(300000506095)(300135500095);\n\tSRVR:BN6PR03MB2691; ", "X-MS-TrafficTypeDiagnostic": "BN6PR03MB2691:", "X-Exchange-Antispam-Report-Test": "UriScan:(275809806118684);", "X-Microsoft-Antispam-PRVS": "<BN6PR03MB26911A97A5B9B8BB3B01B67186630@BN6PR03MB2691.namprd03.prod.outlook.com>", "X-Exchange-Antispam-Report-CFA-Test": "BCL:0; PCL:0;\n\tRULEID:(100000700101)(100105000095)(100000701101)(100105300095)(100000702101)(100105100095)(6095135)(2401047)(8121501046)(5005006)(3002001)(100000703101)(100105400095)(10201501046)(93006095)(93001095)(6055026)(6096035)(20161123565025)(20161123556025)(20161123561025)(20161123559100)(20161123563025)(201703131430075)(201703131448075)(201703131433075)(201703161259150)(201703151042153)(201708071742011)(100000704101)(100105200095)(100000705101)(100105500095);\n\tSRVR:BN6PR03MB2691; BCL:0; PCL:0;\n\tRULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(400006)(100000804101)(100110200095)(100000805101)(100110500095);\n\tSRVR:BN6PR03MB2691; ", "X-Forefront-PRVS": "04347F8039", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "18 Sep 2017 20:39:50.8979\n\t(UTC)", "X-MS-Exchange-CrossTenant-Id": "5afe0b00-7697-4969-b663-5eab37d5f47e", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;\n\tIp=[192.88.168.50]; \n\tHelo=[tx30smr01.am.freescale.net]", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BN6PR03MB2691", "Sender": "devicetree-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<devicetree.vger.kernel.org>", "X-Mailing-List": "devicetree@vger.kernel.org" }, "content": "This patch series enables DPAA1 QBMan devices for ARM and\nARM64 architectures. This allows the LS1043A and LS1046A to use\nQBMan functionality which allows access to ethernet and cyptographic\ndevices for example.\n\nChanges since v4:\n- Introduce a common function for QBMan private memory initialization\n- Fix sparse warnings making sure that __iomem and __be32 are respected\n- Control different memremap() attributes using a #define\n\nChanges since v3:\n- Use memremap() instead of ioremap() for non iomem QBMan portal regions\n- Ensured the __iomem attribute is respected when accessing iomem mapped regions\n- Removed calls to flush/invalidate/prefetch for ARM/ARM64 since mapping is done as write combine\n\nChanges since v2:\n- Fixed some misspellings\n- Added 'no-map' constraint to device tree bindings\n- Described ordering contraint on regions in the device tree\n- Removed confusing comment regarding non-shareable mappings\n- Added warning if old reserved-memory technique is used on ARM\n\nChanges since v1:\n- Reworked private memory allocations to use shared-dma-pool on ARM platforms\n\n\nClaudiu Manoil (2):\n soc/fsl/qbman: Drop L1_CACHE_BYTES compile time check\n soc/fsl/qbman: Add missing headers on ARM\n\nMadalin Bucur (4):\n soc/fsl/qbman: Drop set/clear_bits usage\n soc/fsl/qbman: add QMAN_REV32\n soc/fsl/qbman: different register offsets on ARM\n soc/fsl/qbman: Enable FSL_LAYERSCAPE config on ARM\n\nRoy Pledge (5):\n soc/fsl/qbman: Add common routine for QBMan private allocations\n soc/fsl/qbman: Use shared-dma-pool for BMan private memory allocations\n soc/fsl/qbman: Use shared-dma-pool for QMan private memory allocations\n dt-bindings: soc/fsl: Update reserved memory binding for QBMan\n soc/fsl/qbman: Rework portal mapping calls for ARM/PPC\n\nValentin Rothberg (1):\n soc/fsl/qbman: Fix ARM32 typo\n\n Documentation/devicetree/bindings/soc/fsl/bman.txt | 12 +--\n Documentation/devicetree/bindings/soc/fsl/qman.txt | 26 ++++--\n drivers/soc/fsl/qbman/Kconfig | 2 +-\n drivers/soc/fsl/qbman/Makefile | 2 +-\n drivers/soc/fsl/qbman/bman.c | 42 ++++++++--\n drivers/soc/fsl/qbman/bman_ccsr.c | 15 ++++\n drivers/soc/fsl/qbman/bman_portal.c | 23 +++---\n drivers/soc/fsl/qbman/bman_priv.h | 8 +-\n drivers/soc/fsl/qbman/dpaa_sys.c | 78 ++++++++++++++++++\n drivers/soc/fsl/qbman/dpaa_sys.h | 25 ++++--\n drivers/soc/fsl/qbman/qman.c | 77 +++++++++++++-----\n drivers/soc/fsl/qbman/qman_ccsr.c | 95 +++++++++++++++-------\n drivers/soc/fsl/qbman/qman_portal.c | 23 +++---\n drivers/soc/fsl/qbman/qman_priv.h | 11 +--\n drivers/soc/fsl/qbman/qman_test.h | 2 -\n 15 files changed, 318 insertions(+), 123 deletions(-)\n create mode 100644 drivers/soc/fsl/qbman/dpaa_sys.c\n\n--\n2.7.4\n\n--\nTo unsubscribe from this list: send the line \"unsubscribe devicetree\" in\nthe body of a message to majordomo@vger.kernel.org\nMore majordomo info at http://vger.kernel.org/majordomo-info.html" }