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{ "id": 814569, "url": "http://patchwork.ozlabs.org/api/covers/814569/?format=api", "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/cover/20170917031956.28010-1-stefan.bruens@rwth-aachen.de/", "project": { "id": 37, "url": "http://patchwork.ozlabs.org/api/projects/37/?format=api", "name": "Devicetree Bindings", "link_name": "devicetree-bindings", "list_id": "devicetree.vger.kernel.org", "list_email": "devicetree@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170917031956.28010-1-stefan.bruens@rwth-aachen.de>", "list_archive_url": null, "date": "2017-09-17T03:19:46", "name": "[v2,00/10] dmaengine: sun6i: Fixes for H3/A83T, enable A64", "submitter": { "id": 67055, "url": "http://patchwork.ozlabs.org/api/people/67055/?format=api", "name": "Stefan Brüns", "email": "stefan.bruens@rwth-aachen.de" }, "mbox": "http://patchwork.ozlabs.org/project/devicetree-bindings/cover/20170917031956.28010-1-stefan.bruens@rwth-aachen.de/mbox/", "series": [ { "id": 3479, "url": "http://patchwork.ozlabs.org/api/series/3479/?format=api", "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=3479", "date": "2017-09-17T03:19:46", "name": "dmaengine: sun6i: Fixes for H3/A83T, enable A64", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/3479/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/814569/comments/", "headers": { "Return-Path": "<devicetree-owner@vger.kernel.org>", "X-Original-To": "incoming-dt@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-dt@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)", "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xvvX968CQz9sPs\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tSun, 17 Sep 2017 13:20:09 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751374AbdIQDUG (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tSat, 16 Sep 2017 23:20:06 -0400", "from mail-out-1.itc.rwth-aachen.de ([134.130.5.46]:37129 \"EHLO\n\tmail-out-1.itc.rwth-aachen.de\" rhost-flags-OK-OK-OK-OK)\n\tby vger.kernel.org with ESMTP id S1751310AbdIQDUG (ORCPT\n\t<rfc822; devicetree@vger.kernel.org>); Sat, 16 Sep 2017 23:20:06 -0400", "from rwthex-w1-a.rwth-ad.de ([134.130.26.156])\n\tby mail-in-1.itc.rwth-aachen.de with ESMTP; 17 Sep 2017 05:20:03 +0200", "from pebbles.fritz.box (85.183.223.53) by rwthex-w1-a.rwth-ad.de\n\t(2002:8682:1a9c::8682:1a9c) with Microsoft SMTP Server\n\t(version=TLS1_2, \n\tcipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1034.26;\n\tSun, 17 Sep 2017 05:20:02 +0200" ], "X-IronPort-AV": "E=Sophos;i=\"5.42,405,1500933600\"; d=\"scan'208\";a=\"13708880\"", "From": "=?utf-8?q?Stefan_Br=C3=BCns?= <stefan.bruens@rwth-aachen.de>", "To": "<linux-sunxi@googlegroups.com>", "CC": "<devicetree@vger.kernel.org>, <dmaengine@vger.kernel.org>,\n\tVinod Koul <vinod.koul@intel.com>,\n\t<linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>,\n\tMaxime Ripard <maxime.ripard@free-electrons.com>,\n\tChen-Yu Tsai <wens@csie.org>, Rob Herring <robh+dt@kernel.org>,\n\tCode Kipper <codekipper@gmail.com>,\n\tAndre Przywara <andre.przywara@arm.com>", "Subject": "[PATCH v2 00/10] dmaengine: sun6i: Fixes for H3/A83T, enable A64", "Date": "Sun, 17 Sep 2017 05:19:46 +0200", "Message-ID": "<20170917031956.28010-1-stefan.bruens@rwth-aachen.de>", "X-Mailer": "git-send-email 2.14.1", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"UTF-8\"", "Content-Transfer-Encoding": "8bit", "X-Originating-IP": "[85.183.223.53]", "X-ClientProxiedBy": "rwthex-w1-b.rwth-ad.de (2002:8682:1a9d::8682:1a9d) To\n\trwthex-w1-a.rwth-ad.de (2002:8682:1a9c::8682:1a9c)", "Sender": "devicetree-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<devicetree.vger.kernel.org>", "X-Mailing-List": "devicetree@vger.kernel.org" }, "content": "Commit 3a03ea763a67 (\"dmaengine: sun6i: Add support for Allwinner A83T\n(sun8i) variant\") and commit f008db8c00c1 (\"dmaengine: sun6i: Add support for\nAllwinner H3 (sun8i) variant\") added support for the A83T resp. H3, but missed\nsome differences between the original A31 and A83T/H3.\n\nThe first patch adds a callback to the controller config to set the clock\nautogating register of different SoC generations, i.e. A31, A23+A83T, H3+later,\nand uses it to for the correct clock autogating setting.\n\nThe second patch adds a callback for the burst length setting in the channel\nconfig register, which has different field offsets and new burst widths/lengths,\nwhich differs between H3 and earlier generations\n\nThe third patch restructures some code required for the fourth patch and adds the\nburst lengths to the controller config.\n\nThe fourth patch adds the burst widths to the config and adds the handling of the\nH3 specific burst widths.\n\nPatch 5 restructures the code to decouple some controller details (e.g. channel\ncount) from the compatible string/the config.\n\nPatches 6, 7 and 8 introduce and use the \"dma-chans\" property for the A64. Although\nregister compatible to the H3, the channel count differs and thus it requires a\nnew compatible. To avoid introduction of new compatibles for each minor variation,\nanything but the register model is moved to devicetree properties. There\nis at least one SoC (R40) which can then reuse the A64 compatible, the same\nwould have worked for A83T+V3s.\n\nPatches 9 and 10 add the DMA controller node to the devicetree and add the DMA\ncontroller reference to the SPI nodes.\n\nThis patch series could be called v2, but the patches were split and significantly\nrestructured, thus listing changes individually is not to meaningful.\n\nChanges in v2:\n- Use callback for autogating instead of variable for different SoC generations\n- Use controller specific callback for burst length setting\n- Store burst lengths in config instead of device structure\n- Store burst widths in config\n- Set default number of dma-request if not provided in config or devicetree\n\nStefan Brüns (10):\n dmaengine: sun6i: Correct setting of clock autogating register for\n A83T/H3\n dmaengine: sun6i: Correct burst length field offsets for H3\n dmaengine: sun6i: Restructure code to allow extension for new SoCs\n dmaengine: sun6i: Enable additional burst lengths/widths on H3\n dmaengine: sun6i: Move number of pchans/vchans/request to device\n struct\n arm64: allwinner: a64: Add devicetree binding for DMA controller\n dmaengine: sun6i: Retrieve channel count/max request from devicetree\n dmaengine: sun6i: Add support for Allwinner A64 and compatibles\n arm64: allwinner: a64: Add device node for DMA controller\n arm64: allwinner: a64: add dma controller references to spi nodes\n\n .../devicetree/bindings/dma/sun6i-dma.txt | 26 ++\n arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 15 ++\n drivers/dma/sun6i-dma.c | 265 ++++++++++++++++-----\n 3 files changed, 248 insertions(+), 58 deletions(-)" }