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{
    "id": 814144,
    "url": "http://patchwork.ozlabs.org/api/covers/814144/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/cover/20170915083357.11296-1-heiko@sntech.de/",
    "project": {
        "id": 37,
        "url": "http://patchwork.ozlabs.org/api/projects/37/?format=api",
        "name": "Devicetree Bindings",
        "link_name": "devicetree-bindings",
        "list_id": "devicetree.vger.kernel.org",
        "list_email": "devicetree@vger.kernel.org",
        "web_url": "",
        "scm_url": "",
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    },
    "msgid": "<20170915083357.11296-1-heiko@sntech.de>",
    "list_archive_url": null,
    "date": "2017-09-15T08:33:48",
    "name": "[0/9] ARM: rockchip: add power-domains for Cortex-A9 socs",
    "submitter": {
        "id": 10645,
        "url": "http://patchwork.ozlabs.org/api/people/10645/?format=api",
        "name": "Heiko Stübner",
        "email": "heiko@sntech.de"
    },
    "mbox": "http://patchwork.ozlabs.org/project/devicetree-bindings/cover/20170915083357.11296-1-heiko@sntech.de/mbox/",
    "series": [
        {
            "id": 3248,
            "url": "http://patchwork.ozlabs.org/api/series/3248/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=3248",
            "date": "2017-09-15T08:33:53",
            "name": "ARM: rockchip: add power-domains for Cortex-A9 socs",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/3248/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/covers/814144/comments/",
    "headers": {
        "Return-Path": "<devicetree-owner@vger.kernel.org>",
        "X-Original-To": "incoming-dt@patchwork.ozlabs.org",
        "Delivered-To": "patchwork-incoming-dt@bilbo.ozlabs.org",
        "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)",
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            "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xtpbq1srKz9t2m\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tFri, 15 Sep 2017 18:34:31 +1000 (AEST)",
            "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751170AbdIOIe2 (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tFri, 15 Sep 2017 04:34:28 -0400",
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            "from p5b127fef.dip0.t-ipconnect.de ([91.18.127.239]\n\thelo=phil.sntech) by gloria.sntech.de with esmtpsa\n\t(TLS1.1:DHE_RSA_AES_256_CBC_SHA1:256)\n\t(Exim 4.80) (envelope-from <heiko@sntech.de>)\n\tid 1dsm4n-0007F5-M5; Fri, 15 Sep 2017 10:34:18 +0200"
        ],
        "From": "Heiko Stuebner <heiko@sntech.de>",
        "To": "linux-rockchip@lists.infradead.org",
        "Cc": "linux-arm-kernel@lists.infradead.org, kever.yang@rock-chips.com,\n\tdevicetree@vger.kernel.org, robh+dt@kernel.org,\n\tmark.rutland@arm.com, Heiko Stuebner <heiko@sntech.de>",
        "Subject": "[PATCH 0/9] ARM: rockchip: add power-domains for Cortex-A9 socs",
        "Date": "Fri, 15 Sep 2017 10:33:48 +0200",
        "Message-Id": "<20170915083357.11296-1-heiko@sntech.de>",
        "X-Mailer": "git-send-email 2.14.1",
        "Sender": "devicetree-owner@vger.kernel.org",
        "Precedence": "bulk",
        "List-ID": "<devicetree.vger.kernel.org>",
        "X-Mailing-List": "devicetree@vger.kernel.org"
    },
    "content": "A small bit of cleanup for some clocks nobody used yet but that\nneed to be toggled for the synchronous reset done on power-domain\nstate changes.\n\nDomain values are done by the book (aka soc documentation for pmu\nand power-domain <-> ip block connections) and tested with the gpu\nand the wip lima kernel driver on rk3188.\n\nHeiko Stuebner (9):\n  clk: rockchip: add more rk3188 graphics clock ids\n  clk: rockchip: use new cif/vdpu clock ids on rk3188\n  dt-bindings: add power-domain header for RK3188 SoCs\n  dt-bindings: add power-domain header for RK3066 SoCs\n  dt-bindings: add compatibles for rk3066/rk3188 power controllers\n  soc: rockchip: power-domain: add rk3188 powerdomains\n  soc: rockchip: power-domain: add rk3066 powerdomains\n  ARM: dts: rockchip: add qos nodes found on rk3066 and rk3188\n  ARM: dts: rockchip: add rk3066/rk3188 power-domains\n\n .../bindings/soc/rockchip/power_domain.txt         |  4 ++\n arch/arm/boot/dts/rk3066a.dtsi                     | 51 ++++++++++++++++++++++\n arch/arm/boot/dts/rk3188.dtsi                      | 48 ++++++++++++++++++++\n arch/arm/boot/dts/rk3xxx.dtsi                      | 40 +++++++++++++++++\n drivers/clk/rockchip/clk-rk3188.c                  | 12 ++---\n drivers/soc/rockchip/pm_domains.c                  | 48 ++++++++++++++++++++\n include/dt-bindings/clock/rk3188-cru-common.h      |  9 +++-\n include/dt-bindings/power/rk3066-power.h           | 21 +++++++++\n include/dt-bindings/power/rk3188-power.h           | 23 ++++++++++\n 9 files changed, 248 insertions(+), 8 deletions(-)\n create mode 100644 include/dt-bindings/power/rk3066-power.h\n create mode 100644 include/dt-bindings/power/rk3188-power.h"
}