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{ "id": 813513, "url": "http://patchwork.ozlabs.org/api/covers/813513/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/cover/1505318697-77161-1-git-send-email-imammedo@redhat.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1505318697-77161-1-git-send-email-imammedo@redhat.com>", "list_archive_url": null, "date": "2017-09-13T16:04:52", "name": "[v2,0/5] generalize parsing of cpu_model (x86/arm)", "submitter": { "id": 11305, "url": "http://patchwork.ozlabs.org/api/people/11305/?format=api", "name": "Igor Mammedov", "email": "imammedo@redhat.com" }, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/cover/1505318697-77161-1-git-send-email-imammedo@redhat.com/mbox/", "series": [ { "id": 2945, "url": "http://patchwork.ozlabs.org/api/series/2945/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=2945", "date": "2017-09-13T16:04:52", "name": "generalize parsing of cpu_model (x86/arm)", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/2945/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/813513/comments/", "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=208.118.235.17; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "ext-mx01.extmail.prod.ext.phx2.redhat.com;\n\tdmarc=none (p=none dis=none) header.from=redhat.com", "ext-mx01.extmail.prod.ext.phx2.redhat.com;\n\tspf=fail smtp.mailfrom=imammedo@redhat.com" ], "Received": [ "from lists.gnu.org (lists.gnu.org [208.118.235.17])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xsmsQ6gNLz9sPk\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 14 Sep 2017 02:12:42 +1000 (AEST)", "from localhost ([::1]:43392 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dsAHI-000293-Uv\n\tfor incoming@patchwork.ozlabs.org; Wed, 13 Sep 2017 12:12:40 -0400", "from eggs.gnu.org ([2001:4830:134:3::10]:46241)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <imammedo@redhat.com>) id 1dsA9y-0002PU-VZ\n\tfor qemu-devel@nongnu.org; Wed, 13 Sep 2017 12:05:11 -0400", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <imammedo@redhat.com>) id 1dsA9s-0006Xt-Iz\n\tfor qemu-devel@nongnu.org; Wed, 13 Sep 2017 12:05:06 -0400", "from mx1.redhat.com ([209.132.183.28]:38004)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from <imammedo@redhat.com>) id 1dsA9s-0006X8-AI\n\tfor qemu-devel@nongnu.org; Wed, 13 Sep 2017 12:05:00 -0400", "from smtp.corp.redhat.com\n\t(int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1.redhat.com (Postfix) with ESMTPS id 655F381241\n\tfor <qemu-devel@nongnu.org>; Wed, 13 Sep 2017 16:04:59 +0000 (UTC)", "from dell-r430-03.lab.eng.brq.redhat.com\n\t(dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60])\n\tby smtp.corp.redhat.com (Postfix) with ESMTP id DE29217CC7\n\tfor <qemu-devel@nongnu.org>; Wed, 13 Sep 2017 16:04:58 +0000 (UTC)" ], "DMARC-Filter": "OpenDMARC Filter v1.3.2 mx1.redhat.com 655F381241", "From": "Igor Mammedov <imammedo@redhat.com>", "To": "qemu-devel@nongnu.org", "Date": "Wed, 13 Sep 2017 18:04:52 +0200", "Message-Id": "<1505318697-77161-1-git-send-email-imammedo@redhat.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "X-Scanned-By": "MIMEDefang 2.79 on 10.5.11.14", "X-Greylist": "Sender IP whitelisted, not delayed by milter-greylist-4.5.16\n\t(mx1.redhat.com [10.5.110.25]);\n\tWed, 13 Sep 2017 16:04:59 +0000 (UTC)", "Content-Transfer-Encoding": "quoted-printable", "X-detected-operating-system": "by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]", "X-Received-From": "209.132.183.28", "Subject": "[Qemu-devel] [PATCH v2 0/5] generalize parsing of cpu_model\n\t(x86/arm)", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "Changelog since v1:\n * fix merge conflicts with ignore_memory_transaction_failures\n * fix couple merge conflicts where SoC type string where replaced by type macro\n * keep plain prefix string in: strncmp(cpu_type, \"pxa27\", 5)\n * s/\"%s\" ARM_CPU_TYPE_SUFFIX/ARM_CPU_TYPE_NAME(\"%s\")/\n * drop not needed assert\n * instead of checking error/reporting/exiting explicitly\n use error_fatal which will do all of it for us\n * squash in \"cpu: rename cpu_parse_features() to cpu_parse_cpu_model()\"\n\n\nIssue 1: \nSome callers call CPUClass->parse_features manually to convert \n'-cpu cpufoo,featurestr' string to cpu type and featurestr \ninto a set of global properties and then do controlled \ncpu creation with setting properties and completing it with realize. \nThat's a lot of code duplication as they all are practically \nreimplement the same parsing logic. \n \nSome use cpu_generic_init() instead which does the same parsing \nalong with creation/realizing cpu within one wrapper. \n \nAnd some trying to switch to controlled cpu creation, \nimplement object_new()/set properties/realize steps \nbut forget feature parsing logic witch leads to 'bugs' \ncommit (00909b585 hw/arm/integratorcp: Support specifying features via -cpu) \n \nIssue 2: \nDefault cpu model selection logic is spread over all board's \nmachine_init() fuctions but it's basicallyi hardcodes default \ncpu model string in init function. \n \n if (!cpu_model) { \n cpu_model = \"some cpu model string\"; \n } \n \nand written in different ways. \nit forces machine_init callbacks to parse cpu_model string \neither by using cpu_generic_init() or by manually calling \ncpu_class_by_name()/CPUClass::parse_features to perform \nname to cpu type translation.\n\nThis series moves -cpu option parsing to generic machine code \nthat removes some of code duplication and makes cpus creation \nprocess more generic/simple: \n \n * unify default (fallback) cpu type handling by replacing \n hardcoded cpu_model strings with cpu type directly in \n \n machine_foo_class_init() { \n MachineClass::default_cpu_type = BOARD_DEFAULT_CPU_TYPE \n } \n \n which allows to generalize move cpu model parsing instead of \n parsing it in each board. \n \n * make generic machine vl.c parse cpu_model into properties/cpu_type \n and let boards use cpu_type without any cpu_model prasing. \n Generic parsing will kick in only if board advertises its support \n by setting MachineClass::default_cpu_type to a cpu type. \n \nPS: \nI intend make tree-wide conversion but as one series it's too many patches, \nso I'm splitting out it into an intial series that implements generic \npart and several patchsets that will do per target conversion. \n \nAs part of initial series x86 and ARM targets conversion is included \nto showcase generalization usage. Per target conversions are done\nas 1 patch per target, it might be too much for targets that have lots\nof boards (ARM) so let me know if you'd like to split it on per board\nbasis (then I'll respin it as separate series on top of generic patches)\n\ngithub tree for testing:\nhttps://github.com/imammedo/qemu.git default_machine_cpu_type_PC_ARM_v2\n\n\nIgor Mammedov (5):\n qom: cpus: split cpu_generic_init() on feature parsing and cpu\n creation parts\n cpu: make cpu_generic_init() abort QEMU on error\n vl.c: convert cpu_model to cpu type and set of global properties\n before machine_init()\n pc: use generic cpu_model parsing\n arm: drop intermediate cpu_model -> cpu type parsing and use cpu type\n directly\n\n include/hw/arm/armv7m.h | 2 +-\n include/hw/arm/aspeed_soc.h | 2 +-\n include/hw/arm/stm32f205_soc.h | 2 +-\n include/hw/boards.h | 6 ++++++\n include/qom/cpu.h | 22 +++++++++++++++++++\n target/arm/cpu.h | 3 +++\n target/i386/cpu.h | 9 ++++++++\n bsd-user/main.c | 4 ----\n hw/alpha/dp264.c | 4 ----\n hw/arm/armv7m.c | 40 +++++-----------------------------\n hw/arm/aspeed_soc.c | 13 +++++------\n hw/arm/collie.c | 10 +++------\n hw/arm/exynos4210.c | 6 +-----\n hw/arm/gumstix.c | 5 +++--\n hw/arm/highbank.c | 10 ++++-----\n hw/arm/integratorcp.c | 30 ++------------------------\n hw/arm/mainstone.c | 9 ++++----\n hw/arm/mps2.c | 17 ++++++---------\n hw/arm/musicpal.c | 11 ++--------\n hw/arm/netduino2.c | 2 +-\n hw/arm/nseries.c | 4 +++-\n hw/arm/omap1.c | 11 ++--------\n hw/arm/omap2.c | 8 ++-----\n hw/arm/omap_sx1.c | 5 ++++-\n hw/arm/palm.c | 5 +++--\n hw/arm/pxa2xx.c | 18 ++++------------\n hw/arm/realview.c | 25 +++++----------------\n hw/arm/spitz.c | 12 ++++++-----\n hw/arm/stellaris.c | 16 ++++++--------\n hw/arm/stm32f205_soc.c | 4 ++--\n hw/arm/strongarm.c | 15 +++----------\n hw/arm/tosa.c | 4 ----\n hw/arm/versatilepb.c | 15 +++----------\n hw/arm/vexpress.c | 32 +++++++++------------------\n hw/arm/virt.c | 46 ++++++++-------------------------------\n hw/arm/xilinx_zynq.c | 10 ++-------\n hw/arm/z2.c | 9 +++-----\n hw/i386/pc.c | 41 +++++------------------------------\n hw/i386/pc_piix.c | 4 +---\n hw/lm32/lm32_boards.c | 8 -------\n hw/lm32/milkymist.c | 4 ----\n hw/m68k/an5206.c | 4 ----\n hw/m68k/mcf5208.c | 4 ----\n hw/mips/cps.c | 4 ----\n hw/mips/mips_fulong2e.c | 4 ----\n hw/mips/mips_jazz.c | 4 ----\n hw/mips/mips_malta.c | 4 ----\n hw/mips/mips_mipssim.c | 4 ----\n hw/mips/mips_r4k.c | 4 ----\n hw/moxie/moxiesim.c | 4 ----\n hw/openrisc/openrisc_sim.c | 4 ----\n hw/ppc/e500.c | 4 ----\n hw/ppc/mac_newworld.c | 4 ----\n hw/ppc/mac_oldworld.c | 4 ----\n hw/ppc/ppc440_bamboo.c | 4 ----\n hw/ppc/ppc4xx_devs.c | 5 -----\n hw/ppc/prep.c | 9 --------\n hw/ppc/virtex_ml507.c | 4 ----\n hw/sh4/r2d.c | 4 ----\n hw/sh4/shix.c | 4 ----\n hw/sparc/leon3.c | 4 ----\n hw/sparc/sun4m.c | 4 ----\n hw/sparc64/sparc64.c | 4 ----\n hw/tricore/tricore_testboard.c | 4 ----\n hw/unicore32/puv3.c | 4 ----\n hw/xtensa/sim.c | 5 -----\n hw/xtensa/xtfpga.c | 5 -----\n linux-user/main.c | 4 ----\n qom/cpu.c | 49 +++++++++++++++++++++++-------------------\n target/arm/cpu.c | 2 +-\n target/i386/cpu.c | 3 ---\n vl.c | 10 +++++++++\n 72 files changed, 194 insertions(+), 489 deletions(-)" }