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{ "id": 812728, "url": "http://patchwork.ozlabs.org/api/covers/812728/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/cover/1505205657-18012-1-git-send-email-geert+renesas@glider.be/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1505205657-18012-1-git-send-email-geert+renesas@glider.be>", "list_archive_url": null, "date": "2017-09-12T08:40:53", "name": "[v2,resend,0/4] sh: sh7722/sh7757i/sh7264/sh7269: Fix pinctrl registration", "submitter": { "id": 63808, "url": "http://patchwork.ozlabs.org/api/people/63808/?format=api", "name": "Geert Uytterhoeven", "email": "geert+renesas@glider.be" }, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/cover/1505205657-18012-1-git-send-email-geert+renesas@glider.be/mbox/", "series": [ { "id": 2634, "url": "http://patchwork.ozlabs.org/api/series/2634/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=2634", "date": "2017-09-12T08:40:55", "name": "sh: sh7722/sh7757i/sh7264/sh7269: Fix pinctrl registration", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/2634/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/812728/comments/", "headers": { "Return-Path": "<linux-gpio-owner@vger.kernel.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)", "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xryvv0SD7z9s83\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 12 Sep 2017 18:42:03 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751348AbdILImB (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tTue, 12 Sep 2017 04:42:01 -0400", "from albert.telenet-ops.be ([195.130.137.90]:37948 \"EHLO\n\talbert.telenet-ops.be\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751312AbdILIlD (ORCPT\n\t<rfc822; linux-gpio@vger.kernel.org>); Tue, 12 Sep 2017 04:41:03 -0400", "from ayla.of.borg ([84.195.106.246])\n\tby albert.telenet-ops.be with bizsmtp\n\tid 8Ygz1w00l5JzmfG06Ygzpm; Tue, 12 Sep 2017 10:41:02 +0200", "from ramsan.of.borg ([192.168.97.29] helo=ramsan)\n\tby ayla.of.borg with esmtp (Exim 4.86_2)\n\t(envelope-from <geert@linux-m68k.org>)\n\tid 1drgkZ-0003Xt-Cw; Tue, 12 Sep 2017 10:40:55 +0200", "from geert by ramsan with local (Exim 4.86_2)\n\t(envelope-from <geert@linux-m68k.org>)\n\tid 1drgkd-0004hG-Kt; Tue, 12 Sep 2017 10:40:59 +0200" ], "From": "Geert Uytterhoeven <geert+renesas@glider.be>", "To": "Andrew Morton <akpm@linux-foundation.org>", "Cc": "Yoshinori Sato <ysato@users.sourceforge.jp>,\n\tRich Felker <dalias@libc.org>, Magnus Damm <magnus.damm@gmail.com>,\n\tLaurent Pinchart <laurent.pinchart@ideasonboard.com>,\n\tYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,\n\tlinux-sh@vger.kernel.org, linux-renesas-soc@vger.kernel.org,\n\tlinux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org,\n\tGeert Uytterhoeven <geert+renesas@glider.be>", "Subject": "[PATCH v2 resend 0/4] sh: sh7722/sh7757i/sh7264/sh7269: Fix pinctrl\n\tregistration", "Date": "Tue, 12 Sep 2017 10:40:53 +0200", "Message-Id": "<1505205657-18012-1-git-send-email-geert+renesas@glider.be>", "X-Mailer": "git-send-email 2.7.4", "Sender": "linux-gpio-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<linux-gpio.vger.kernel.org>", "X-Mailing-List": "linux-gpio@vger.kernel.org" }, "content": "Hi Andrew,\n\nI'm resending this to you due to unresponsiveness from the SuperH\nmaintainers (v2 sent before on May 11, pinged on June 30 and August 14).\n\nMagnus Damm reported that on sh7722/Migo-R, pinctrl registration fails\nwith:\n\n sh-pfc pfc-sh7722: pin 0 already registered\n sh-pfc pfc-sh7722: error during pin registration\n sh-pfc pfc-sh7722: could not register: -22\n sh-pfc: probe of pfc-sh7722 failed with error -22\n\npinmux_pins[] is initialized through PINMUX_GPIO(), using designated\narray initializers, where the GPIO_* enums serve as indices.\nApparently GPIO_PTQ7 was defined in the enum, but never used.\nIf enum values are defined, but never used, pinmux_pins[] contains\n(zero-filled) holes. Hence such entries are treated as pin zero, which\nwas registered before, and pinctrl registration fails.\n\nI can't see how this ever worked, as at the time of commit f5e25ae52feff2dc\n(\"sh-pfc: Add sh7722 pinmux support\"), pinmux_gpios[] in\ndrivers/pinctrl/sh-pfc/pfc-sh7722.c already had the hole, and\ndrivers/pinctrl/core.c already had the check.\n\nSome scripting revealed a few more broken drivers:\n - sh7757 has four holes, due to nonexistent GPIO_PT[JLNQ]7_RESV.\n - sh7264 and sh7269 define GPIO_PH[0-7], but don't use it with\n PINMUX_GPIO().\n\nPatch 1 fixes the issue on sh7722, and was tested.\nPatches 3-4 should fix the issue on the other 3 SoCs, but was untested due\nto lack of hardware.\n\nChanges compared to v1:\n - Replace fake error messages by references to sh7722,\n - Add Reviewed-by, Tested-by.\n\nThanks for applying!\n\nGeert Uytterhoeven (4):\n sh: sh7722: Remove nonexistent GPIO_PTQ7 to fix pinctrl registration\n sh: sh7757: Remove nonexistent GPIO_PT[JLNQ]7_RESV to fix pinctrl\n registration\n sh: sh7264: Remove nonexistent GPIO_PH[0-7] to fix pinctrl\n registration\n sh: sh7269: Remove nonexistent GPIO_PH[0-7] to fix pinctrl\n registration\n\n arch/sh/include/cpu-sh2a/cpu/sh7264.h | 4 +---\n arch/sh/include/cpu-sh2a/cpu/sh7269.h | 4 +---\n arch/sh/include/cpu-sh4/cpu/sh7722.h | 2 +-\n arch/sh/include/cpu-sh4/cpu/sh7757.h | 8 ++++----\n 4 files changed, 7 insertions(+), 11 deletions(-)" }