Cover Letter Detail
Show a cover letter.
GET /api/covers/812450/?format=api
{ "id": 812450, "url": "http://patchwork.ozlabs.org/api/covers/812450/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/cover/20170911171235.29331-1-clg@kaod.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170911171235.29331-1-clg@kaod.org>", "list_archive_url": null, "date": "2017-09-11T17:12:14", "name": "[RFC,v2,00/21] Guest exploitation of the XIVE interrupt controller (POWER9)", "submitter": { "id": 68548, "url": "http://patchwork.ozlabs.org/api/people/68548/?format=api", "name": "Cédric Le Goater", "email": "clg@kaod.org" }, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/cover/20170911171235.29331-1-clg@kaod.org/mbox/", "series": [ { "id": 2526, "url": "http://patchwork.ozlabs.org/api/series/2526/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=2526", "date": "2017-09-11T17:12:14", "name": "Guest exploitation of the XIVE interrupt controller (POWER9)", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/2526/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/812450/comments/", "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "Received": [ "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xrZJd4XYsz9s83\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 12 Sep 2017 03:13:37 +1000 (AEST)", "from localhost ([::1]:59250 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1drSH9-0008UV-FX\n\tfor incoming@patchwork.ozlabs.org; Mon, 11 Sep 2017 13:13:35 -0400", "from eggs.gnu.org ([2001:4830:134:3::10]:34524)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <clg@kaod.org>) id 1drSGW-0008Tc-Bz\n\tfor qemu-devel@nongnu.org; Mon, 11 Sep 2017 13:12:57 -0400", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <clg@kaod.org>) id 1drSGR-0003gp-CN\n\tfor qemu-devel@nongnu.org; Mon, 11 Sep 2017 13:12:56 -0400", "from 1.mo2.mail-out.ovh.net ([46.105.63.121]:54859)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from <clg@kaod.org>) id 1drSGR-0003gV-5U\n\tfor qemu-devel@nongnu.org; Mon, 11 Sep 2017 13:12:51 -0400", "from player770.ha.ovh.net (b6.ovh.net [213.186.33.56])\n\tby mo2.mail-out.ovh.net (Postfix) with ESMTP id B0098AA007\n\tfor <qemu-devel@nongnu.org>; Mon, 11 Sep 2017 19:12:49 +0200 (CEST)", "from zorba.kaod.org.com (LFbn-1-2231-173.w90-76.abo.wanadoo.fr\n\t[90.76.52.173]) (Authenticated sender: clg@kaod.org)\n\tby player770.ha.ovh.net (Postfix) with ESMTPSA id A00343C0077;\n\tMon, 11 Sep 2017 19:12:40 +0200 (CEST)" ], "From": "=?utf-8?q?C=C3=A9dric_Le_Goater?= <clg@kaod.org>", "To": "qemu-ppc@nongnu.org, qemu-devel@nongnu.org,\n\tDavid Gibson <david@gibson.dropbear.id.au>,\n\tBenjamin Herrenschmidt <benh@kernel.crashing.org>,\n\tAlexey Kardashevskiy <aik@ozlabs.ru>, Alexander Graf <agraf@suse.de>", "Date": "Mon, 11 Sep 2017 19:12:14 +0200", "Message-Id": "<20170911171235.29331-1-clg@kaod.org>", "X-Mailer": "git-send-email 2.13.5", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "X-Ovh-Tracer-Id": "14127792031508761427", "X-VR-SPAMSTATE": "OK", "X-VR-SPAMSCORE": "-100", "X-VR-SPAMCAUSE": "gggruggvucftvghtrhhoucdtuddrfeelledrgedtgdduudehucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddm", "Content-Transfer-Encoding": "quoted-printable", "X-detected-operating-system": "by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]", "X-Received-From": "46.105.63.121", "Subject": "[Qemu-devel] [RFC PATCH v2 00/21] Guest exploitation of the XIVE\n\tinterrupt controller (POWER9)", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "=?utf-8?q?C=C3=A9dric_Le_Goater?= <clg@kaod.org>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "On a POWER9 sPAPR machine, the Client Architecture Support (CAS)\nnegotiation process determines whether the guest operates with an\ninterrupt controller using the XICS legacy model, as found on POWER8,\nor in XIVE exploitation mode, the newer POWER9 interrupt model. This\npatchset is a proposal to add XIVE support in POWER9 sPAPR machine.\n\nFollows a model for the XIVE interrupt controller and support for the\nHypervisor's calls which are used to configure the interrupt sources\nand the event/notification queues of the guest. The last patch\nintegrates XIVE in the sPAPR machine.\n\nCode is here:\n\n https://github.com/legoater/qemu/commits/xive\n\nCaveats :\n\n - IRQ allocator : making progress\n\n The sPAPR machine make uses of the interrupt controller very early\n in the initialization sequence to allocate IRQ numbers and populate\n the device tree. CAS requires XIVE to be able to switch interrupt\n model and consequently have the models share a common IRQ allocator. \n\n I have chosen to link the sPAPR XICS interrupt source into XIVE to\n share the ICSIRQState array which acts as an IRQ allocator. This\n can be improved.\n\n - Interrupt presenter :\n\n The register data is directly stored under the ICPState structure\n which is shared with all other sPAPR interrupt controller models.\n\n - KVM support : not addressed yet\n\n The guest needs to be run with kernel_irqchip=off on a POWER9 system.\n\n - LSI : lightly tested.\n \nThanks,\n\nC.\n\nChanges since RFC v1:\n\n - removed initial complexity due to a tentative try to support\n PowerNV. This will come later.\n - removed specific XIVE interrupt source and presenter models\n - renamed files and typedefs\n - removed print_info() handler\n - introduced a CAS reset to rebuild the device tree\n - linked the XIVE model with the sPAPR XICS interrupt source to share\n the IRQ allocator \n - improved hcall support (still some missing but they are not used\n under Linux)\n - improved device tree\n - should have addressed comments in first RFC\n - and much more ... Next version should have a better changelog.\n \n\nCédric Le Goater (21):\n ppc/xive: introduce a skeleton for the sPAPR XIVE interrupt controller\n migration: add VMSTATE_STRUCT_VARRAY_UINT32_ALLOC\n ppc/xive: define the XIVE internal tables\n ppc/xive: provide a link to the sPAPR ICS object under XIVE\n ppc/xive: allocate IRQ numbers for the IPIs\n ppc/xive: introduce handlers for interrupt sources\n ppc/xive: add MMIO handlers for the XIVE interrupt sources\n ppc/xive: describe the XIVE interrupt source flags\n ppc/xive: extend the interrupt presenter model for XIVE\n ppc/xive: add MMIO handlers for the XIVE TIMA\n ppc/xive: push the EQ data in OS event queue\n ppc/xive: notify the CPU when interrupt priority is more privileged\n ppc/xive: handle interrupt acknowledgment by the O/S\n ppc/xive: add support for the SET_OS_PENDING command\n spapr: modify spapr_populate_pci_dt() to use a 'nr_irqs' argument\n spapr: add a XIVE object to the sPAPR machine\n ppc/xive: add hcalls support\n ppc/xive: add device tree support\n ppc/xive: introduce a helper to map the XIVE memory regions\n ppc/xics: introduce a qirq_get() helper in the XICSFabric\n spapr: activate XIVE exploitation mode\n\n default-configs/ppc64-softmmu.mak | 1 +\n hw/intc/Makefile.objs | 1 +\n hw/intc/spapr_xive.c | 821 +++++++++++++++++++++++++++++++++\n hw/intc/spapr_xive_hcall.c | 930 ++++++++++++++++++++++++++++++++++++++\n hw/intc/xics.c | 11 +-\n hw/intc/xive-internal.h | 189 ++++++++\n hw/ppc/spapr.c | 110 ++++-\n hw/ppc/spapr_hcall.c | 6 +\n hw/ppc/spapr_pci.c | 4 +-\n include/hw/pci-host/spapr.h | 2 +-\n include/hw/ppc/spapr.h | 17 +-\n include/hw/ppc/spapr_xive.h | 75 +++\n include/hw/ppc/xics.h | 7 +\n include/migration/vmstate.h | 10 +\n 14 files changed, 2169 insertions(+), 15 deletions(-)\n create mode 100644 hw/intc/spapr_xive.c\n create mode 100644 hw/intc/spapr_xive_hcall.c\n create mode 100644 hw/intc/xive-internal.h\n create mode 100644 include/hw/ppc/spapr_xive.h" }