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{ "id": 811864, "url": "http://patchwork.ozlabs.org/api/covers/811864/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/cover/1504910713-7094-9-git-send-email-linuxram@us.ibm.com/", "project": { "id": 2, "url": "http://patchwork.ozlabs.org/api/projects/2/?format=api", "name": "Linux PPC development", "link_name": "linuxppc-dev", "list_id": "linuxppc-dev.lists.ozlabs.org", "list_email": "linuxppc-dev@lists.ozlabs.org", "web_url": "https://github.com/linuxppc/wiki/wiki", "scm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git", "webscm_url": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/", "list_archive_url_format": "https://lore.kernel.org/linuxppc-dev/{}/", "commit_url_format": "https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}" }, "msgid": "<1504910713-7094-9-git-send-email-linuxram@us.ibm.com>", "list_archive_url": "https://lore.kernel.org/linuxppc-dev/1504910713-7094-9-git-send-email-linuxram@us.ibm.com/", "date": "2017-09-08T22:44:48", "name": "[00/25] powerpc: Memory Protection Keys", "submitter": { "id": 2667, "url": "http://patchwork.ozlabs.org/api/people/2667/?format=api", "name": "Ram Pai", "email": "linuxram@us.ibm.com" }, "mbox": "http://patchwork.ozlabs.org/project/linuxppc-dev/cover/1504910713-7094-9-git-send-email-linuxram@us.ibm.com/mbox/", "series": [ { "id": 2305, "url": "http://patchwork.ozlabs.org/api/series/2305/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=2305", "date": "2017-09-08T22:44:48", "name": "powerpc: Memory Protection Keys", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/2305/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/811864/comments/", "headers": { "Return-Path": "<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Delivered-To": [ "patchwork-incoming@ozlabs.org", "linuxppc-dev@lists.ozlabs.org" ], "Received": [ "from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xptCP1Gcjz9sCZ\n\tfor <patchwork-incoming@ozlabs.org>;\n\tSat, 9 Sep 2017 09:03:13 +1000 (AEST)", "from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xptCP02SZzDrWj\n\tfor <patchwork-incoming@ozlabs.org>;\n\tSat, 9 Sep 2017 09:03:13 +1000 (AEST)", "from mail-qk0-x22a.google.com (mail-qk0-x22a.google.com\n\t[IPv6:2607:f8b0:400d:c09::22a])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xpsrM17YSzDrcf\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tSat, 9 Sep 2017 08:46:43 +1000 (AEST)", "by mail-qk0-x22a.google.com with SMTP id r141so9591244qke.2\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tFri, 08 Sep 2017 15:46:42 -0700 (PDT)", "from localhost.localdomain (50-39-103-96.bvtn.or.frontiernet.net.\n\t[50.39.103.96]) by smtp.gmail.com with ESMTPSA id\n\tx124sm2033726qka.85.2017.09.08.15.46.39\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tFri, 08 Sep 2017 15:46:40 -0700 (PDT)" ], "Authentication-Results": [ "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"ZtmcxB2X\"; dkim-atps=neutral", "lists.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"ZtmcxB2X\"; dkim-atps=neutral", "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gmail.com\n\t(client-ip=2607:f8b0:400d:c09::22a; helo=mail-qk0-x22a.google.com;\n\tenvelope-from=ram.n.pai@gmail.com; receiver=<UNKNOWN>)", "lists.ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"ZtmcxB2X\"; dkim-atps=neutral" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=sender:from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=3s2Rx9k+kZkePR0P52d0WE87muPQ/cRAxyly9wqsmoM=;\n\tb=ZtmcxB2X1HZRozu3672TWlGDPGJR+WPThgq1vuyWUVXul2a56QG1luiDgn9tcWVbAc\n\tRAtMTD0tYzN0iOVybWwAA2GJNJwroxW1B/ZQyFlBQC5IrPwD+NZu21iqveMBTOOiIo79\n\tEIDibLvaaSZNz5/5naMAGHU0RJ4BIJaVAHZEOPgl8zjaQJTcc8y8T2kjAkkKNGej8+sU\n\tlUf7MPLthOkbjlg6asYta3wnslv43YlbiFin2gAkV3oyOEejn0tZeB27ODGX77gMras4\n\tzT7Vf2ybiSeJGqWNWT+WQcl6etM/KivZhI6mV/NA7E4OxhRPcXTAQcJEeDq1GQ0AqYzM\n\tjDVg==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:sender:from:to:cc:subject:date:message-id\n\t:in-reply-to:references;\n\tbh=3s2Rx9k+kZkePR0P52d0WE87muPQ/cRAxyly9wqsmoM=;\n\tb=qAIPpxdzgje06XXqWjVfYS5Al6v0shUaIKWjopuH7dtWYu+EtjYRqYE1oCpmfnFIR6\n\t6KvTvbkup2ulKWAJQZzbf2uOXaXpp1GxzsAd1q2xKaI4m7I7J+OFNB2QiyTLkLSzhgoW\n\t7r4YJWPHqReDmgfOEspZTjjy11nMio33x4Cw9DQepFo04vjr5aP2RTATminfWmmTgpzS\n\tY+Ku8YmlgBJ5mzM3xKU4BuEZakxNS8gET5x1OVDRyUtjAtMbUDliW9k19FeX0zppIbZ4\n\tvlEoHADKzfrMuO3J7BMq1hazwyw+0fphcctwuvr1TRjEzZyyQaoGIyTz7vzJfFFvtEms\n\tHK3Q==", "X-Gm-Message-State": "AHPjjUgl/VyDj0IG6sDv1AZ7P4Lr9UYUYROUFnM66RqTlXEbpvdJ++5C\n\tcj/clGRvItoiv7SW", "X-Google-Smtp-Source": "AOwi7QBjxN1Z+WEQAinJxqWtdzaucEYrWqkkIMEyFqocVvnAopT6uWe5mIh9kr5tdPWt2N9w/dHtKQ==", "X-Received": "by 10.55.21.5 with SMTP id f5mr852415qkh.335.1504910800785;\n\tFri, 08 Sep 2017 15:46:40 -0700 (PDT)", "From": "Ram Pai <linuxram@us.ibm.com>", "To": "mpe@ellerman.id.au,\n\tlinuxppc-dev@lists.ozlabs.org", "Subject": "[PATCH 00/25] powerpc: Memory Protection Keys", "Date": "Fri, 8 Sep 2017 15:44:48 -0700", "Message-Id": "<1504910713-7094-9-git-send-email-linuxram@us.ibm.com>", "X-Mailer": "git-send-email 1.7.1", "In-Reply-To": "<1504910713-7094-1-git-send-email-linuxram@us.ibm.com>", "References": "<1504910713-7094-1-git-send-email-linuxram@us.ibm.com>", "X-BeenThere": "linuxppc-dev@lists.ozlabs.org", "X-Mailman-Version": "2.1.23", "Precedence": "list", "List-Id": "Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>", "List-Unsubscribe": "<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>", "List-Archive": "<http://lists.ozlabs.org/pipermail/linuxppc-dev/>", "List-Post": "<mailto:linuxppc-dev@lists.ozlabs.org>", "List-Help": "<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>", "List-Subscribe": "<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>", "Cc": "ebiederm@xmission.com, linuxram@us.ibm.com, mhocko@kernel.org,\n\tpaulus@samba.org, aneesh.kumar@linux.vnet.ibm.com,\n\tbauerman@linux.vnet.ibm.com, khandual@linux.vnet.ibm.com", "Errors-To": "linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org", "Sender": "\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>" }, "content": "Memory protection keys enable applications to protect its\naddress space from inadvertent access from or corruption\nby itself.\n\nThese patches along with the pte-bit freeing patch series\nenables the protection key feature on powerpc; 4k and 64k\nhashpage kernels. A subsequent patch series that changes\nthe generic and x86 code will expose memkey features\nthrough sysfs and provide testcases and Documentation\nupdates.\n\nPatches are based on powerpc -next branch. All patches\ncan be found at --\nhttps://github.com/rampai/memorykeys.git memkey.v8\n\nThe overall idea:\n-----------------\n A process allocates a key and associates it with\n an address range within its address space.\n The process then can dynamically set read/write \n permissions on the key without involving the \n kernel. Any code that violates the permissions\n of the address space; as defined by its associated\n key, will receive a segmentation fault.\n\nThis patch series enables the feature on PPC64 HPTE\nplatform.\n\nISA3.0 section 5.7.13 describes the detailed\nspecifications.\n\n\nHighlevel view of the design:\n---------------------------\nWhen an application associates a key with a address\naddress range, program the key in the Linux PTE.\nWhen the MMU detects a page fault, allocate a hash\npage and program the key into HPTE. And finally\nwhen the MMU detects a key violation; due to\ninvalid application access, invoke the registered\nsignal handler and provide the violated key number.\n\n\nTesting:\n-------\nThis patch series has passed all the protection key\ntests available in the selftests directory.The\ntests are updated to work on both x86 and powerpc.\nNOTE: All the selftest related patches will be part\nof a separate patch series.\n\n\nHistory:\n-------\nversion v8:\n\t(1) Contents of the AMR register withdrawn from\n \tthe siginfo structure. Applications can always\n\tread the AMR register.\n\t(2) AMR/IAMR/UAMOR are now available through \n\t\tptrace system call. -- thanks to Thiago\n\t(3) code changes to handle legacy power cpus\n\tthat do not support execute-disable.\n\t(4) incorporates many code improvement\n\t\tsuggestions.\n\nversion v7:\n\t(1) refers to device tree property to enable\n\t\tprotection keys.\n\t(2) adds 4K PTE support.\n\t(3) fixes a couple of bugs noticed by Thiago\n\t(4) decouples this patch series from arch-\n\t independent code. This patch series can\n\t now stand by itself, with one kludge\n\t patch(2).\nversion v7:\n\t(1) refers to device tree property to enable\n\t\tprotection keys.\n\t(2) adds 4K PTE support.\n\t(3) fixes a couple of bugs noticed by Thiago\n\t(4) decouples this patch series from arch-\n\t independent code. This patch series can\n\t now stand by itself, with one kludge\n\t patch(2).\n\nversion v6:\n\t(1) selftest changes are broken down into 20\n\t\tincremental patches.\n\t(2) A separate key allocation mask that\n \t\tincludes PKEY_DISABLE_EXECUTE is \n\t\tadded for powerpc\n\t(3) pkey feature is enabled for 64K HPT case\n\t\tonly. RPT and 4k HPT is disabled.\n\t(4) Documentation is updated to better \n\t\tcapture the semantics.\n\t(5) introduced arch_pkeys_enabled() to find\n \t\tif an arch enables pkeys. Correspond-\n\t\ting change the logic that displays\n\t\tkey value in smaps.\n\t(6) code rearranged in many places based on\n \t\tcomments from Dave Hansen, Balbir,\n\t \tAnshuman.\t\n\t(7) fixed one bug where a bogus key could be\n\t\tassociated successfully in\n\t\tpkey_mprotect().\n\nversion v5:\n\t(1) reverted back to the old design -- store\n\t the key in the pte, instead of bypassing\n\t it. The v4 design slowed down the hash\n\t page path.\n\t(2) detects key violation when kernel is told\n \t\tto access user pages.\n\t(3) further refined the patches into smaller\n \t\tconsumable units\n\t(4) page faults handlers captures the fault-\n\t\ting key \n\t from the pte instead of the vma. This\n\t closes a race between where the key \n\t update in the vma and a key fault caused\n\t by the key programmed in the pte.\n\t(5) a key created with access-denied should\n\t also set it up to deny write. Fixed it.\n\t(6) protection-key number is displayed in\n \t\tsmaps the x86 way.\n\nversion v4:\n\t(1) patches no more depend on the pte bits\n \t\tto program the hpte\n\t\t\t-- comment by Balbir\n\t(2) documentation updates\n\t(3) fixed a bug in the selftest.\n\t(4) unlike x86, powerpc lets signal handler\n\t\tchange key permission bits; the\n\t \tchange will persist across signal\n\t \thandler boundaries. Earlier we\n\t \tallowed the signal handler to\n\t \tmodify a field in the siginfo\n\t\tstructure which would than be used\n \t\tby the kernel to program the key\n\t\tprotection register (AMR)\n \t\t -- resolves a issue raised by Ben.\n \t\t\"Calls to sys_swapcontext with a\n\t\tmade-up context will end up with a\n\t\tcrap AMR if done by code who didn't\n\t \tknow about that register\".\n\t(5) these changes enable protection keys on\n \t\t4k-page kernel aswell.\n\nversion v3:\n\t(1) split the patches into smaller consumable\n\t\tpatches.\n\t(2) added the ability to disable execute\n \t\tpermission on a key at creation.\n\t(3) rename calc_pte_to_hpte_pkey_bits() to\n\t pte_to_hpte_pkey_bits()\n\t\t-- suggested by Anshuman\n\t(4) some code optimization and clarity in\n\t\tdo_page_fault() \n\t(5) A bug fix while invalidating a hpte slot\n\t\tin __hash_page_4K()\n \t\t-- noticed by Aneesh\n\t\n\nversion v2:\n\t(1) documentation and selftest added.\n \t(2) fixed a bug in 4k hpte backed 64k pte\n \t\twhere page invalidation was not\n\t\tdone correctly, and initialization\n\t \tof second-part-of-the-pte was not\n\t\tdone correctly if the pte was not\n\t \tyet Hashed with a hpte.\n\t \t --\tReported by Aneesh.\n\t(3) Fixed ABI breakage caused in siginfo\n \t\tstructure.\n\t\t-- Reported by Anshuman.\n\t\n\nversion v1: Initial version\n\nRam Pai (24):\n powerpc: initial pkey plumbing\n powerpc: define an additional vma bit for protection keys.\n powerpc: track allocation status of all pkeys\n powerpc: helper function to read,write AMR,IAMR,UAMOR registers\n powerpc: helper functions to initialize AMR, IAMR and UAMOR registers\n powerpc: cleaup AMR,iAMR when a key is allocated or freed\n powerpc: implementation for arch_set_user_pkey_access()\n powerpc: sys_pkey_alloc() and sys_pkey_free() system calls\n powerpc: ability to create execute-disabled pkeys\n powerpc: store and restore the pkey state across context switches\n powerpc: introduce execute-only pkey\n powerpc: ability to associate pkey to a vma\n powerpc: implementation for arch_override_mprotect_pkey()\n powerpc: map vma key-protection bits to pte key bits.\n powerpc: sys_pkey_mprotect() system call\n powerpc: Program HPTE key protection bits\n powerpc: helper to validate key-access permissions of a pte\n powerpc: check key protection for user page access\n powerpc: implementation for arch_vma_access_permitted()\n powerpc: Handle exceptions caused by pkey violation\n powerpc: introduce get_pte_pkey() helper\n powerpc: capture the violated protection key on fault\n powerpc: Deliver SEGV signal on pkey violation\n powerpc: Enable pkey subsystem\n\nThiago Jung Bauermann (1):\n powerpc/ptrace: Add memory protection key regset\n\n arch/powerpc/Kconfig | 16 +\n arch/powerpc/include/asm/book3s/64/mmu-hash.h | 10 +\n arch/powerpc/include/asm/book3s/64/mmu.h | 10 +\n arch/powerpc/include/asm/book3s/64/pgtable.h | 74 +++++-\n arch/powerpc/include/asm/cputable.h | 15 +-\n arch/powerpc/include/asm/mman.h | 16 +-\n arch/powerpc/include/asm/mmu_context.h | 21 ++\n arch/powerpc/include/asm/paca.h | 3 +\n arch/powerpc/include/asm/pkeys.h | 252 +++++++++++++++++\n arch/powerpc/include/asm/processor.h | 5 +\n arch/powerpc/include/asm/systbl.h | 3 +\n arch/powerpc/include/asm/unistd.h | 6 +-\n arch/powerpc/include/uapi/asm/elf.h | 1 +\n arch/powerpc/include/uapi/asm/mman.h | 6 +\n arch/powerpc/include/uapi/asm/unistd.h | 3 +\n arch/powerpc/kernel/asm-offsets.c | 5 +\n arch/powerpc/kernel/process.c | 10 +\n arch/powerpc/kernel/prom.c | 19 ++\n arch/powerpc/kernel/ptrace.c | 66 +++++\n arch/powerpc/kernel/setup_64.c | 4 +\n arch/powerpc/kernel/traps.c | 22 ++\n arch/powerpc/mm/Makefile | 1 +\n arch/powerpc/mm/fault.c | 46 +++-\n arch/powerpc/mm/hash_utils_64.c | 26 ++\n arch/powerpc/mm/mmu_context_book3s64.c | 2 +\n arch/powerpc/mm/pkeys.c | 374 +++++++++++++++++++++++++\n include/uapi/linux/elf.h | 1 +\n 27 files changed, 1000 insertions(+), 17 deletions(-)\n create mode 100644 arch/powerpc/include/asm/pkeys.h\n create mode 100644 arch/powerpc/mm/pkeys.c" }