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{
    "id": 810932,
    "url": "http://patchwork.ozlabs.org/api/covers/810932/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/cover/cover.1504776489.git.talho@nvidia.com/",
    "project": {
        "id": 21,
        "url": "http://patchwork.ozlabs.org/api/projects/21/?format=api",
        "name": "Linux Tegra Development",
        "link_name": "linux-tegra",
        "list_id": "linux-tegra.vger.kernel.org",
        "list_email": "linux-tegra@vger.kernel.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<cover.1504776489.git.talho@nvidia.com>",
    "list_archive_url": null,
    "date": "2017-09-07T09:31:00",
    "name": "[0/4] firmware: tegra: add checks for BPMP error return code",
    "submitter": {
        "id": 72177,
        "url": "http://patchwork.ozlabs.org/api/people/72177/?format=api",
        "name": "Timo Alho",
        "email": "talho@nvidia.com"
    },
    "mbox": "http://patchwork.ozlabs.org/project/linux-tegra/cover/cover.1504776489.git.talho@nvidia.com/mbox/",
    "series": [
        {
            "id": 1959,
            "url": "http://patchwork.ozlabs.org/api/series/1959/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/list/?series=1959",
            "date": "2017-09-07T09:31:00",
            "name": "firmware: tegra: add checks for BPMP error return code",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/1959/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/covers/810932/comments/",
    "headers": {
        "Return-Path": "<linux-tegra-owner@vger.kernel.org>",
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            "from talho-ln2.nvidia.com (Not Verified[10.21.24.139]) by\n\thqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 5, 8150)\n\tid <B59b111e60000>; Thu, 07 Sep 2017 02:31:18 -0700"
        ],
        "X-PGP-Universal": "processed;\n\tby hqpgpgate101.nvidia.com on Thu, 07 Sep 2017 02:31:43 -0700",
        "From": "Timo Alho <talho@nvidia.com>",
        "To": "<thierry.reding@gmail.com>",
        "CC": "<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>,\n\tTimo Alho <talho@nvidia.com>",
        "Subject": "[PATCH 0/4] firmware: tegra: add checks for BPMP error return code",
        "Date": "Thu, 7 Sep 2017 12:31:00 +0300",
        "Message-ID": "<cover.1504776489.git.talho@nvidia.com>",
        "X-Mailer": "git-send-email 2.7.4",
        "X-NVConfidentiality": "public",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain",
        "Sender": "linux-tegra-owner@vger.kernel.org",
        "Precedence": "bulk",
        "List-ID": "<linux-tegra.vger.kernel.org>",
        "X-Mailing-List": "linux-tegra@vger.kernel.org"
    },
    "content": "Hi Thierry,\n\nThere is a bug in the BPMP driver as error code in response message is\nnot being checked.\n\nPatch 1 adds the error code as part of tegra_bpmp_message struct and\npropagates that code to callers\n\nPatches 2 through 4 add code to client drivers to check the error code\nappropriately\n\nBR,\nTimo\n\nTimo Alho (4):\n  firmware: tegra: propagate error code to caller\n  clk: tegra: check BPMP response return code\n  reset: tegra: check BPMP response return code\n  soc/tegra: bpmp: check BPMP response return code\n\n drivers/clk/tegra/clk-bpmp.c       | 15 ++++++++++-----\n drivers/firmware/tegra/bpmp.c      | 22 ++++++++++++++++------\n drivers/reset/tegra/reset-bpmp.c   |  9 ++++++++-\n drivers/soc/tegra/powergate-bpmp.c | 15 +++++++++++++--\n include/soc/tegra/bpmp.h           |  1 +\n 5 files changed, 48 insertions(+), 14 deletions(-)"
}