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{ "id": 808842, "url": "http://patchwork.ozlabs.org/api/covers/808842/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/cover/1504286483-23327-1-git-send-email-eric.auger@redhat.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1504286483-23327-1-git-send-email-eric.auger@redhat.com>", "list_archive_url": null, "date": "2017-09-01T17:21:03", "name": "[v7,00/20] ARM SMMUv3 Emulation Support", "submitter": { "id": 69187, "url": "http://patchwork.ozlabs.org/api/people/69187/?format=api", "name": "Eric Auger", "email": "eric.auger@redhat.com" }, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/cover/1504286483-23327-1-git-send-email-eric.auger@redhat.com/mbox/", "series": [ { "id": 1083, "url": "http://patchwork.ozlabs.org/api/series/1083/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=1083", "date": "2017-09-01T17:21:03", "name": "ARM SMMUv3 Emulation Support", "version": 7, "mbox": "http://patchwork.ozlabs.org/series/1083/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/808842/comments/", "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)", "ext-mx04.extmail.prod.ext.phx2.redhat.com;\n\tdmarc=none (p=none dis=none) header.from=redhat.com", "ext-mx04.extmail.prod.ext.phx2.redhat.com;\n\tspf=fail smtp.mailfrom=eric.auger@redhat.com" ], "Received": [ "from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xkQzd2nx3z9t2x\n\tfor <incoming@patchwork.ozlabs.org>;\n\tSat, 2 Sep 2017 03:22:35 +1000 (AEST)", "from localhost ([::1]:51214 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dnpeK-0004jj-Jl\n\tfor incoming@patchwork.ozlabs.org; Fri, 01 Sep 2017 13:22:32 -0400", "from eggs.gnu.org ([2001:4830:134:3::10]:36063)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <eric.auger@redhat.com>) id 1dnpdf-0004eN-2p\n\tfor qemu-devel@nongnu.org; Fri, 01 Sep 2017 13:21:54 -0400", "from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <eric.auger@redhat.com>) id 1dnpdZ-0001nu-Ig\n\tfor qemu-devel@nongnu.org; Fri, 01 Sep 2017 13:21:51 -0400", "from mx1.redhat.com ([209.132.183.28]:50614)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from <eric.auger@redhat.com>)\n\tid 1dnpdT-0001i8-Gx; Fri, 01 Sep 2017 13:21:39 -0400", "from smtp.corp.redhat.com\n\t(int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1.redhat.com (Postfix) with ESMTPS id 1D9CA8B13F;\n\tFri, 1 Sep 2017 17:21:38 +0000 (UTC)", "from localhost.localdomain.com (ovpn-117-241.ams2.redhat.com\n\t[10.36.117.241])\n\tby smtp.corp.redhat.com (Postfix) with ESMTP id A7FB7627DE;\n\tFri, 1 Sep 2017 17:21:25 +0000 (UTC)" ], "DMARC-Filter": "OpenDMARC Filter v1.3.2 mx1.redhat.com 1D9CA8B13F", "From": "Eric Auger <eric.auger@redhat.com>", "To": "eric.auger.pro@gmail.com, eric.auger@redhat.com, peter.maydell@linaro.org,\n\tqemu-arm@nongnu.org, qemu-devel@nongnu.org, prem.mallappa@gmail.com, \n\talex.williamson@redhat.com", "Date": "Fri, 1 Sep 2017 19:21:03 +0200", "Message-Id": "<1504286483-23327-1-git-send-email-eric.auger@redhat.com>", "X-Scanned-By": "MIMEDefang 2.79 on 10.5.11.15", "X-Greylist": "Sender IP whitelisted, not delayed by milter-greylist-4.5.16\n\t(mx1.redhat.com [10.5.110.28]);\n\tFri, 01 Sep 2017 17:21:38 +0000 (UTC)", "X-detected-operating-system": "by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]", "X-Received-From": "209.132.183.28", "Subject": "[Qemu-devel] [PATCH v7 00/20] ARM SMMUv3 Emulation Support", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.21", "Precedence": "list", "List-Id": "<qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<http://lists.nongnu.org/archive/html/qemu-devel/>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Cc": "mohun106@gmail.com, drjones@redhat.com, tcain@qti.qualcomm.com,\n\tRadha.Chintakuntla@cavium.com, Sunil.Goutham@cavium.com,\n\tmst@redhat.com, jean-philippe.brucker@arm.com, tn@semihalf.com,\n\twill.deacon@arm.com, robin.murphy@arm.com, peterx@redhat.com,\n\tedgar.iglesias@gmail.com, bharat.bhushan@nxp.com,\n\tchristoffer.dall@linaro.org, wtownsen@redhat.com", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>" }, "content": "This series implements the emulation code for ARM SMMUv3.\n\nChanges since v6:\n- DPDK testpmd now running on guest with 2 assigned VFs\n- Changed the instantiation method: add the following option to\n the QEMU command line\n -device smmuv3 # for virtio/vhost use cases\n -device smmuv3,caching-mode # for vfio use cases (based on [1])\n- splitted the series into smaller patches to allow the review\n- the VFIO integration based on \"tlbi-on-map\" smmuv3 driver\n is isolated from the rest: last 2 patches, not for upstream.\n This is shipped for testing/bench until a better solution is found.\n- Reworked permission flag checks and event generation\n\ntesting:\n- in dt and ACPI modes\n- virtio-net-pci and vhost-net devices using dma ops with various\n guest page sizes [2]\n- assigned VFs using dma ops [3]:\n - AMD Overdrive and igbvf passthrough (using gsi direct mapping)\n - Cavium ThunderX and ixgbevf passthrough (using KVM MSI routing)\n- DPDK testpmd on guest running with VFIO user space drivers (2 igbvf) [3]\n with guest and host page size equal (4kB)\n\nKnown limitations:\n- no VMSAv8-32 suport\n- no nested stage support (S1 + S2)\n- no support for HYP mappings\n- register fine emulation, commands, interrupts and errors were\n not accurately tested. Handling is sufficient to run use cases\n described above though.\n- interrupts and event generation not observed yet.\n\nBest Regards\n\nEric\n\nThis series can be found at:\nv7: https://github.com/eauger/qemu/tree/v2.10.0-SMMU-v7\nPrevious version at:\nv6: https://github.com/eauger/qemu/tree/v2.10.0-rc2-SMMU-v6\n\nReferences:\n[1] [RFC v2 0/4] arm-smmu-v3 tlbi-on-map option\n https://lkml.org/lkml/2017/8/11/426\n\n[2] qemu cmd line excerpt:\n-device smmuv3 \\\n-netdev tap,id=tap0,script=no,downscript=no,ifname=tap0,vhost=off \\\n-device virtio-net-pci,netdev=tap0,mac=6a:f5:10:b1:3d:d2,iommu_platform,disable-modern=off,disable-legacy=on \\\n[3] use -device smmuv3,caching-mode\n\n\nHistory:\nv6 -> v7:\n- see above\n\nv5 -> v6:\n- Rebase on 2.10 and IOMMUMemoryRegion\n- add ACPI TLBI_ON_MAP support (VFIO integration also works in\n ACPI mode)\n- fix block replay\n- handle implementation defined SMMU_CMD_TLBI_NH_VA_AM cmd\n (goes along with TLBI_ON_MAP FW quirk)\n- replay systematically unmap the whole range first\n- smmuv3_map_hook does not unmap anymore and the unmap is done\n before the replay\n- add and use smmuv3_context_device_invalidate instead of\n blindly replaying everything\n\nv4 -> v5:\n- initial_level now part of SMMUTransCfg\n- smmu_page_walk_64 takes into account the max input size\n- implement sys->iommu_ops.replay and sys->iommu_ops.notify_flag_changed\n- smmuv3_translate: bug fix: don't walk on bypass\n- smmu_update_qreg: fix PROD index update\n- I did not yet address Peter's comments as the code is not mature enough\n to be split into sub patches.\n\nv3 -> v4 [Eric]:\n- page table walk rewritten to allow scan of the page table within a\n range of IOVA. This prepares for VFIO integration and replay.\n- configuration parsing partially reworked.\n- do not advertise unsupported/untested features: S2, S1 + S2, HYP,\n PRI, ATS, ..\n- added ACPI table generation\n- migrated to dynamic traces\n- mingw compilation fix\n\nv2 -> v3 [Eric]:\n- rebased on 2.9\n- mostly code and patch reorganization to ease the review process\n- optional patches removed. They may be handled separately. I am currently\n working on ACPI enablement.\n- optional instantiation of the smmu in mach-virt\n- removed [2/9] (fdt functions) since not mandated\n- start splitting main patch into base and derived object\n- no new function feature added\n\nv1 -> v2 [Prem]:\n- Adopted review comments from Eric Auger\n - Make SMMU_DPRINTF to internally call qemu_log\n (since translation requests are too many, we need control\n on the type of log we want)\n - SMMUTransCfg modified to suite simplicity\n - Change RegInfo to uint64 register array\n - Code cleanup\n - Test cleanups\n- Reshuffled patches\n\nv0 -> v1 [Prem]:\n- As per SMMUv3 spec 16.0 (only is_ste_consistant() is noticeable)\n- Reworked register access/update logic\n- Factored out translation code for\n - single point bug fix\n - sharing/removal in future\n- (optional) Unit tests added, with PCI test device\n - S1 with 4k/64k, S1+S2 with 4k/64k\n - (S1 or S2) only can be verified by Linux 4.7 driver\n - (optional) Priliminary ACPI support\n\nv0 [Prem]:\n- Implements SMMUv3 spec 11.0\n- Supported for PCIe devices,\n- Command Queue and Event Queue supported\n- LPAE only, S1 is supported and Tested, S2 not tested\n- BE mode Translation not supported\n- IRQ support (legacy, no MSI)\n\nEric Auger (18):\n hw/arm/smmu-common: smmu base device and datatypes\n hw/arm/smmu-common: IOMMU memory region and address space setup\n hw/arm/smmu-common: smmu_read/write_sysmem\n hw/arm/smmu-common: VMSAv8-64 page table walk\n hw/arm/smmuv3: Wired IRQ and GERROR helpers\n hw/arm/smmuv3: Queue helpers\n hw/arm/smmuv3: Implement MMIO write operations\n hw/arm/smmuv3: Event queue recording helper\n hw/arm/smmuv3: Implement translate callback\n target/arm/kvm: Translate the MSI doorbell in kvm_arch_fixup_msi_route\n hw/arm/smmuv3: Implement data structure and TLB invalidation\n notifications\n hw/arm/smmuv3: Implement IOMMU memory region replay callback\n hw/arm/virt: Store the PCI host controller dt phandle\n hw/arm/sysbus-fdt: Pass the VirtMachineState to the node creation\n functions\n hw/arm/sysbus-fdt: Pass the platform bus base address in\n PlatformBusFDTData\n hw/arm/sysbus-fdt: Allow smmuv3 dynamic instantiation\n hw/arm/smmuv3: [not for upstream] add SMMU_CMD_TLBI_NH_VA_AM handling\n hw/arm/smmuv3: [not for upstream] Add caching-mode option\n\nPrem Mallappa (2):\n hw/arm/smmuv3: Skeleton\n hw/arm/virt-acpi-build: Add smmuv3 node in IORT table\n\n default-configs/aarch64-softmmu.mak | 1 +\n hw/arm/Makefile.objs | 1 +\n hw/arm/smmu-common.c | 527 ++++++++++++++++\n hw/arm/smmu-internal.h | 105 ++++\n hw/arm/smmuv3-internal.h | 584 +++++++++++++++++\n hw/arm/smmuv3.c | 1181 +++++++++++++++++++++++++++++++++++\n hw/arm/sysbus-fdt.c | 129 +++-\n hw/arm/trace-events | 48 ++\n hw/arm/virt-acpi-build.c | 63 +-\n hw/arm/virt.c | 6 +-\n include/hw/acpi/acpi-defs.h | 15 +\n include/hw/arm/smmu-common.h | 123 ++++\n include/hw/arm/smmuv3.h | 80 +++\n include/hw/arm/sysbus-fdt.h | 2 +\n include/hw/arm/virt.h | 15 +\n target/arm/kvm.c | 27 +\n target/arm/trace-events | 3 +\n 17 files changed, 2886 insertions(+), 24 deletions(-)\n create mode 100644 hw/arm/smmu-common.c\n create mode 100644 hw/arm/smmu-internal.h\n create mode 100644 hw/arm/smmuv3-internal.h\n create mode 100644 hw/arm/smmuv3.c\n create mode 100644 include/hw/arm/smmu-common.h\n create mode 100644 include/hw/arm/smmuv3.h" }