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    "date": "2017-09-01T08:00:31",
    "name": "[00/10] spi-nor: intel-spi: Various fixes and enhancements",
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        "name": "Bin Meng",
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            "date": "2017-09-01T08:00:33",
            "name": "spi-nor: intel-spi: Various fixes and enhancements",
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        "X-Received": "by 10.107.205.194 with SMTP id d185mr807153iog.8.1504252579742; \n\tFri, 01 Sep 2017 00:56:19 -0700 (PDT)",
        "From": "Bin Meng <bmeng.cn@gmail.com>",
        "To": "Mika Westerberg <mika.westerberg@linux.intel.com>,\n\tCyrille Pitchen <cyrille.pitchen@wedev4u.fr>,\n\tMarek Vasut <marek.vasut@gmail.com>,\n\tBoris Brezillon <boris.brezillon@free-electrons.com>,\n\tBrian Norris <computersforpeace@gmail.com>,\n\tRichard Weinberger <richard@nod.at>,\n\tDavid Woodhouse <dwmw2@infradead.org>, \n\tlinux-mtd <linux-mtd@lists.infradead.org>,\n\tlinux-kernel <linux-kernel@vger.kernel.org>",
        "Subject": "[PATCH 00/10] spi-nor: intel-spi: Various fixes and enhancements",
        "Date": "Fri,  1 Sep 2017 01:00:31 -0700",
        "Message-Id": "<1504252841-2445-1-git-send-email-bmeng.cn@gmail.com>",
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        "Cc": "Stefan Roese <sr@denx.de>",
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    "content": "This series does several bug fixes and clean ups against the intel-spi\nspi-nor driver, as well as enhancements to make the driver independent\non the underlying BIOS/bootloader.\n\nAt present the driver uses the HW sequencer for the read/write/erase on\nall supported platforms, read_reg/write_reg for BXT, and the SW sequencer\nfor read_reg/write_reg for BYT/LPT. The way the driver uses the HW and SW\nsequencer relies on some programmed register settings and hence creates\nunneeded dependencies with the underlying BIOS/bootloader. For example,\nthe driver unfortunately does not work as expected when booting from\nIntel Baytrail FSP based bootloaders like U-Boot, as the Baytrail FSP\ndoes not set up some SPI controller settings to make the driver happy.\nNow such limitation has been removed with this series.\n\n\nBin Meng (10):\n  spi-nor: intel-spi: Fix number of protected range registers for\n    BYT/LPT\n  spi-nor: intel-spi: Remove useless 'buf' parameter in the HW/SW cycle\n  spi-nor: intel-spi: Fix broken software sequencing codes\n  spi-nor: intel-spi: Check transfer length in the HW/SW cycle\n  spi-nor: intel-spi: Use SW sequencer for BYT/LPT\n  spi-nor: intel-spi: Remove 'Atomic Cycle Sequence' in\n    intel_spi_write()\n  spi-nor: intel-spi: Don't assume OPMENU0/1 to be programmed by BIOS\n  spi-nor: intel-spi: Remove the unnecessary HSFSTS register RW\n  spi-nor: intel-spi: Rename swseq to swseq_reg in 'struct intel_spi'\n  spi-nor: intel-spi: Fall back to use SW sequencer to erase\n\n drivers/mtd/spi-nor/intel-spi.c | 209 +++++++++++++++++++++++++++++-----------\n 1 file changed, 151 insertions(+), 58 deletions(-)"
}