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{ "id": 808251, "url": "http://patchwork.ozlabs.org/api/covers/808251/?format=api", "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/cover/20170831135226.19784-1-jbrunet@baylibre.com/", "project": { "id": 37, "url": "http://patchwork.ozlabs.org/api/projects/37/?format=api", "name": "Devicetree Bindings", "link_name": "devicetree-bindings", "list_id": "devicetree.vger.kernel.org", "list_email": "devicetree@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170831135226.19784-1-jbrunet@baylibre.com>", "list_archive_url": null, "date": "2017-08-31T13:52:17", "name": "[v3,0/9] ARM64: dts: meson: update around mmc", "submitter": { "id": 69839, "url": "http://patchwork.ozlabs.org/api/people/69839/?format=api", "name": "Jerome Brunet", "email": "jbrunet@baylibre.com" }, "mbox": "http://patchwork.ozlabs.org/project/devicetree-bindings/cover/20170831135226.19784-1-jbrunet@baylibre.com/mbox/", "series": [ { "id": 829, "url": "http://patchwork.ozlabs.org/api/series/829/?format=api", "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=829", "date": "2017-08-31T13:52:17", "name": "ARM64: dts: meson: update around mmc", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/829/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/808251/comments/", "headers": { "Return-Path": "<devicetree-owner@vger.kernel.org>", "X-Original-To": "incoming-dt@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-dt@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)", "ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=baylibre-com.20150623.gappssmtp.com\n\theader.i=@baylibre-com.20150623.gappssmtp.com header.b=\"T4u0gjwF\"; \n\tdkim-atps=neutral" ], "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xjkMl0CRRz9sPt\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tThu, 31 Aug 2017 23:52:34 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751359AbdHaNwd (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tThu, 31 Aug 2017 09:52:33 -0400", "from mail-wm0-f46.google.com ([74.125.82.46]:37547 \"EHLO\n\tmail-wm0-f46.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751053AbdHaNwb (ORCPT\n\t<rfc822; devicetree@vger.kernel.org>); Thu, 31 Aug 2017 09:52:31 -0400", "by mail-wm0-f46.google.com with SMTP id u26so4960671wma.0\n\tfor <devicetree@vger.kernel.org>;\n\tThu, 31 Aug 2017 06:52:31 -0700 (PDT)", "from localhost.localdomain ([90.63.244.31])\n\tby smtp.googlemail.com with ESMTPSA id\n\tz1sm147959wmz.45.2017.08.31.06.52.28\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tThu, 31 Aug 2017 06:52:28 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=baylibre-com.20150623.gappssmtp.com; s=20150623;\n\th=from:to:cc:subject:date:message-id;\n\tbh=wckKmk3z2I8P1GiKlQBioEE7e+fvsJzhuGwc3u2M3lg=;\n\tb=T4u0gjwFiZsZbKXljIlWk80JRh5ua25OS72TKT3ZbTUKfna+N8prIPZ5gLp8r+e1iC\n\t5Y0XgPmq0n1JNFrhuT5fQJ2ECuDih6DkrYsQSSarojCyg0DHxPZqHjGb36tTfqLaIIfZ\n\tOfRyuAezzXoqwu3VrfuNq2gSrnTesEyzhu1HhNu6Z2VTLv4zwa+o5lg3lYRnpqDUnQFm\n\tk+NmweNrSUOoJomVZklT0JeZ0OZqrCIlVzaiW9crceGa6cwEw6hf8zUHSAe/7bruQsTn\n\t8ZbGzPmYk+pgSiHr/dr4rLgJHr1SAYvjIrfruZo47s5AnxojPj9K2cRGSQfQw7VSa4G4\n\tK6Lg==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id;\n\tbh=wckKmk3z2I8P1GiKlQBioEE7e+fvsJzhuGwc3u2M3lg=;\n\tb=C9I3Ncttnocxcy307H9nc0vtKmsPhf/OZucJsSt6ycF7RJnWCjri25uIsau17I9yt9\n\t7Jl633yphni7owDpuIG/75ItDnv5Smwg65T/22SmKw/JI/ObDX0KIXalj8JBOHc8PAwF\n\t2rZ1idWEnQ07IS56ATB3Vli1a/37FnA4KLGXwQe0/+5mY8DTl6epMYWSToG2cno/pnKr\n\tCyy6AYd4Ko726y9H3pcCi7mbAx6KC133jZcqPxy9c2i6EAHFPL2zOaHLVKjwmI377M7A\n\td1JuTrHfZMA/PhH0OKzxhNPnMmg3vOhOHiNhcpe5VsqNPyx+vKjj/Iwdqgg0Bq2Oi2Kt\n\tIWJw==", "X-Gm-Message-State": "AHPjjUjXeSl794HgbL0Vd5+vynf2Ez/ab8ihMgBpLuStCiuS1EiomlIE\n\tH9H4krFBeCR13vFH", "X-Google-Smtp-Source": "ADKCNb4+XjOTf2bolBy2UVtiokQMb5XOJKvnK7ngmD+4Mf2e8Ps2hhCHzVKSmxs8vmL/aVnZberI9Q==", "X-Received": "by 10.28.97.197 with SMTP id v188mr722597wmb.98.1504187550558;\n\tThu, 31 Aug 2017 06:52:30 -0700 (PDT)", "From": "Jerome Brunet <jbrunet@baylibre.com>", "To": "Kevin Hilman <khilman@baylibre.com>, Carlo Caione <carlo@caione.org>", "Cc": "Jerome Brunet <jbrunet@baylibre.com>,\n\tlinux-amlogic@lists.infradead.org, devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org", "Subject": "[PATCH v3 0/9] ARM64: dts: meson: update around mmc", "Date": "Thu, 31 Aug 2017 15:52:17 +0200", "Message-Id": "<20170831135226.19784-1-jbrunet@baylibre.com>", "X-Mailer": "git-send-email 2.9.5", "Sender": "devicetree-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<devicetree.vger.kernel.org>", "X-Mailing-List": "devicetree@vger.kernel.org" }, "content": "This patchset feature updates around mmc. It is linked to this series [0]\nbut does not strictly depends on it. It adds:\n\n* The regulator settling times for the gpio regulator of nanopi-k2 and\n the libretech-cc.\n* UHS modes for the p20x, nanopi-k2 and the libretech-cc\n* clk-gate pins: these are the pinmuxes used for the clk-stop work\n around explained here [1]\n\nIt also removes cap-sd-highspeed from eMMC nodes.\n\nSpecial note on SDR104:\nWhile the PCB of the p200 and the libretech-cc does not seems to handle\nSDR104 completely, the nanopi-k2 seems to be handling it correctly.\n\nThe patch enabling this mode on the nanopi-k2 is the last one of this\nseries. It should propabably be left out until more people can test\nsdr104 on the nanopi-k2\n\nThis series has been tested on the gxbb-200, the gxbb-nanopi-k2 and the\ngxl-s905x-libretech-cc\n\nChanges since v2 [3]:\n* Rebase on Kevin's v4.14/dt64 branch\n\nChanges since v1 [2]:\n* Reorder patches to put fixes first, then enhancements\n* Fix error in the SDIO clk_gate pins (GPIOX_5 instead GPIOX_4)\n\n[0]: https://lkml.kernel.org/r/20170828142915.27020-1-jbrunet@baylibre.com\n[1]: https://lkml.kernel.org/r/20170821160301.21899-11-jbrunet@baylibre.com\n[2]: https://lkml.kernel.org/r/20170804180816.18737-1-jbrunet@baylibre.com\n[3]: https://lkml.kernel.org/r/20170821160637.22456-1-jbrunet@baylibre.com\n\nJerome Brunet (9):\n ARM64: dts: meson-gx: Use correct mmc clock source 0\n ARM64: dts: meson: remove cap-sd-highspeed from emmc nodes\n ARM64: dts: meson: add mmc clk gate pins\n ARM64: dts: meson-gxbb: nanopi-k2: add card regulator settle times\n ARM64: dts: meson-gxl: libretech-cc: add card regulator settle times\n ARM64: dts: meson-gxl: libretech-cc: enable high speed modes\n ARM64: dts: meson-gxbb: p20x: enable sdcard UHS modes\n ARM64: dts: meson-gxbb: nanopi-k2: enable sdcard UHS modes\n ARM64: dts: meson-gxbb: nanopi-k2: enable sdr104 mode\n\n .../arm64/boot/dts/amlogic/meson-gx-p23x-q20x.dtsi | 10 +++---\n .../boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 19 ++++++++---\n .../boot/dts/amlogic/meson-gxbb-nexbox-a95x.dts | 12 ++++---\n .../arm64/boot/dts/amlogic/meson-gxbb-odroidc2.dts | 9 ++---\n arch/arm64/boot/dts/amlogic/meson-gxbb-p20x.dtsi | 13 +++++---\n .../boot/dts/amlogic/meson-gxbb-vega-s95.dtsi | 10 +++---\n arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 39 ++++++++++++++++++++--\n .../dts/amlogic/meson-gxl-s905x-hwacom-amazetv.dts | 7 ++--\n .../dts/amlogic/meson-gxl-s905x-libretech-cc.dts | 13 ++++++--\n .../dts/amlogic/meson-gxl-s905x-nexbox-a95x.dts | 10 +++---\n .../boot/dts/amlogic/meson-gxl-s905x-p212.dtsi | 10 +++---\n arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 39 ++++++++++++++++++++--\n .../arm64/boot/dts/amlogic/meson-gxm-nexbox-a1.dts | 7 ++--\n arch/arm64/boot/dts/amlogic/meson-gxm-rbox-pro.dts | 1 -\n 14 files changed, 150 insertions(+), 49 deletions(-)" }