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{ "id": 807662, "url": "http://patchwork.ozlabs.org/api/covers/807662/?format=api", "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/cover/20170830144120.9312-1-dietmar.eggemann@arm.com/", "project": { "id": 37, "url": "http://patchwork.ozlabs.org/api/projects/37/?format=api", "name": "Devicetree Bindings", "link_name": "devicetree-bindings", "list_id": "devicetree.vger.kernel.org", "list_email": "devicetree@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20170830144120.9312-1-dietmar.eggemann@arm.com>", "list_archive_url": null, "date": "2017-08-30T14:41:16", "name": "[0/4] arm: remove cpu_efficiency", "submitter": { "id": 64545, "url": "http://patchwork.ozlabs.org/api/people/64545/?format=api", "name": "Dietmar Eggemann", "email": "dietmar.eggemann@arm.com" }, "mbox": "http://patchwork.ozlabs.org/project/devicetree-bindings/cover/20170830144120.9312-1-dietmar.eggemann@arm.com/mbox/", "series": [ { "id": 628, "url": "http://patchwork.ozlabs.org/api/series/628/?format=api", "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=628", "date": "2017-08-30T14:41:16", "name": "arm: remove cpu_efficiency", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/628/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/807662/comments/", "headers": { "Return-Path": "<devicetree-owner@vger.kernel.org>", "X-Original-To": "incoming-dt@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-dt@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)", "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xj7Vy3ZWFz9s9Y\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tThu, 31 Aug 2017 00:41:46 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751440AbdH3Olp (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tWed, 30 Aug 2017 10:41:45 -0400", "from foss.arm.com ([217.140.101.70]:45510 \"EHLO foss.arm.com\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1751323AbdH3Olo (ORCPT <rfc822;devicetree@vger.kernel.org>);\n\tWed, 30 Aug 2017 10:41:44 -0400", "from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249])\n\tby usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9351380D;\n\tWed, 30 Aug 2017 07:41:43 -0700 (PDT)", "from e107985-lin.cambridge.arm.com (e107985-lin.cambridge.arm.com\n\t[10.1.210.41])\n\tby usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id\n\t7C6F93F483; Wed, 30 Aug 2017 07:41:41 -0700 (PDT)" ], "From": "Dietmar Eggemann <dietmar.eggemann@arm.com>", "To": "linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tdevicetree@vger.kernel.org, linux-samsung-soc@vger.kernel.org,\n\tlinux-renesas-soc@vger.kernel.org", "Cc": "Russell King <linux@armlinux.org.uk>, Rob Herring <robh+dt@kernel.org>, \n\tMark Rutland <mark.rutland@arm.com>, Kukjin Kim <kgene@kernel.org>,\n\tKrzysztof Kozlowski <krzk@kernel.org>,\n\tVincent Guittot <vincent.guittot@linaro.org>,\n\tJuri Lelli <juri.lelli@arm.com>", "Subject": "[PATCH 0/4] arm: remove cpu_efficiency", "Date": "Wed, 30 Aug 2017 15:41:16 +0100", "Message-Id": "<20170830144120.9312-1-dietmar.eggemann@arm.com>", "X-Mailer": "git-send-email 2.11.0", "Sender": "devicetree-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<devicetree.vger.kernel.org>", "X-Mailing-List": "devicetree@vger.kernel.org" }, "content": "For Cortex-A15/A7 arm big.LITTLE systems there are currently two ways to\nset the cpu capacity.\n\nThe first one (commit 06073ee26775 \"ARM: 8621/3: parse cpu\ncapacity-dmips-mhz from DT\") is based on dt 'cpu capacity-dmips-mhz'\nbindings and the appropriate dt parsing code in\ndrivers/base/arch_topology.c. It further takes differences in maximum\ncpu frequency values into consideration, normalizes the maximum cpu\ncapacity to SCHED_CAPACITY_SCALE (1024) and scales all the cpus\naccordingly.\n\n cpu capacity = (capacity-dmips-mhz * max cpu frequency) / \n (max capacity-dmips-mhz * max (max cpu frequency)\n\nThis solution is shared between arm and arm64 and works for other\ncombinations of big and little cpus (besides Cortex-A15/A7) as well.\n\nThe second one (commit 339ca09d7ada \"ARM: 7463/1: topology: Update\ncpu_power according to DT information\" is based on the 'struct\ncpu_efficiency table_efficiency[]' and the dt parsing code in\narch/arm/kernel/topology.c. It further requires a clock-frequency\nproperty per cpu node, calculates a so called middle frequency for an\naverage cpu in the system which is as close as possible to\nSCHED_CAPACITY_SCALE (1024) and uses this to compute the cpu capacity\nvalues.\n\n cpu capacity = (cpu efficiency * clock frequency) / middle capacity\n\nThis solution only works for Cortex-A15/A7 arm big.LITTLE systems.\n\nThe aim of this patch-set is to have only one solution for all arm and\narm64 big.LITTLE platforms.\n\n(1) Therefore, it removes the code for the 'cpu_efficiency/\n clock-frequency dt property' (second) solution [patch 01/04] and\n migrates the arm big.LITTLE platforms currently using this approach\n [patch 02-04/04] to use the 'cpu capacity-dmips-mhz' (first)\n solution.\n\n(2) Moreover, it will also assure that the highest original cpu capacity\n (rq->cpu_capacity_orig) in a non-smt system is SCHED_CAPACITY_SCALE\n (1024).\n\n(3) And finally, another advantage is the dynamic detection of the max\n cpu frequency which comes with the first solution instead of the\n static clock-frequency dt property value.\n\nCurrently, the arm dt parsing code in parse_dt_topology() checks if the\ndt uses the capacity-dmips-mhz property. If this is the case it uses\nthe first, otherwise the second solution. This patch-set removes the\ncode for the second solution from arch/arm/kernel/topology.c.\n\nThe following arm big.LITTLE platforms which use cpu node descriptions\nwith the 'compatible' properties \"arm,cortex-a15\" and \"arm,cortex-a7\"\nas well as the \"clock-frequency\" are (theoretically*) affected:\n\n(1) arndale-octa, peach-pi, peach-pit, smdk5420 (exynos5420-cpus.dtsi)\n\n(2) odroidxu3, odroidxu3-lite, odroidxu4 (exynos5422-cpus.dtsi)\n\n(3) r8a7790-lager (r8a7790.dtsi)\n\nTC2 (vexpress-v2p-ca15_a7.dts) already has the capacity-dmips-mhz\nproperties (it never had \"clock-frequency\" properties per cpu node\nthough).\n\n*Currently, these platforms are only theoretically affected. The reason\nis because heterogeneous cpu capacity support on arm stopped with commit\n8cd5601c5060 (\"sched/fair: Convert arch_scale_cpu_capacity() from weak\nfunction to #define\") because the arch never defined\narch_scale_cpu_capacity so the task scheduler uses the default\nimplementation in kernel/sched/sched.h. This will change as soon the\npatch \"arm: wire cpu-invariant accounting support up to the task\nscheduler\" [1] is in mainline.\n\nThis patch-set has been tested on TC2 and Samsung Chromebook 2 13\"\n(peach-pi, Exynos 5800).\n\n[1] https://marc.info/?l=linux-kernel&m=150367158111303&w=2\n\nDietmar Eggemann (4):\n arm: topology: remove cpu_efficiency\n arm: dts: exynos: add exynos5420 cpu capacity-dmips-mhz information\n arm: dts: exynos: add exynos5422 cpu capacity-dmips-mhz information\n arm: dts: r8a7790: add cpu capacity-dmips-mhz information\n\n arch/arm/boot/dts/exynos5420-cpus.dtsi | 8 +++\n arch/arm/boot/dts/exynos5422-cpus.dtsi | 8 +++\n arch/arm/boot/dts/r8a7790.dtsi | 8 +++\n arch/arm/kernel/topology.c | 113 +--------------------------------\n 4 files changed, 27 insertions(+), 110 deletions(-)" }