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{ "id": 806480, "url": "http://patchwork.ozlabs.org/api/covers/806480/?format=api", "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/cover/1503914654-19963-1-git-send-email-fabrice.gasnier@st.com/", "project": { "id": 37, "url": "http://patchwork.ozlabs.org/api/projects/37/?format=api", "name": "Devicetree Bindings", "link_name": "devicetree-bindings", "list_id": "devicetree.vger.kernel.org", "list_email": "devicetree@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1503914654-19963-1-git-send-email-fabrice.gasnier@st.com>", "list_archive_url": null, "date": "2017-08-28T10:04:05", "name": "[RESEND,v3,0/9] Add STM32 LPTimer: PWM, trigger and counter", "submitter": { "id": 65902, "url": "http://patchwork.ozlabs.org/api/people/65902/?format=api", "name": "Fabrice Gasnier", "email": "fabrice.gasnier@st.com" }, "mbox": "http://patchwork.ozlabs.org/project/devicetree-bindings/cover/1503914654-19963-1-git-send-email-fabrice.gasnier@st.com/mbox/", "series": [ { "id": 125, "url": "http://patchwork.ozlabs.org/api/series/125/?format=api", "web_url": "http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=125", "date": "2017-08-28T10:04:06", "name": "Add STM32 LPTimer: PWM, trigger and counter", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/125/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/806480/comments/", "headers": { "Return-Path": "<devicetree-owner@vger.kernel.org>", "X-Original-To": "incoming-dt@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming-dt@bilbo.ozlabs.org", "Authentication-Results": "ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)", "Received": [ "from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xgnWM4pC0z9sNq\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tMon, 28 Aug 2017 20:07:27 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751727AbdH1KHL (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tMon, 28 Aug 2017 06:07:11 -0400", "from mx08-00178001.pphosted.com ([91.207.212.93]:35092 \"EHLO\n\tmx07-00178001.pphosted.com\" rhost-flags-OK-OK-OK-FAIL)\n\tby vger.kernel.org with ESMTP id S1751435AbdH1KFR (ORCPT\n\t<rfc822; devicetree@vger.kernel.org>); Mon, 28 Aug 2017 06:05:17 -0400", "from pps.filterd (m0046661.ppops.net [127.0.0.1])\n\tby mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv7SA4e11015962; Mon, 28 Aug 2017 12:04:40 +0200", "from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35])\n\tby mx08-.pphosted.com with ESMTP id 2cjyveha6m-1\n\t(version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT);\n\tMon, 28 Aug 2017 12:04:36 +0200", "from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9])\n\tby beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 90AA338;\n\tMon, 28 Aug 2017 10:04:35 +0000 (GMT)", "from Webmail-eu.st.com (sfhdag5node3.st.com [10.75.127.15])\n\tby zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 41D59201F;\n\tMon, 28 Aug 2017 10:04:35 +0000 (GMT)", "from localhost (10.75.127.45) by SFHDAG5NODE3.st.com (10.75.127.15)\n\twith Microsoft SMTP Server (TLS) id 15.0.1178.4;\n\tMon, 28 Aug 2017 12:04:34 +0200" ], "From": "Fabrice Gasnier <fabrice.gasnier@st.com>", "To": "<lee.jones@linaro.org>, <benjamin.gaignard@linaro.org>,\n\t<jic23@kernel.org>, <thierry.reding@gmail.com>, <robh+dt@kernel.org>", "CC": "<mark.rutland@arm.com>, <alexandre.torgue@st.com>,\n\t<mcoquelin.stm32@gmail.com>, <fabrice.gasnier@st.com>,\n\t<benjamin.gaignard@st.com>, <linux-iio@vger.kernel.org>,\n\t<devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, \n\t<linux-kernel@vger.kernel.org>, <linux-pwm@vger.kernel.org>,\n\t<vilhelm.gray@gmail.com>", "Subject": "[RESEND PATCH v3 0/9] Add STM32 LPTimer: PWM, trigger and counter", "Date": "Mon, 28 Aug 2017 12:04:05 +0200", "Message-ID": "<1503914654-19963-1-git-send-email-fabrice.gasnier@st.com>", "X-Mailer": "git-send-email 1.9.1", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.75.127.45]", "X-ClientProxiedBy": "SFHDAG1NODE1.st.com (10.75.127.1) To SFHDAG5NODE3.st.com\n\t(10.75.127.15)", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-08-28_06:, , signatures=0", "Sender": "devicetree-owner@vger.kernel.org", "Precedence": "bulk", "List-ID": "<devicetree.vger.kernel.org>", "X-Mailing-List": "devicetree@vger.kernel.org" }, "content": "This series adds support for Low-Power Timer that can be found on\nsome STM32 devices.\n\nSTM32 LPTimer (LPTIM) is a 16-bit timer that provides several\nfunctionalities. This series adds support for following features:\n- PWM output (with programmable prescaler, configurable polarity)\n- Trigger source for STM32 ADC or DAC (LPTIM_OUT)\n- Quadrature encoder and counter\n\nThe MFD core is used to manage common resources (clock, register map)\nand to detect encoder feature. \"stm32_lptimer\" structure is provided\nto its sub-nodes to share those information:\n- PWM driver is used to implement single PWM channel\n- IIO trigger\n- IIO quadrature encoder and counter\n\n---\nResend v3 with collected Acks\n\nChanges in v3:\n- I sent this v3 with various changes, but still need to discuss ABI\n for counter driver (no change on this in v3).\n- Remarks for Rob on dt-bindings\n- Add validate_device in Trigger driver\n- Update PWM driver after Thierry's comments\n- Additional patch for STM32 ADC trigger\n\nChanges in v2:\n- Various remarks from Lee, on MFD part, extended to the full series,\n such as: clock name, use \"Low-Power Timer\", file headers, dt-bindings\n props descriptions, fix dt example.\n\nFabrice Gasnier (9):\n dt-bindings: mfd: Add STM32 LPTimer binding\n mfd: Add STM32 LPTimer driver\n dt-bindings: pwm: Add STM32 LPTimer PWM binding\n pwm: Add STM32 LPTimer PWM driver\n dt-bindings: iio: Add STM32 LPTimer trigger binding\n iio: trigger: Add STM32 LPTimer trigger driver\n dt-bindings: iio: Add STM32 LPTimer quadrature encoder and counter\n iio: counter: Add support for STM32 LPTimer\n iio: adc: stm32: add support for lptimer triggers\n\n .../ABI/testing/sysfs-bus-iio-lptimer-stm32 | 57 +++\n .../bindings/iio/counter/stm32-lptimer-cnt.txt | 27 ++\n .../bindings/iio/timer/stm32-lptimer-trigger.txt | 23 ++\n .../devicetree/bindings/mfd/stm32-lptimer.txt | 48 +++\n .../devicetree/bindings/pwm/pwm-stm32-lp.txt | 24 ++\n drivers/iio/adc/stm32-adc.c | 14 +-\n drivers/iio/counter/Kconfig | 9 +\n drivers/iio/counter/Makefile | 1 +\n drivers/iio/counter/stm32-lptimer-cnt.c | 383 +++++++++++++++++++++\n drivers/iio/trigger/Kconfig | 11 +\n drivers/iio/trigger/Makefile | 1 +\n drivers/iio/trigger/stm32-lptimer-trigger.c | 118 +++++++\n drivers/mfd/Kconfig | 14 +\n drivers/mfd/Makefile | 1 +\n drivers/mfd/stm32-lptimer.c | 107 ++++++\n drivers/pwm/Kconfig | 10 +\n drivers/pwm/Makefile | 1 +\n drivers/pwm/pwm-stm32-lp.c | 246 +++++++++++++\n include/linux/iio/timer/stm32-lptim-trigger.h | 27 ++\n include/linux/mfd/stm32-lptimer.h | 62 ++++\n 20 files changed, 1182 insertions(+), 2 deletions(-)\n create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-lptimer-stm32\n create mode 100644 Documentation/devicetree/bindings/iio/counter/stm32-lptimer-cnt.txt\n create mode 100644 Documentation/devicetree/bindings/iio/timer/stm32-lptimer-trigger.txt\n create mode 100644 Documentation/devicetree/bindings/mfd/stm32-lptimer.txt\n create mode 100644 Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt\n create mode 100644 drivers/iio/counter/stm32-lptimer-cnt.c\n create mode 100644 drivers/iio/trigger/stm32-lptimer-trigger.c\n create mode 100644 drivers/mfd/stm32-lptimer.c\n create mode 100644 drivers/pwm/pwm-stm32-lp.c\n create mode 100644 include/linux/iio/timer/stm32-lptim-trigger.h\n create mode 100644 include/linux/mfd/stm32-lptimer.h" }