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{ "id": 2231335, "url": "http://patchwork.ozlabs.org/api/covers/2231335/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/cover/177756498815.8917.12449488721849651971-0@git.sr.ht/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<177756498815.8917.12449488721849651971-0@git.sr.ht>", "list_archive_url": null, "date": "2026-04-30T16:03:07", "name": "[qemu,v4,0/9] Update opentitan uart (part of supporting opentitan version 1)", "submitter": { "id": 92675, "url": "http://patchwork.ozlabs.org/api/people/92675/?format=api", "name": "~lexbaileylowrisc", "email": "lexbaileylowrisc@git.sr.ht" }, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/cover/177756498815.8917.12449488721849651971-0@git.sr.ht/mbox/", "series": [ { "id": 502334, "url": "http://patchwork.ozlabs.org/api/series/502334/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=502334", "date": "2026-04-14T12:45:41", "name": "Update opentitan uart (part of supporting opentitan version 1)", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/502334/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/2231335/comments/", "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=fail reason=\"key not found in DNS\" header.d=git.sr.ht\n header.i=@git.sr.ht header.a=rsa-sha256 header.s=20240113 header.b=a/0y79VI;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g5zWf24CKz1yGq\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 01 May 2026 02:04:30 +1000 (AEST)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wITrS-0007mA-Ir; Thu, 30 Apr 2026 12:03:35 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <outgoing@sr.ht>)\n id 1wITr9-0007U5-GO; Thu, 30 Apr 2026 12:03:24 -0400", "from mail-a.sr.ht ([46.23.81.152])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <outgoing@sr.ht>)\n id 1wITr6-00077g-Bm; Thu, 30 Apr 2026 12:03:15 -0400", "from git.sr.ht (unknown [46.23.81.155])\n by mail-a.sr.ht (Postfix) with ESMTPSA id 3C48420C10;\n Thu, 30 Apr 2026 16:03:08 +0000 (UTC)" ], "DKIM-Signature": "a=rsa-sha256; bh=FTOONq+xVZSYimkNcwm7tLoBSTwv7vH0/MrNqv4xniw=;\n c=simple/simple; d=git.sr.ht;\n h=From:Date:Subject:Reply-to:To:Cc;\n q=dns/txt; s=20240113; t=1777564988; v=1;\n b=a/0y79VIQt6yNtNObfvnnquIuuCcNXDJonYUWWUNuH7bUsYmglzOqtjmbcGZfIX8GQJzPWko\n /aV25jkO6gqa44NG8dMdwL/kjxXsEllTNInhmZjP6q1yoMKnsm/eTxF53H/1llZMnTE0PuCgxjb\n krRjnu8sF/x+XV+c6Mv4z/gkCibh3rrxd1zleBh3NFsUuz50FtodNP3CkFVv+HIfAn4SOIxvbfM\n qBQypG3VQDeCE8BSFw/Y031TzYRJtTAYu9NXCJbUCE3T6HUM/ZTOEntE0HY0pDv/cXZd9s1RLkT\n ASlPMpiuwpEbzwnD0Cv6irULemCr2ShmJvBjFMD6v+BKQ==", "From": "~lexbaileylowrisc <lexbaileylowrisc@git.sr.ht>", "Date": "Thu, 30 Apr 2026 16:03:07 +0000", "Subject": "[PATCH qemu v4 0/9] Update opentitan uart (part of supporting\n opentitan version 1)", "MIME-Version": "1.0", "Message-ID": "<177756498815.8917.12449488721849651971-0@git.sr.ht>", "X-Mailer": "git.sr.ht", "To": "qemu-riscv@nongnu.org, Alistair Francis <Alistair.Francis@wdc.com>", "Cc": "Paolo Bonzini <pbonzini@redhat.com>,\n =?utf-8?q?Marc-Andr=C3=A9?= Lureau <marcandre.lureau@redhat.com>,\n Palmer Dabbelt <palmer@dabbelt.com>, Weiwei Li <liwei1518@gmail.com>,\n Daniel Henrique Barboza <daniel.barboza@oss.qualcomm.com>,\n Liu Zhiwei <zhiwei_liu@linux.alibaba.com>,\n Chao Liu <chao.liu.zevorn@gmail.com>, qemu-devel@nongnu.org,\n Amit Kumar-Hermosillo <amitkh@google.com>,\n nabihestefan <nabihestefan@google.com>", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Received-SPF": "pass client-ip=46.23.81.152; envelope-from=outgoing@sr.ht;\n helo=mail-a.sr.ht", "X-Spam_score_int": "-16", "X-Spam_score": "-1.7", "X-Spam_bar": "-", "X-Spam_report": "(-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1,\n DKIM_SIGNED=0.1, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=no autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Reply-To": "~lexbaileylowrisc <lex.bailey@lowrisc.org>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "This is the fourth revision of the patch set that updates the\nOpenTitan uart to align with Earlgrey version 1.0.0.\n\nFor a specific git commit from OpenTitan that we are aiming to\nsupport:\nhttps://github.com/lowRISC/opentitan/tree/Earlgrey-PROD-M6\n(git tag Earlgrey-PROD-M6, which is commit a78922f)\n\nOnce again, for completeness, the details of the version 1 of the UART\nare found here:\nhttps://opentitan.org/book/hw/ip/uart/index.html\n(and this URL is still added to the file header in one of these commits,\nas before)\n\nFixes in this revision:\n- removed accidental add/delete of unused #define.\n- added documentation about break condition in commit message\n and also in a documentation file (is it in a suitable place?)\n this is copied from the documentation on our (lowRISC's) fork.\n- removed the commit that removes the regular clock pulse to\n transmit data. Following the discussion, I think it's better to merge\n this without that change for now, and if we decide we need it in\n the future we will test it with tock and propose the change again.\n- one review comment I couldn't fix: the one that suggested adding\n a return statement to avoid an else block. There is logic after the\n else block that runs in both cases, so I can't remove that.\n\nThanks!\n\nLex.\n\nLex Bailey (9):\n Rename ibex_uart to ot_uart\n ot_uart: move to new reset API\n ot_uart: update register defs, switch to Fifo8 for tx/rx buffers\n ot_uart: replace individual IRQ fields with array, add missing IRQs\n ot_uart: gather similar behaviours togeter in register read and write\n ot_uart: implement RX fifo and loopback\n ot_uart: handle break condition\n ot_uart: update file headers with new authorship and documentation URL\n ot_uart: add tracing\n\n MAINTAINERS | 1 +\n docs/system/riscv/opentitan-uart.rst | 43 ++\n hw/char/Kconfig | 3 +\n hw/char/ibex_uart.c | 569 --------------------\n hw/char/meson.build | 2 +-\n hw/char/ot_uart.c | 778 +++++++++++++++++++++++++++\n hw/char/trace-events | 8 +\n hw/riscv/Kconfig | 1 +\n hw/riscv/opentitan.c | 3 +-\n include/hw/char/ibex_uart.h | 73 ---\n include/hw/char/ot_uart.h | 70 +++\n include/hw/riscv/opentitan.h | 4 +-\n 12 files changed, 909 insertions(+), 646 deletions(-)\n create mode 100644 docs/system/riscv/opentitan-uart.rst\n delete mode 100644 hw/char/ibex_uart.c\n create mode 100644 hw/char/ot_uart.c\n delete mode 100644 include/hw/char/ibex_uart.h\n create mode 100644 include/hw/char/ot_uart.h" }