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{ "id": 2230862, "url": "http://patchwork.ozlabs.org/api/covers/2230862/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/cover/20260430-sm6350-lpi-tlmm-v2-0-81d068025b97@fairphone.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260430-sm6350-lpi-tlmm-v2-0-81d068025b97@fairphone.com>", "list_archive_url": null, "date": "2026-04-30T07:10:40", "name": "[v2,0/5] Add LPASS LPI pin controller support for SM6350", "submitter": { "id": 83060, "url": "http://patchwork.ozlabs.org/api/people/83060/?format=api", "name": "Luca Weiss", "email": "luca.weiss@fairphone.com" }, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/cover/20260430-sm6350-lpi-tlmm-v2-0-81d068025b97@fairphone.com/mbox/", "series": [ { "id": 502221, "url": "http://patchwork.ozlabs.org/api/series/502221/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=502221", "date": "2026-04-30T07:10:40", "name": "Add LPASS LPI pin controller support for SM6350", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/502221/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/2230862/comments/", "headers": { "Return-Path": "\n <linux-gpio+bounces-35826-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=fairphone.com header.i=@fairphone.com\n header.a=rsa-sha256 header.s=fair header.b=fYFej4iR;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.105.105.114; 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charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "X-B4-Tracking": "v=1; b=H4sIAAAAAAAC/3WOQQ6DIBBFr2JYdxpAJbar3qNxgTrWSQQsUGNjv\n HtR182s3kz+f7OygJ4wsHu2Mo8zBXI2gbxkrB20fSFQl5hJLhUXsoJgVF5yGCeCOBoDTdfqosO\n mVIVgKTV57Gk5Gp914oFCdP57CGaxb/93zQI45Kqs8l7qfR69Jj8NzuK1dYbV2ynw+P6kT+NpY\n Y0OCOluKN4zi0uEw1DIW0psP3Wo3APjAAAA", "X-Change-ID": "20260128-sm6350-lpi-tlmm-bdca4deb5641", "To": "Bjorn Andersson <andersson@kernel.org>,\n Linus Walleij <linusw@kernel.org>, Rob Herring <robh@kernel.org>,\n Krzysztof Kozlowski <krzk+dt@kernel.org>,\n Conor Dooley <conor+dt@kernel.org>, Konrad Dybcio <konradybcio@kernel.org>,\n Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>", "Cc": "~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org,\n linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org,\n devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n Luca Weiss <luca.weiss@fairphone.com>,\n Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,\n Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>", "X-Mailer": "b4 0.15.2", "X-Developer-Signature": "v=1; a=ed25519-sha256; t=1777533047; l=1992;\n i=luca.weiss@fairphone.com; s=20250611; h=from:subject:message-id;\n bh=QhQKB2mRUuTtgEbrNzVyQWry9Jhf3YZS5lk/FPu/bGE=;\n b=I2DiK9SeNbN+KP+wFWjjnhIUJ5RMd8BNN8v7oSbkqI6PJiH33CQS4/zUIe1YOvTRqGpykL5lV\n mnap3+ig0YYDu9R0Qnbs2gaD0qG+DRGisKOaB0mpJe9VF64CG+0olfz", "X-Developer-Key": "i=luca.weiss@fairphone.com; a=ed25519;\n pk=O1aw+AAust5lEmgrNJ1Bs7PTY0fEsJm+mdkjExA69q8=" }, "content": "Introduce support for the LPASS LPI pin controller for the Qualcomm\nSM6350 SoC, by adding the dt-bindings, driver, dts bits and enabling it\nin the arm64 defconfig.\n\nThe custom slew offset for gpio14 is described as\n\"qcom,lpi-slew-base-tbl\" in the downstream dts[0]. I've tried to find\nsome reasonable solution to have this handled correctly in the patches\nhere, but suggestions are welcome how to improve the situation. There's\nof course several ways to implement a solution for this.\n\n[0] https://gerrit-public.fairphone.software/plugins/gitiles/kernel/msm-extra/devicetree/+/refs/heads/kernel/13/fp4/qcom/lagoon-lpi.dtsi#25\n\nSigned-off-by: Luca Weiss <luca.weiss@fairphone.com>\n---\nChanges in v2:\n- Fix dt bindings example\n- Drop note about too little register space (Konrad)\n- Pick up tags\n- Link to v1: https://lore.kernel.org/r/20260128-sm6350-lpi-tlmm-v1-0-36583f2a2a2a@fairphone.com\n\n---\nLuca Weiss (5):\n dt-bindings: pinctrl: qcom: Add SM6350 LPI pinctrl\n pinctrl: qcom: lpass-lpi: Add ability to use SPARE_1 for slew control\n pinctrl: qcom: Add SM6350 LPASS LPI TLMM\n arm64: dts: qcom: sm6350: add LPASS LPI pin controller\n arm64: defconfig: Enable LPASS LPI pin controller for SM6350\n\n .../pinctrl/qcom,sm6350-lpass-lpi-pinctrl.yaml | 124 +++++++++++++++++\n arch/arm64/boot/dts/qcom/sm6350.dtsi | 66 +++++++++\n arch/arm64/configs/defconfig | 1 +\n drivers/pinctrl/qcom/Kconfig | 9 ++\n drivers/pinctrl/qcom/Makefile | 1 +\n drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 2 +\n drivers/pinctrl/qcom/pinctrl-lpass-lpi.h | 20 +++\n drivers/pinctrl/qcom/pinctrl-sm6350-lpass-lpi.c | 149 +++++++++++++++++++++\n 8 files changed, 372 insertions(+)\n---\nbase-commit: 3d33d10c2d4f964c9223fd9a27eb7f0ac733c216\nchange-id: 20260128-sm6350-lpi-tlmm-bdca4deb5641\n\nBest regards,\n-- \nLuca Weiss <luca.weiss@fairphone.com>" }