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{ "id": 2223998, "url": "http://patchwork.ozlabs.org/api/covers/2223998/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pwm/cover/20260416134037.3160537-1-richard.genoud@bootlin.com/", "project": { "id": 38, "url": "http://patchwork.ozlabs.org/api/projects/38/?format=api", "name": "Linux PWM development", "link_name": "linux-pwm", "list_id": "linux-pwm.vger.kernel.org", "list_email": "linux-pwm@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260416134037.3160537-1-richard.genoud@bootlin.com>", "list_archive_url": null, "date": "2026-04-16T13:40:33", "name": "[v6,0/4] Introduce Allwinner H616 PWM controller", "submitter": { "id": 88519, "url": "http://patchwork.ozlabs.org/api/people/88519/?format=api", "name": "Richard GENOUD", "email": "richard.genoud@bootlin.com" }, "mbox": "http://patchwork.ozlabs.org/project/linux-pwm/cover/20260416134037.3160537-1-richard.genoud@bootlin.com/mbox/", "series": [ { "id": 500165, "url": "http://patchwork.ozlabs.org/api/series/500165/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pwm/list/?series=500165", "date": "2026-04-16T13:40:34", "name": "Introduce Allwinner H616 PWM controller", "version": 6, "mbox": "http://patchwork.ozlabs.org/series/500165/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/2223998/comments/", "headers": { "Return-Path": "\n <linux-pwm+bounces-8616-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pwm@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=bootlin.com header.i=@bootlin.com header.a=rsa-sha256\n header.s=dkim header.b=M85td3UB;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c15:e001:75::12fc:5321; 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a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1776346860; cv=none;\n b=FjqqfHb0JImAhjb0tq0oir7vx4mROKfmHpwb1/U4LmA5RMHmMAcXC9bB2sx17h58tB7GLUW6WHpOYW500t2BaEttGldZpgvBScRS/F6K6R/Isd7bykSoSZSfLJ0wxezb2QQzEiiEGDSNwPjWBzvwn1lL7CwxQM/GyW4uaiDbo+Q=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1776346860; c=relaxed/simple;\n\tbh=KiLV3fc/9tqWwXn5cO7w/9PDOIj4VRuvWmojL/UyqFg=;\n\th=From:To:Cc:Subject:Date:Message-ID:MIME-Version;\n b=hsa0sbGHxBKSJrYoJpuuXW5SUIvDh2ai6bS7DbVoHf1aCWvkUwofAc+q45AqJKQp5UX7+QRdsjI64E7iNZr5gxu1Dh7LKb6YYdKmv4yZZhQ8y8bwECsq9oTHoaGkSvUNn04qrRRqiGf9vnayx69qeEtDS4g2Oad86kCqjVQyT6U=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=bootlin.com;\n spf=pass smtp.mailfrom=bootlin.com;\n dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com\n header.b=M85td3UB; arc=none smtp.client-ip=185.171.202.116", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim;\n\tt=1776346854; h=from:subject:date:message-id:to:cc:mime-version:\n\t content-transfer-encoding; bh=JmeDH1C+TChiUEEAvCZY7BpLUkWXbXyiCVPuzrN7nzw=;\n\tb=M85td3UB9vvYAePJgAnZ5ZFLUg79jXMMfletwmbRmgvEMoUihQVvC9PrTs9G79QIkClkzt\n\tb5IVstW7A90vWQEogjezjhhpM3LQ6GI8pyT54Sda0d9F0koUB9wr7syjrhrxZNDh/HzdTw\n\t/eI5/tjZ8oJ9+cjbvdLxSbLtPE6Yb1Q5jrMcfg9D2zFoCm1Qbru5vfvpusCuJl7xqc7AtW\n\tv7J9lrRbDh0krg+AoibOLqiC/MkOIVW9HFbNKeMGaRb48Ym+dWYeuTyvgGDchNKbHwY1j9\n\tLM76lkBWk14rLnKHo2Fc4iJ7EeOqbLjngDPviJ/1U4iEI3AweBwELFpB5ESxzA==", "From": "Richard Genoud <richard.genoud@bootlin.com>", "To": "=?utf-8?q?Uwe_Kleine-K=C3=B6nig?= <ukleinek@kernel.org>,\n Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>,\n Conor Dooley <conor+dt@kernel.org>, Chen-Yu Tsai <wens@kernel.org>,\n Jernej Skrabec <jernej.skrabec@gmail.com>,\n Samuel Holland <samuel@sholland.org>, Philipp Zabel <p.zabel@pengutronix.de>", "Cc": "Paul Kocialkowski <paulk@sys-base.io>,\n\tThomas Petazzoni <thomas.petazzoni@bootlin.com>,\n\tJohn Stultz <jstultz@google.com>,\n\tJoao Schim <joao@schimsalabim.eu>,\n\tbigunclemax@gmail.com,\n\tlinux-pwm@vger.kernel.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tlinux-sunxi@lists.linux.dev,\n\tlinux-kernel@vger.kernel.org,\n\tRichard Genoud <richard.genoud@bootlin.com>", "Subject": "[PATCH v6 0/4] Introduce Allwinner H616 PWM controller", "Date": "Thu, 16 Apr 2026 15:40:33 +0200", "Message-ID": "<20260416134037.3160537-1-richard.genoud@bootlin.com>", "X-Mailer": "git-send-email 2.47.3", "Precedence": "bulk", "X-Mailing-List": "linux-pwm@vger.kernel.org", "List-Id": "<linux-pwm.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pwm+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pwm+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Last-TLS-Session-Version": "TLSv1.3" }, "content": "Allwinner H616 PWM controller is quite different from the A10 one.\n\nIt can drive 6 PWM channels, and like for the A10, each channel has a\nbypass that permits to output a clock, bypassing the PWM logic, when\nenabled.\n\nBut, the channels are paired 2 by 2, sharing a first set of\nMUX/prescaler/gate.\nThen, for each channel, there's another prescaler (that will be bypassed\nif the bypass is enabled for this channel).\n\nIt looks like that:\n _____ ______ ________\nOSC24M --->| | | | | |\nAPB1 ----->| Mux |--->| Gate |--->| /div_m |-----> PWM_clock_src_xy\n |_____| |______| |________|\n ________\n | |\n +->| /div_k |---> PWM_clock_x\n | |________|\n | ______\n | | |\n +-->| Gate |----> PWM_bypass_clock_x\n | |______|\nPWM_clock_src_xy -----+ ________\n | | |\n +->| /div_k |---> PWM_clock_y\n | |________|\n | ______\n | | |\n +-->| Gate |----> PWM_bypass_clock_y\n |______|\n\nWhere xy can be 0/1, 2/3, 4/5\n\nPWM_clock_x/y serve for the PWM purpose.\nPWM_bypass_clock_x/y serve for the clock-provider purpose.\nThe common clock framework has been used to manage those clocks.\n\nThis PWM driver serves as a clock-provider for PWM_bypass_clocks.\nThis is needed for example by the embedded AC300 PHY which clock comes\nfrom PMW5 pin (PB12).\n\nUsually, to get a clock from a PWM driver, we use the pwm-clock driver\nso that the PWM driver doesn't need to be a clk-provider itself.\nWhile this works in most cases, here it just doesn't.\nThat's because the pwm-clock request a period from the PWM driver,\nwithout any clue that it actually wants a clock at a specific frequency,\nand not a PWM signal with duty cycle capability.\nSo, the PWM driver doesn't know if it can use the bypass or not, it\ndoesn't even have the real accurate frequency information (23809524 Hz\ninstead of 24MHz) because PWM drivers only deal with periods.\n\nWith pwm-clock, we loose a precious information along the way (that we\nactually want a clock and not a PWM signal).\nThat's ok with simple PWM drivers that don't have multiple input clocks,\nbut in this case, without this information, we can't know for sure which\nclock to use.\nAnd here, for instance, if we ask for a 24MHz clock, pwm-clock will\nrequests 42ns (assigned-clocks doesn't help for that matter). The logic\nis to select the highest clock (100MHz) with no prescaler and a duty\ncycle value of 2/4 => we have 25MHz instead of 24MHz.\nAnd that's a perfectly fine choice for a PMW, because we still can\nchange the duty cycle in the range [0-4]/4.\nBut obviously for a clock, we don't care about the duty cycle, but more\nabout the clock accuracy.\n\nAnd actually, this PWM is really a PWM AND a real clock when the bypass\nis set.\n\nThis series is based onto v7.0\n\nNB: checkpatch is not happy with patch 2, but it's a false positive.\nIt doesn't detect that PWM_XY_SRC_MUX/GATE/DIV are structures, but as\nit's more readable like that, I prefer keeping it that way.\n\nChanges since v5:\n- remove trailing junk after commit message in patch 4\n- remove Tested-by when it doesn't make sense.\n(sorry for the noise)\n\nChanges since v4:\n- Fix a bug on bypass for channels greater than 1\n- add colons to clarify 2 debug messages\n- switch from H616 to sun8i prefix (in code, filename, module name)\n- fix consistency issues in macro parameters\n- rename some macros with a confusing naming\n- rebase on v7.0\n\nChanges since v3:\n- gather Acked-by/Tested-by\n- fix cast from pointer to integer of different size (kernel test robot\n with arc platform)\n- add devm_action for clk_hw_unregister_composite as suggested by Philipp\n- remove now unused pwm_remove as suggested by Philipp\n\nChanges since v2:\n- use U32_MAX instead of defining UINT32_MAX\n- add a comment on U32_MAX usage in clk_round_rate()\n- change clk_table_div_m (use macros)\n- fix formatting (double space, superfluous comma, extra line feed)\n- fix the parent clock order\n- simplify code by using scoped_guard()\n- add missing const in to_h616_pwm_chip() and rename to\nh616_pwm_from_chip()\n- add/remove missing/superfluous error messages\n- rename cnt->period_ticks, duty_cnt->duty_ticks\n- fix PWM_PERIOD_MAX\n- add .remove() callback\n- fix DIV_ROUND_CLOSEST_ULL->DIV_ROUND_UP_ULL\n- add H616_ prefix\n- protect _reg in macros\n- switch to waveforms instead of apply/get_state\n- shrink struct h616_pwm_channel\n- rebase on v6.19-rc4\n\nChanges since v1:\n- rebase onto v6.19-rc1\n- add missing headers\n- remove MODULE_ALIAS (suggested by Krzysztof)\n- use sun4i-pwm binding instead of creating a new one (suggested by Krzysztof)\n- retrieve the parent clocks from the devicetree\n- switch num_parents to unsigned int\n\nRichard Genoud (4):\n dt-bindings: pwm: allwinner: add h616 pwm compatible\n pwm: sun8i: Add H616 PWM support\n arm64: dts: allwinner: h616: add PWM controller\n MAINTAINERS: Add entry on Allwinner sun8i/H616 PWM driver\n\n .../bindings/pwm/allwinner,sun4i-a10-pwm.yaml | 19 +-\n MAINTAINERS | 5 +\n .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 47 +\n drivers/pwm/Kconfig | 12 +\n drivers/pwm/Makefile | 1 +\n drivers/pwm/pwm-sun8i.c | 938 ++++++++++++++++++\n 6 files changed, 1021 insertions(+), 1 deletion(-)\n create mode 100644 drivers/pwm/pwm-sun8i.c\n\n\nbase-commit: 028ef9c96e96197026887c0f092424679298aae8" }