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{ "id": 2223406, "url": "http://patchwork.ozlabs.org/api/covers/2223406/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/cover/20260415090959.53672-1-fengchengwen@huawei.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260415090959.53672-1-fengchengwen@huawei.com>", "list_archive_url": null, "date": "2026-04-15T09:09:55", "name": "[0/4] vfio/pci: Add PCIe TPH support", "submitter": { "id": 92756, "url": "http://patchwork.ozlabs.org/api/people/92756/?format=api", "name": "fengchengwen", "email": "fengchengwen@huawei.com" }, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/cover/20260415090959.53672-1-fengchengwen@huawei.com/mbox/", "series": [ { "id": 499948, "url": "http://patchwork.ozlabs.org/api/series/499948/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=499948", "date": "2026-04-15T09:09:55", "name": "vfio/pci: Add PCIe TPH support", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/499948/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/2223406/comments/", "headers": { "Return-Path": "\n <linux-pci+bounces-52544-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=huawei.com header.i=@huawei.com header.a=rsa-sha256\n header.s=dkim header.b=hSqlaPew;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.232.135.74; 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Wed, 15 Apr 2026 17:10:18 +0800" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1776244224; cv=none;\n b=gM5p0Xg5P/3tjKUTO2p2b6jd99yw9NG/waxrVbO0GwIVKrgN5vWCJNdjCz0pcl1rfmwnl4H9Thm6OKiE861XciKi1oJjo+ty+CXGl8q35N810qXFZEHRpnCLwNbabwnzqMuV3xbmmYztlzcdIcgrBH6M5wUuI+xWDCJwFMXqLIY=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1776244224; c=relaxed/simple;\n\tbh=I07ruM7QYMUTqaNOCIaIU9q8CrGA0anhQtKowbWrzwQ=;\n\th=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type;\n b=R19x1hZSfVMqQIDmX3j7mm0eJapZmXAWvG/+H1tHG4elQEyerC8goy71BaFbaCGhXf9KNF5QcL9AZRjTDkqRs9wqKm0zMo3P4SdqGtMEERShFOHqHCUKINwfo/sGRnudAeBUjjBgfPEePdD0iWbdVGibH8+c5Vjpznm09OiBzOs=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=quarantine dis=none) header.from=huawei.com;\n spf=pass smtp.mailfrom=huawei.com;\n dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com\n header.b=hSqlaPew; arc=none smtp.client-ip=113.46.200.224", "dkim-signature": "v=1; a=rsa-sha256; d=huawei.com; s=dkim;\n\tc=relaxed/relaxed; q=dns/txt;\n\th=From;\n\tbh=zPj3QyVfRmFFU7/irDZ8f9m0F5qHZGktTNjnR7dWtPw=;\n\tb=hSqlaPewN89PG4fFkORy38sft+2JFBSx7skY+TSq0jgGxhycJCs5m9bfFz1RmVVVu8voDGWXB\n\tnPExs+785Lq7QcqMMbeMs/KF3xXDaGVMyhbxIT88w+H2rv3EECSoBzz6/aOWA8GDMss+OZBriQn\n\tL49ViWF+HfQ+IoxyEJS/4T8=", "From": "Chengwen Feng <fengchengwen@huawei.com>", "To": "<alex@shazbot.org>, <jgg@ziepe.ca>", "CC": "<wathsala.vithanage@arm.com>, <kvm@vger.kernel.org>,\n\t<linux-pci@vger.kernel.org>, Chengwen Feng <fengchengwen@huawei.com>", "Subject": "[PATCH 0/4] vfio/pci: Add PCIe TPH support", "Date": "Wed, 15 Apr 2026 17:09:55 +0800", "Message-ID": "<20260415090959.53672-1-fengchengwen@huawei.com>", "X-Mailer": "git-send-email 2.17.1", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-ClientProxiedBy": "kwepems200001.china.huawei.com (7.221.188.67) To\n kwepemk500009.china.huawei.com (7.202.194.94)" }, "content": "This series adds support for PCIe TLP Processing Hints (TPH) to\nvfio-pci, allowing userspace to manage device steering tags for\nimproved performance and QoS in virtualized deployments.\n\nThe implementation follows a clean incremental structure:\n- Patch 1: Introduce UAPI ABI and implement capability query to\n let userspace discover supported TPH modes, ST table presence\n and size.\n- Patch 2: Add TPH enable/disable with mode selection.\n- Patch 3: Add interface to batch get per-CPU steering tags for\n device-specific mode.\n- Patch 4: Add interface to batch program steering tag table\n entries for standard TPH modes.\n\nAll user API definitions are finalized in the first patch and\nremain stable across the series. The design follows existing\nVFIO conventions and relies on kernel pcie-tph infrastructure.\n\nThis series addresses the TPH management requirements discussed\nin the RFC \"Proposal: Add sysfs interface for PCIe TPH Steering\nTag retrieval and configuration\".\n\nInstead of introducing a sysfs interface, we choose to implement\nTPH management via a VFIO-specific ioctl for these reasons:\n1. VFIO is the standard userspace interface for PCI devices.\n2. An ioctl approach provides better type safety, batch support\n and stable ABI compared to sysfs for configuration.\n3. VFIO properly isolates TPH operations to the assigned device,\n avoiding conflicts with other kernel management paths.\n\nBased on earlier RFC work by Wathsala Vithanage.\n\nChengwen Feng (4):\n vfio/pci: Add PCIe TPH interface with capability query\n vfio/pci: Add PCIe TPH enable/disable support\n vfio/pci: Add PCIe TPH GET_ST interface\n vfio/pci: Add PCIe TPH SET_ST interface\n\n drivers/vfio/pci/vfio_pci_core.c | 193 +++++++++++++++++++++++++++++++\n include/uapi/linux/vfio.h | 54 +++++++++\n 2 files changed, 247 insertions(+)" }