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{ "id": 2219735, "url": "http://patchwork.ozlabs.org/api/covers/2219735/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/cover/20260404042015.86580-1-mohamed@unpredictable.fr/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260404042015.86580-1-mohamed@unpredictable.fr>", "list_archive_url": null, "date": "2026-04-04T04:20:04", "name": "[v6,00/11] whpx: i386: bug fixes, feature probing and CPUID", "submitter": { "id": 91318, "url": "http://patchwork.ozlabs.org/api/people/91318/?format=api", "name": "Mohamed Mediouni", "email": "mohamed@unpredictable.fr" }, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/cover/20260404042015.86580-1-mohamed@unpredictable.fr/mbox/", "series": [ { "id": 498696, "url": "http://patchwork.ozlabs.org/api/series/498696/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=498696", "date": "2026-04-04T04:20:05", "name": "whpx: i386: bug fixes, feature probing and CPUID", "version": 6, "mbox": "http://patchwork.ozlabs.org/series/498696/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/2219735/comments/", "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=unpredictable.fr header.i=@unpredictable.fr\n header.a=rsa-sha256 header.s=sig1 header.b=JJH11ENW;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=outbound.st.icloud.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "This is a supplemental update that includes\n\"whpx: i386: x2apic emulation for kernel-irqchip=off, feature probing\"\nv4 unmodified.\n\nThis might be too big for QEMU 11.0 at this point though...\n\n\"whpx: i386: disable TbFlushHypercalls for emulated LAPIC\" is a\nbugfix, and \"target/i386: emulate: include name of unhandled instruction\"\nis a debugging aid.\n\n\"whpx: i386: x2apic emulation\" makes things slightly better for Windows\n10 users. But I strongly recommend *not* relying on it when possible and\nusing kernel-irqchip=on instead. On Windows 10 however that's more murky\nbecause PIC interrupt injection is broken (interrupts don't wake the vCPU\nfrom HLT) in that case.\n\n\"whpx: i386: wire up feature probing\" is yet another commit adding a code path\nnot used on Windows 10. It'll tell the user today which CPU features they set\nare incompatible with the hardware but it does not sync that to the CPUID view\nthat the guest has.\n\nAnd then another commit to enable x2apic emulation by default even for\nkernel-irqchip=off + re-introducing provided by QEMU enlightenments in a more\nfunctional form to signal that the x2apic can be used. I'm not aware of the\nactual vmware freq leaf being used though.\n\n\"whpx: x2apic emulation for kernel-irqchip=off follow-up\" is rolled into this series.\n\n\"whpx: i386: reintroduce enlightenments for Windows 10\" is a bugfix to make\nx2APIC work as intended on Windows 10 without emulating an IOMMU.\n\nAnd dependent on this series so included, CPUID intercepts finally...\nHowever that's only supported starting from Windows 11/Server 2022.\n\nAlso ended up switching over Windows 10 to kernel-irqchip=off\nby default due to PIC interrupt injection being broken.\n\nNote: on Windows 10, pic=off is still not very useful on this\nrelease on AMD CPUs as Linux will fail to find a calibration\nsource for the timer, as it doesn't understand the VMware TSC\nfrequency leaf. On Intel, Linux will get the TSC frequency from\nCPUID instead and boot up fine.\n\nOn Windows 11, Hyper-V enlightenments expose the necessary clock\ninfo, so the scenario only affects hyperv=off.\n\nThat can be solved at a later time.\n\nSome performance (or lack thereof...) numbers:\n\nOn a Ryzen 7 8700GE with a Windows 10 VM running with KVM in nested virt, with\nkernel-irqchip=off for the virt Alpine Linux x86_64 ISO (3.23.3) with -smp cores=2,\nboot times as reported through dmesg:\n\n- QEMU 10.2: 83 seconds\n- QEMU 10.2 with a single core: 18.1 seconds\n- as of this series, x2apic forced off: 29 seconds\n- as of this series, out of the box: 18 seconds\n- with kernel-irqchip=on and EDK2: 16.5 seconds\n- with kernel-irqchip=off and EDK2: 9.5 seconds\n- and with 1 core instead of two: 12.6 seconds\n\nAnd with this series on a Windows 11 VM on the same hardware:\n- kernel-irqchip=on: 6.5 seconds\n- kernel-irqchip=on, x2apic forced off: 7.6 seconds\n- kernel-irqchip=off: 8.3 seconds\n- hyperv=off,kernel-irqchip=off: 7.6 seconds... which is faster,\nso the absence of enlightenment support on Windows 10 doesn't explain things...\n\nWith kernel-irqchip=on on Windows 10, when booting with SeaBIOS, it gets stuck in\nsyslinux due to PIC interrupt injection being broken there. That can be counted\nas an infinite boot time (?).\n\ncheckpatch false positives:\n\nERROR: spaces required around that '*' (ctx:WxV)\n+ UINT32 Ecx, WHV_CPUID_OUTPUT *CpuidOutput))\n\nNot a multiplication but a pointer reference.\n\nERROR: space prohibited after that '&' (ctx:ExW)\n+ & CPUID_7_0_EDX_CET_IBT) {\n ^\n\nERROR: space prohibited after that '&' (ctx:ExW)\n+ & CPUID_7_0_ECX_CET_SHSTK) {\n ^\n\nBecause it's multiline.\n\nChanges in v6:\n\n- kernel-irqchip=off fix: re-registering the interrupt window\nwhen the existing one has too low of a TPR value.\n\nFolded into \"whpx: i386: kernel-irqchip=off fixes\".\n\n- I/O port access fast path cleanup commit added at the end\n\nThe path relied on a side effect of whpx_get_reg instead of\nsomething cleaner.\n\n- Use the CR8 register provided by the hypervisor only when\nkernel-irqchip=off. Rely on the APIC state synchronisation\notherwise.\n\nThis fixes some register sync errors that surfaced when setting\nthe TPR values properly.\n\nChanges in v5/v1 with rename:\n\n- kernel-irqchip=off fixes, notably making 64-bit Windows bootable\n- switching over Windows 10 to kernel-irqchip=off by default\n\nChanges in v4:\n\n- Ugh for a revision sent quickly, unbreaking the arm64 build...\n- and making checkpatch happier to some extent\n\nChanges in v3:\n\n- Fixing CPUID intercepts so that QEMU CPU models work fine now, instead\nof the partial intercept that was present in QEMU 10.2\n- cleanups\n\nChanges in v2:\n\n- GCC warned when a variable name was re-used within a different (but overlapping)\nscope in the same function. It also warned with a -Werror=maybe-uninitialized for\nthe MSR write case. Address those\n- make the in-KVM enlightenments path available on Windows 11 too when -M hyperv=off.\n\nMohamed Mediouni (11):\n target/i386: emulate: include name of unhandled instruction\n whpx: i386: x2apic emulation\n whpx: i386: wire up feature probing\n whpx: i386: disable TbFlushHypercalls for emulated LAPIC\n whpx: i386: enable x2apic by default for user-mode LAPIC\n whpx: i386: reintroduce enlightenments for Windows 10\n whpx: i386: introduce proper cpuid support\n whpx: i386: kernel-irqchip=off fixes\n whpx: i386: use WHvX64RegisterCr8 only when kernel-irqchip=off\n whpx: i386: disable kernel-irqchip on Windows 10 when PIC enabled\n whpx: i386: IO port fast path cleanup\n\n accel/whpx/whpx-common.c | 2 +\n include/system/whpx-common.h | 1 +\n include/system/whpx-internal.h | 10 +\n target/arm/whpx/whpx-all.c | 1 +\n target/i386/cpu.c | 25 ++\n target/i386/emulate/x86_emu.c | 4 +-\n target/i386/whpx/whpx-all.c | 467 ++++++++++++++++++++++++++-------\n target/i386/whpx/whpx-i386.h | 4 +\n 8 files changed, 418 insertions(+), 96 deletions(-)\n create mode 100644 target/i386/whpx/whpx-i386.h" }