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{ "id": 2218103, "url": "http://patchwork.ozlabs.org/api/covers/2218103/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/cover/20260331113835.3510341-1-eleanor.lin@realtek.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260331113835.3510341-1-eleanor.lin@realtek.com>", "list_archive_url": null, "date": "2026-03-31T11:38:32", "name": "[0/3] gpio: realtek: Add support for Realtek DHC RTD1625", "submitter": { "id": 92797, "url": "http://patchwork.ozlabs.org/api/people/92797/?format=api", "name": "Yu-Chun Lin", "email": "eleanor.lin@realtek.com" }, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/cover/20260331113835.3510341-1-eleanor.lin@realtek.com/mbox/", "series": [ { "id": 498182, "url": "http://patchwork.ozlabs.org/api/series/498182/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=498182", "date": "2026-03-31T11:38:35", "name": "gpio: realtek: Add support for Realtek DHC RTD1625", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/498182/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/2218103/comments/", "headers": { "Return-Path": "\n <linux-gpio+bounces-34472-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=realtek.com header.i=@realtek.com header.a=rsa-sha256\n header.s=dkim header.b=gzQlC5km;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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arc=none smtp.client-ip=211.75.126.72", "X-SpamFilter-By": "ArmorX SpamTrap 5.80 with qID 62VBcZOf93149078,\n This message is accepted by code: ctloc85258", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=realtek.com; s=dkim;\n\tt=1774957115; bh=SjlovpYWEBSsDzmnlFbYwK6SwID1Cx3wsIvtuW2FSf4=;\n\th=From:To:CC:Subject:Date:Message-ID:MIME-Version:\n\t Content-Transfer-Encoding:Content-Type;\n\tb=gzQlC5kmGFH2OyA6f5IUp7y5SBpM5HK9Pafgo74YshVp3ELTyGcmDLvTI/EdBhj3o\n\t G6Kcv4eVxU+VIPyKezl06uLA0SCqE1H7CCtpIt7kd5nis8+ejzHB4u5x76UpLw/Dh+\n\t o0xLdwcZ9h5kUgfq1O1B48ZMSOYMrHyIgMbcHFEdtEa74PP1l80EHW2tiZUSBDjD2b\n\t kV4dNbeMYZXPPlG9lukjIz5fWDguQhkD4wf64mR8e8zFkf8reuvMocSm+uM8TylZMr\n\t cJlMzzItkk4EXfS8BQi5d/lnyi88Km3dFen1/LipdhkQsIGsCEfF1z/zE79cs/TKOR\n\t sXLk8vg8OtGXQ==", "From": "Yu-Chun Lin <eleanor.lin@realtek.com>", "To": "<linusw@kernel.org>, <brgl@kernel.org>, <robh@kernel.org>,\n <krzk+dt@kernel.org>, <conor+dt@kernel.org>, <afaerber@suse.com>,\n <tychang@realtek.com>", "CC": "<linux-gpio@vger.kernel.org>, <devicetree@vger.kernel.org>,\n <linux-kernel@vger.kernel.org>,\n <linux-arm-kernel@lists.infradead.org>,\n <linux-realtek-soc@lists.infradead.org>, <cy.huang@realtek.com>,\n <stanley_chang@realtek.com>, <eleanor.lin@realtek.com>,\n <james.tai@realtek.com>", "Subject": "[PATCH 0/3] gpio: realtek: Add support for Realtek DHC RTD1625", "Date": "Tue, 31 Mar 2026 19:38:32 +0800", "Message-ID": "<20260331113835.3510341-1-eleanor.lin@realtek.com>", "X-Mailer": "git-send-email 2.50.1", "Precedence": "bulk", "X-Mailing-List": "linux-gpio@vger.kernel.org", "List-Id": "<linux-gpio.vger.kernel.org>", "List-Subscribe": "<mailto:linux-gpio+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-gpio+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain" }, "content": "This series adds GPIO support for the Realtek DHC RTD1625 SoC.\n\nUnlike the existing driver (gpio-rtd.c) which uses shared bank registers,\nthe RTD1625 features a per-pin register architecture where each GPIO line\nis managed by its own dedicated 32-bit control register. This distinct\nhardware design requires a new, separate driver.\n\nThe device tree changes in this series (Patch 3) depend on the RTD1625 pinctrl\ndriver, which is currently under review and has not been merged yet.\n\nThe dependent pinctrl patch can be found here:\nhttps://lore.kernel.org/lkml/20260317115411.2154365-9-eleanor.lin@realtek.com/\n\nBest Regards,\nYu-Chun Lin\n\nTzuyi Chang (2):\n dt-bindings: gpio: realtek: Add realtek,rtd1625-gpio\n gpio: realtek: Add driver for Realtek DHC RTD1625 SoC\n\nYu-Chun Lin (1):\n arm64: dts: realtek: Add GPIO support for RTD1625\n\n .../bindings/gpio/realtek,rtd1625-gpio.yaml | 74 +++\n arch/arm64/boot/dts/realtek/kent.dtsi | 43 ++\n arch/arm64/boot/dts/realtek/rtd1501.dtsi | 8 +\n arch/arm64/boot/dts/realtek/rtd1861.dtsi | 8 +\n arch/arm64/boot/dts/realtek/rtd1920.dtsi | 8 +\n drivers/gpio/Kconfig | 12 +\n drivers/gpio/Makefile | 1 +\n drivers/gpio/gpio-rtd1625.c | 581 ++++++++++++++++++\n 8 files changed, 735 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/gpio/realtek,rtd1625-gpio.yaml\n create mode 100644 drivers/gpio/gpio-rtd1625.c" }