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{ "id": 2218099, "url": "http://patchwork.ozlabs.org/api/covers/2218099/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-i2c/cover/20260331114742.2896317-1-mukesh.savaliya@oss.qualcomm.com/", "project": { "id": 35, "url": "http://patchwork.ozlabs.org/api/projects/35/?format=api", "name": "Linux I2C development", "link_name": "linux-i2c", "list_id": "linux-i2c.vger.kernel.org", "list_email": "linux-i2c@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260331114742.2896317-1-mukesh.savaliya@oss.qualcomm.com>", "list_archive_url": null, "date": "2026-03-31T11:47:38", "name": "[v6,0/4] Enable multi-owner I2C support for QCOM GENI controllers", "submitter": { "id": 91179, "url": "http://patchwork.ozlabs.org/api/people/91179/?format=api", "name": "Mukesh Kumar Savaliya", "email": "mukesh.savaliya@oss.qualcomm.com" }, "mbox": "http://patchwork.ozlabs.org/project/linux-i2c/cover/20260331114742.2896317-1-mukesh.savaliya@oss.qualcomm.com/mbox/", "series": [ { "id": 498183, "url": "http://patchwork.ozlabs.org/api/series/498183/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-i2c/list/?series=498183", "date": "2026-03-31T11:47:38", "name": "Enable multi-owner I2C support for QCOM GENI controllers", "version": 6, "mbox": "http://patchwork.ozlabs.org/series/498183/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/2218099/comments/", "headers": { "Return-Path": "\n <linux-i2c+bounces-16893-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-i2c@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=ZWxJoc9v;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c15:e001:75::12fc:5321; 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a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h=\n\tcc:content-transfer-encoding:content-type:date:from:message-id\n\t:mime-version:subject:to; s=qcppdkim1; bh=AUux2zk7AwAFrU61+jgegr\n\tGdcC0k+BhMvpTHHgQXjm0=; b=ZWxJoc9vpo9SLL1/zvs3n2G7VAeaBxOxCl+vq9\n\tOZJEqx5gUTYHjJmjUd6xYQm3tnhDrpuNPiopNU8wszCOdf/E27JNUfj7CJNi7Egc\n\tXfpsm/0Y4yWrVB884X92STdU0gsXUwBlUs592k2c00awbltvvWi0DUsmmvNDxdh+\n\t6a3NG7QILl8WCEHrleCtIyMVRxqGewA6r4E4oGBNB7MsfH61BaVUtUggHnSmFSnE\n\tgq0CScTLW71DHsmgdMN7fQkQxAS+uW2c8k7U9Ya/REdQVpfWar47idgbWncjjX8g\n\tZU9OL+uAMRnZcb2WfnVdaY3GjbELJOhgDqDPetWMBVmIFCJg==", "From": "Mukesh Kumar Savaliya <mukesh.savaliya@oss.qualcomm.com>", "To": "viken.dadhaniya@oss.qualcomm.com, andi.shyti@kernel.org, robh@kernel.org,\n krzk+dt@kernel.org, conor+dt@kernel.org, vkoul@kernel.org,\n Frank.Li@kernel.org, andersson@kernel.org, konradybcio@kernel.org,\n dmitry.baryshkov@oss.qualcomm.com, linmq006@gmail.com,\n quic_jseerapu@quicinc.com, agross@kernel.org,\n linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org,\n devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n dmaengine@vger.kernel.org", "Cc": "krzysztof.kozlowski@oss.qualcomm.com,\n bartosz.golaszewski@oss.qualcomm.com,\n bjorn.andersson@oss.qualcomm.com, konrad.dybcio@oss.qualcomm.com,\n Mukesh Kumar Savaliya <mukesh.savaliya@oss.qualcomm.com>", "Subject": "[PATCH v6 0/4] Enable multi-owner I2C support for QCOM GENI\n controllers", "Date": "Tue, 31 Mar 2026 17:17:38 +0530", "Message-Id": "<20260331114742.2896317-1-mukesh.savaliya@oss.qualcomm.com>", "X-Mailer": "git-send-email 2.25.1", "Precedence": "bulk", "X-Mailing-List": "linux-i2c@vger.kernel.org", "List-Id": "<linux-i2c.vger.kernel.org>", "List-Subscribe": "<mailto:linux-i2c+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-i2c+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-QCInternal": [ "smtphost", "smtphost" ], "X-Authority-Analysis": "v=2.4 cv=Gb0aXAXL c=1 sm=1 tr=0 ts=69cbb477 cx=c_pps\n a=Ou0eQOY4+eZoSc0qltEV5Q==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17\n a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=VkNPw1HP01LnGYTKEx00:22\n a=u7WPNUs3qKkmUXheDGA7:22 a=_glEPmIy2e8OvE2BGh3C:22 a=VwQbUJbxAAAA:8\n a=EUspDBNiAAAA:8 a=1yO_DMxMffipIJpN-DIA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10", "X-Proofpoint-GUID": "OG9m2SHIQnLrLpG_pivlIyuOQVBu77dj", "X-Proofpoint-ORIG-GUID": "OG9m2SHIQnLrLpG_pivlIyuOQVBu77dj", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwMzMxMDExNCBTYWx0ZWRfX3G6ilNfM1n61\n Wk72lRlHOBvciVgqaYD24/528aEVtRnCorrI3WIgyXYBZvQHtd5kaR1K+Rz67XwkyI3njdchs1h\n M5oPU9oK6BJTSUXYpH/9cByoMBOCKtn/7BqhVa+yB4ZECx3tQfnKF4vXkNkOFLYcKSkYyHotPYr\n j4okLq4VaKl+Naf4SAWI1dSzPLFTdz/kDL82HoYYt+dJSzM9LvrGCrFIsRtBaSdy4QQutQNquwI\n GIqZeDlbyroi21iljhc2sdXi4pIDi9InwgvLkeqBmlsgO5NV8MHcqQn50Ue73NdfY9Ql1HQ30tM\n Q2bHMjbPQ663D7+4hRPknD1OUdUlcKmvd+3r2yu4ldhz1wBpgJVDAE6gG9NVbm1jfN2kwo0pWLL\n aiUdchXbWbaPRubA0iWY8g5J/QOz6fkyKrQNUgy3LP57t96kH8XENl1/hyYejiS9bAsmLZb+ITR\n JElAQUnZbBTa/P8UUbg==", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-03-31_02,2026-03-31_01,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n lowpriorityscore=0 impostorscore=0 adultscore=0 spamscore=0 bulkscore=0\n malwarescore=0 clxscore=1011 suspectscore=0 priorityscore=1501 phishscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603310114" }, "content": "The QUP-based GENI I2C controller driver currently assumes exclusive\nownership of the controller by a single system processor. This prevents\nsafe use of a single I2C controller by multiple system processors\n(e.g. APPS and a DSP) running the same or different operating systems.\n\nOne practical example is an EEPROM connected to an I2C controller that\nneeds to be accessed independently by firmware running on a DSP and by\nLinux running on the application processor, without causing bus-level\ninterference during transfers.\n\nThis series adds support for operating a QUP GENI I2C Serial Engine in a\nmulti-owner configuration. Each system processor uses its own dedicated\nGPI instance (GPII) as the data path between the Serial Engine and the\nGSI DMA engine. As a result, controller sharing is supported only when\nthe I2C controller operates in GPI mode; FIFO/CPU DMA modes are not\nsupported for this configuration.\n\nTo serialize access at the hardware level, the GPI DMA engine is used to\nemit lock and unlock Transfer Ring Elements (TREs) around I2C transfers.\nThe lock is acquired before the first transfer and released after the\nlast transfer, ensuring uninterrupted access to the controller while a\nprocessor owns it.\n\nIn addition, when a controller is shared, the GENI common layer avoids\nplacing the associated GPIOs into the pinctrl \"sleep\" state during\nruntime suspend. This prevents disruption of transfers that may still\nbe in progress on another system processor using the same controller\npins.\n\nThe multi-owner behavior is enabled via a DeviceTree property,\n`qcom,qup-multi-owner`, on the I2C controller node. This property must be\nused only when the hardware configuration requires controller sharing\nand when GPI mode is enabled.\n\nPatch overview:\n 1. Document the `qcom,qup-multi-owner` DeviceTree property for GENI I2C.\n 2. Extend the QCOM GPI DMA driver to support lock and unlock TREs with a\n simplified single-field API.\n 3. Update the GENI common layer to keep pinctrl active for shared\n controllers during runtime suspend.\n 4. Enable multi-owner operation in the GENI I2C driver using the new\n DeviceTree property and GPI lock/unlock support.\n\nSigned-off-by: Mukesh Kumar Savaliya <mukesh.savaliya@oss.qualcomm.com>\n---\nLink to V5 : https://lore.kernel.org/lkml/20241129144357.2008465-2-mukesh.savaliya@oss.qualcomm.com/\n\nChanges in V6:\n - Addressed review feedback from Krzysztof Kozlowski and other reviewers, primarily\n around clarifying the feature semantics and improving the DeviceTree flag naming.\n - Renamed the DeviceTree property from qcom,shared-se to qcom,qup-multi-owner to\n better describe the multi-owner controller use case.\n - Updated the cover letter to clearly describe the multi-owner I2C design, the\n GPI-only limitation, and the role of the new qcom,qup-multi-owner flag.\n - Updated the DeviceTree binding documentation to reflect the new qcom,qup-multi-owner\n property and refined its description for clarity and correctness.\n - [Patch 2/4] Simplify the GPI I2C interface by replacing multiple shared SE related\n state flags with a single internal lock/unlock control managed entirely in the GPI\n driver - Suggested by Vinod Koul.\n - [Patch 3/4] Updated the GENI common layer to avoid selecting the pinctrl “sleep”\n state for multi-owner controllers, preventing disruption of transfers initiated by\n another system processor during runtime suspend.\n - [Patch 4/4] Updated the GENI I2C driver to: \n - Detect the qcom,qup-multi-owner DeviceTree property.\n\t- Mark the underlying serial engine as shared.\n\t- Request GPI lock and unlock TRE sequencing around I2C transfers using the\n\t simplified single field API.\n - Clarified commit messages across all patches to avoid ambiguous terminology\n (such as “subsystem”), expand abbreviations, and better explain functional\n requirements rather than optimizations.\n - Updated copyright headers across all files wherever applicable.\n - Renamed variable shared_geni_se to multi_owner to match the DT property naming.\n - Changed dev_err(print_log) during probe() to dev_err_probe().\n---\n\nMukesh Kumar Savaliya (4):\n dt-bindings: i2c: qcom,i2c-geni: Document multi-owner controller\n support\n dmaengine: qcom: gpi: Add lock/unlock TREs for multi-owner I2C\n transfers\n soc: qcom: geni-se: Keep pinctrl active for multi-owner controllers\n i2c: qcom-geni: Support multi-owner controllers in GPI mode\n\n .../bindings/i2c/qcom,i2c-geni-qcom.yaml | 7 +++\n drivers/dma/qcom/gpi.c | 44 ++++++++++++++++++-\n drivers/i2c/busses/i2c-qcom-geni.c | 27 +++++++++++-\n drivers/soc/qcom/qcom-geni-se.c | 15 +++++--\n include/linux/dma/qcom-gpi-dma.h | 18 ++++++++\n include/linux/soc/qcom/geni-se.h | 2 +\n 6 files changed, 107 insertions(+), 6 deletions(-)" }