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{ "id": 2218058, "url": "http://patchwork.ozlabs.org/api/covers/2218058/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/cover/20260331102303.33181-1-akhilrajeev@nvidia.com/", "project": { "id": 21, "url": "http://patchwork.ozlabs.org/api/projects/21/?format=api", "name": "Linux Tegra Development", "link_name": "linux-tegra", "list_id": "linux-tegra.vger.kernel.org", "list_email": "linux-tegra@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260331102303.33181-1-akhilrajeev@nvidia.com>", "list_archive_url": null, "date": "2026-03-31T10:22:53", "name": "[v6,00/10] Add GPCDMA support in Tegra264", "submitter": { "id": 81965, "url": "http://patchwork.ozlabs.org/api/people/81965/?format=api", "name": "Akhil R", "email": "akhilrajeev@nvidia.com" }, "mbox": "http://patchwork.ozlabs.org/project/linux-tegra/cover/20260331102303.33181-1-akhilrajeev@nvidia.com/mbox/", "series": [ { "id": 498169, "url": "http://patchwork.ozlabs.org/api/series/498169/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/list/?series=498169", "date": "2026-03-31T10:22:54", "name": "Add GPCDMA support in Tegra264", "version": 6, "mbox": "http://patchwork.ozlabs.org/series/498169/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/2218058/comments/", "headers": { "Return-Path": "\n <linux-tegra+bounces-13471-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-tegra@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=UfHtwNlY;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; 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pr=C", "From": "Akhil R <akhilrajeev@nvidia.com>", "To": "Vinod Koul <vkoul@kernel.org>, Frank Li <Frank.Li@kernel.org>, Rob Herring\n\t<robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley\n\t<conor+dt@kernel.org>, Thierry Reding <thierry.reding@gmail.com>, \"Jonathan\n Hunter\" <jonathanh@nvidia.com>, Laxman Dewangan <ldewangan@nvidia.com>,\n\tPhilipp Zabel <p.zabel@pengutronix.de>, <dmaengine@vger.kernel.org>,\n\t<devicetree@vger.kernel.org>, <linux-tegra@vger.kernel.org>,\n\t<linux-kernel@vger.kernel.org>", "CC": "Akhil R <akhilrajeev@nvidia.com>", "Subject": "[PATCH v6 00/10] Add GPCDMA support in Tegra264", "Date": "Tue, 31 Mar 2026 15:52:53 +0530", "Message-ID": "<20260331102303.33181-1-akhilrajeev@nvidia.com>", "X-Mailer": "git-send-email 2.50.1", "Precedence": "bulk", "X-Mailing-List": "linux-tegra@vger.kernel.org", "List-Id": "<linux-tegra.vger.kernel.org>", "List-Subscribe": "<mailto:linux-tegra+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-tegra+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "X-NVConfidentiality": "public", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-NV-OnPremToCloud": "ExternallySecured", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "DS3PEPF0000C37B:EE_|LV2PR12MB5751:EE_", "X-MS-Office365-Filtering-Correlation-Id": "f9c479fe-634c-406b-7079-08de8f0f92c1", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "\n\tBCL:0;ARA:13230040|36860700016|7416014|376014|82310400026|1800799024|921020|18002099003|56012099003;", "X-Microsoft-Antispam-Message-Info": "\n\tFJE2+Sp8c/f9F5kc75KhP8QAAD3Q/Vg4OBsboM4EzALPvX/YFM7SuBBKNcqUa/Kfh4ks55HqAu5sPaAHCYZSXlpI3moyQHDGFpexIJvaVEvn1WIQRfwOKrhw4LVY+edGnTmcmn3FKRW8sFKvmArIRisqKzr7s09/0YscMOFrJ5ywlU1zEB+Pq48PkpDOpHzUzn0h8COcdZVgIMlxVL3zNiTJwZDUSapr5FLp0VXdbp1GI3HOGOOvlCAuGV+XqWzh/1BkNxE5CEt35KaPycncsKRsRtqYHWx2/QybTdp3Hs90aByfzDZu5T6Ot0+4TcIQpBsbNXSV8hbb7Iw4g26tEDN6frh3XZOSF+4f3s+nZmqG+Zaan3xYin4/dU7hZzpGPsfWQ2GBjccI9illNOOjiI837FIAD0IRmnIpSMbH2GAPvY5ruqwXTgpEYSpWjabrBzu5VGk1mx4qujHlyURJl76OQEry39Ho4jotsfWv5yz7VXyfInoFfd9FywuMttVljaBkMedRkxp38klAIAPZ6KFIaUQveQeH4bhrAs3wGREFxI10IcEvQVYRERkZkgeF6Nm0yoHM4mogFlMQgLdtGK0knOEI972Q1GN9R7DVAEdsUS43Ynfmay8PdXxTHQUdWcZe4gSc/tlwAqm3fiuVOhJlRJUxWi5T1NSYbE0XMb+Lt7/5JPB8jaIWG550nFRc2l4zlqOdECVOLmyNt8F+oKTEPWnUbtmCDeI1rP8wwnEDn7DCtT9kipk8ceGAQfcBKF2GfiMhIdh+Rj4vjQG1ajvceuOaqYP0f0ZOpg1YRKoqvuJTCw2js0WKcBwlDZ+o", "X-Forefront-Antispam-Report": "\n\tCIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(36860700016)(7416014)(376014)(82310400026)(1800799024)(921020)(18002099003)(56012099003);DIR:OUT;SFP:1101;", "X-MS-Exchange-AntiSpam-MessageData-ChunkCount": "1", "X-MS-Exchange-AntiSpam-MessageData-0": "\n\tsCfcIZ2Mvf+ud22pgUVzJhJ6JNIiVPoUPsGQ5tf8aDheegT/U5GiFK87tqpde/vVexdtIW9PQZ0x3xBEdo1aV6hDeAQpQqLdxhoABXCVBiFp3pIzzXYtkXVUE86/h2rDYa+LQu1xwhZ/4amvcoYfCgfX27jx7bGPwDAVo3FRKFTabt2wHctG7Llcsk4zTehN7cD/2nBHZEoTF1Cz/Fhw/J1yT7VGlD/AjaWEDvsg/rKZM7HnkG2rr6AIXKsxNiOusu8pss/P0T6Rx6haxLSQ4NguBYvZnr6r9TnwMp2XbcrzkqvzyVPsMTH6vy69Zg6KB411osR1KQpsG0qzOW4g2BPn+lM8CmLVpq+Xx+VcJ3p96lH3NSP0PoGrFRoIKH7LwEaUTH+2iWuekj5yPcWyqoBSmuRWPRKeeq74aR4VwiKRX+opsXe1oKmwQXIqd3nM", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "31 Mar 2026 10:23:38.1123\n (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n f9c479fe-634c-406b-7079-08de8f0f92c1", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n\tDS3PEPF0000C37B.namprd04.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "LV2PR12MB5751" }, "content": "This series adds support for GPCDMA in Tegra264 with additional\nsupport for separate stream ID for each channel. Tegra264 GPCDMA\ncontroller has changes in the register offsets and uses 41-bit\naddressing for memory. Add changes in the tegra186-gpc-dma driver\nto support these.\n\nv5->v6:\n- Replace dev_err() with dev_err_probe() in the probe function for fixed\n return values also.\nv4->v5:\n- Use dev_err_probe() when returning error from the probe function.\n- Remove tegra194 and tegra234 compatible from the reset 'if' condition\n in the bindings as suggested in v2 (which I missed).\nv3->v4:\n- Split device tree changes to two patches.\n- Reordered patches to have fixes first.\n- Added fixes tag to dt-bindings and device tree changes.\nv2->v3:\n- Add description for iommu-map property and update commit descriptions.\n- Use enum for compatible string instead of const.\n- Remove unused registers from struct tegra_dma_channel_regs.\n- Use devm_of_dma_controller_register() to register the DMA controller.\n- Remove return value check for mask setting in the driver as the bitmask\n value is always greater than 32.\nv1->v2:\n- Fix dt_bindings_check warnings\n- Drop fallback compatible \"nvidia,tegra186-gpcdma\" from Tegra264 DT\n- Use dma_addr_t for sg_req src/dst fields and drop separate high_add\n variable and check for the addr_bits only when programming the\n registers.\n- Update address width to 39 bits for Tegra234 and before since the SMMU\n supports only up to 39 bits till Tegra234.\n- Add a patch to do managed DMA controller registration.\n- Describe the second iteration in the probe.\n- Update commit descriptions.\n\nAkhil R (10):\n dt-bindings: dma: nvidia,tegra186-gpc-dma: Make reset optional\n arm64: tegra: Remove fallback compatible for GPCDMA\n dt-bindings: dma: nvidia,tegra186-gpc-dma: Add iommu-map property\n dmaengine: tegra: Make reset control optional\n dmaengine: tegra: Use struct for register offsets\n dmaengine: tegra: Support address width > 39 bits\n dmaengine: tegra: Use managed DMA controller registration\n dmaengine: tegra: Use iommu-map for stream ID\n dmaengine: tegra: Add Tegra264 support\n arm64: tegra: Enable GPCDMA in Tegra264 and add iommu-map\n\n .../bindings/dma/nvidia,tegra186-gpc-dma.yaml | 32 +-\n .../arm64/boot/dts/nvidia/tegra264-p3834.dtsi | 4 +\n arch/arm64/boot/dts/nvidia/tegra264.dtsi | 3 +-\n drivers/dma/tegra186-gpc-dma.c | 429 +++++++++++-------\n 4 files changed, 284 insertions(+), 184 deletions(-)" }