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{ "id": 2217547, "url": "http://patchwork.ozlabs.org/api/covers/2217547/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-aspeed/cover/20260330-irqchip-v4-0-3c0f1620cc06@aspeedtech.com/", "project": { "id": 57, "url": "http://patchwork.ozlabs.org/api/projects/57/?format=api", "name": "Linux ASPEED SoC development", "link_name": "linux-aspeed", "list_id": "linux-aspeed.lists.ozlabs.org", "list_email": "linux-aspeed@lists.ozlabs.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260330-irqchip-v4-0-3c0f1620cc06@aspeedtech.com>", "list_archive_url": null, "date": "2026-03-30T06:32:09", "name": "[v4,0/4] AST2700-A2 interrupt controller hierarchy and route support", "submitter": { "id": 71489, "url": "http://patchwork.ozlabs.org/api/people/71489/?format=api", "name": "Ryan Chen", "email": "ryan_chen@aspeedtech.com" }, "mbox": "http://patchwork.ozlabs.org/project/linux-aspeed/cover/20260330-irqchip-v4-0-3c0f1620cc06@aspeedtech.com/mbox/", "series": [ { "id": 497963, "url": "http://patchwork.ozlabs.org/api/series/497963/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-aspeed/list/?series=497963", "date": "2026-03-30T06:32:10", "name": "AST2700-A2 interrupt controller hierarchy and route support", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/497963/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/2217547/comments/", "headers": { "Return-Path": "\n <linux-aspeed+bounces-3797-incoming=patchwork.ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-aspeed@lists.ozlabs.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=2404:9400:21b9:f100::1; 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lists.ozlabs.org;\n dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com;\n spf=pass (client-ip=211.20.114.72; helo=twmbx01.aspeed.com;\n envelope-from=ryan_chen@aspeedtech.com;\n receiver=lists.ozlabs.org) smtp.mailfrom=aspeedtech.com", "From": "Ryan Chen <ryan_chen@aspeedtech.com>", "Subject": "[PATCH v4 0/4] AST2700-A2 interrupt controller hierarchy and route\n support", "Date": "Mon, 30 Mar 2026 14:32:09 +0800", "Message-ID": "<20260330-irqchip-v4-0-3c0f1620cc06@aspeedtech.com>", "X-Mailing-List": "linux-aspeed@lists.ozlabs.org", "List-Id": "<linux-aspeed.lists.ozlabs.org>", "List-Help": "<mailto:linux-aspeed+help@lists.ozlabs.org>", "List-Owner": "<mailto:linux-aspeed+owner@lists.ozlabs.org>", "List-Post": "<mailto:linux-aspeed@lists.ozlabs.org>", "List-Archive": "<https://lore.kernel.org/linux-aspeed/>,\n <https://lists.ozlabs.org/pipermail/linux-aspeed/>", "List-Subscribe": "<mailto:linux-aspeed+subscribe@lists.ozlabs.org>,\n <mailto:linux-aspeed+subscribe-digest@lists.ozlabs.org>,\n <mailto:linux-aspeed+subscribe-nomail@lists.ozlabs.org>", "List-Unsubscribe": "<mailto:linux-aspeed+unsubscribe@lists.ozlabs.org>", "Precedence": "list", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "X-B4-Tracking": "v=1; b=H4sIAOkYymkC/23MQQ6DIBCF4as0rEszgIJ21Xs0XSAOhUXVgiFtj\n HcvutHELt9kvn8iEYPHSK6niQRMPvq+y6M4n4hxunsi9W3ehAOXwKGkPryN8wNVqNEKqYoWa5K\n /h4DWf9bS/ZG383Hsw3cNJ7Zcj43EKNAGBAMEaaBSNx0HxHZE4y6mf5EllPiGBcgN84xtVTJuo\n G5Qir9Y7DDfYZGxkFKJ2pZKG3vA8zz/AChwD+EdAQAA", "X-Change-ID": "20260205-irqchip-7eaef3674de9", "To": "Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>,\n\tConor Dooley <conor+dt@kernel.org>, Joel Stanley <joel@jms.id.au>, \"Andrew\n Jeffery\" <andrew@codeconstruct.com.au>, Paul Walmsley <pjw@kernel.org>,\n\t\"Palmer Dabbelt\" <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>,\n\t\"Alexandre Ghiti\" <alex@ghiti.fr>, Thomas Gleixner <tglx@kernel.org>, Thomas\n Gleixner <tglx@kernel.org>", "CC": "<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,\n\t<linux-arm-kernel@lists.infradead.org>, <linux-aspeed@lists.ozlabs.org>,\n\t<linux-riscv@lists.infradead.org>, Ryan Chen <ryan_chen@aspeedtech.com>", "X-Mailer": "b4 0.14.3", "X-Developer-Signature": "v=1; a=ed25519-sha256; t=1774852330; l=5545;\n i=ryan_chen@aspeedtech.com; s=20251126; h=from:subject:message-id;\n bh=2YRtrcIEpOWrAdhNl8A+m416MZj9b+AOfhV4PMTCzGI=;\n b=leRN0msFH+xIpM4fUICSbtFYte3oLzDxzhAtPEcwoTq4GYx9ofeYmNq1hqsiK8ncZKawLKdXR\n PO4jDW9dHmlAR3HstgEdBKZWeixlFBiNRPhzwAzRydugWrpCWAniR8O", "X-Developer-Key": "i=ryan_chen@aspeedtech.com; a=ed25519;\n pk=Xe73xY6tcnkuRjjbVAB/oU30KdB3FvG4nuJuILj7ZVc=", "X-Spam-Status": "No, score=0.0 required=5.0 tests=SPF_HELO_FAIL,SPF_PASS\n\tautolearn=disabled version=4.0.1", "X-Spam-Checker-Version": "SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org" }, "content": "The AST2700 SoC has undergone multiple silicon revisions (A0, A1, A2)\nprior to mass production.\n\nA0 laid the ground-work with a split controller design (INTC0 and\nINTC1) used for early development and bring-up. The interrupt\narchitecture was substantially reworked in the A1 to introduce an\nexplicit routing model and clearer hierarchy, though the split\ncontrollers remained. The A1 interrupt architecture is unchanged in A2.\n\nA2 is the production design. A0 and A1 are pre-production silicon and\nare no longer intended for deployment outside of ASPEED.\n\nThe existing binding and driver were written against A0 prior to the A1\nrework. The A0 design directly wired INTC1 instances to INTC0, and\nINTC0 to the GIC of the Primary Service Processor (PSP, a Cortex-A35).\nThe A0 binding and driver therefore do not account for the alternative\ndestinations of the Secondary and Tertiary Service Processors (SSP,\nTSP) and BootMCU, or the necessary route selection logic present in the\nproduction design.\n\nWith the above context, this series replaces the existing binding and\ndriver.\n\nIt is not necessary for projects to maintain support for A0 due to its\npre-production nature, and between Linux, U-Boot and Zephyr there are\nno upstream devicetree users of the current binding.\n\nThe new binding uses localised interrupt numbers and models the\nhardware connectivity between interrupt controllers using the\naspeed,interrupt-ranges property. It is introduced in a new file before\nthe existing binding is removed in order to keep the diff readable.\n\nThe INTC0 driver creates a hierarchical irqdomain under the selected\nupstream interrupt controller and implements route resolution logic.\nINTC1 driver instances defer route selection to INTC0 and expose a\nlinear interrupt namespace to their parent.\n\nA brief history of related submissions\n--------------------------------------\n\nSome modifications to the existing binding were sent to the lists in\nthe past. Due to process choices the revisions were difficult to track.\nThey are listed below.\n\nThe approaches took several forms but ended in the minor adjustment in\nv6 being applied. This enabled use of the A1 design but requires\nassumptions about platform route configuration defined in firmware.\nThese assumptions are removed by this current series.\n\n* [PATCH] dt-bindings: interrupt-controller: aspeed: Refine AST2700 binding description and example\n https://lore.kernel.org/all/20250714071753.2653620-1-ryan_chen@aspeedtech.com/\n\n* [PATCH v2] dt-bindings: interrupt-controller: aspeed: Add parent node compatibles and refine documentation\n https://lore.kernel.org/all/20250715024258.2304665-1-ryan_chen@aspeedtech.com/\n\n* [PATCH v3 0/2] irqchip: aspeed: Add AST2700 INTC debugfs support and yaml update\n https://lore.kernel.org/all/20250722095156.1672873-1-ryan_chen@aspeedtech.com/\n\n* [PATCH v4 0/2] irqchip/ast2700-intc: Add AST2700 INTC debugfs support and yaml update\n https://lore.kernel.org/all/20250812100830.145578-1-ryan_chen@aspeedtech.com/\n\n* [PATCH v5 0/3] AST2700 interrupt controller hierarchy support\n https://lore.kernel.org/all/20251022065507.1152071-1-ryan_chen@aspeedtech.com/\n\n* [PATCH v6 0/1] Update correct AST2700 interrupt controller binding\n https://lore.kernel.org/all/20251030060155.2342604-1-ryan_chen@aspeedtech.com/\n\nSigned-off-by: Ryan Chen <ryan_chen@aspeedtech.com>\n---\nChanges in v4:\n- 3/4 fix warning: the frame size of 1296 bytes is larger than 1280 bytes\n- Link to v3: https://lore.kernel.org/r/20260326-irqchip-v3-0-366739f57acf@aspeedtech.com\n\nChanges in v3:\n- 1/4 Squash patch 5/5 and 1/5.\n- 1/4 modify wrap lines at 80 char.\n- 1/4 modify maintainers name and email.\n- 1/4 modify typo Sevice-> Service\n- Link to v2: https://lore.kernel.org/r/20260306-irqchip-v2-0-f8512c09be63@aspeedtech.com\n\nChanges in v2:\n- Change suject to \"AST2700-A2 interrupt controller hierarchy and route\n support\".\n- Describe timeline for (pre-)production design evolution and\n binding development to support the break in compatibility.\n- fix \"make dt_binding_check\" compatible string consistance with\n example.\n- Split KUnit coverage out of the main driver patch.\n- Link to v1: https://lore.kernel.org/r/20260205-irqchip-v1-0-b0310e06c087@aspeedtech.com\n\n---\nRyan Chen (4):\n dt-bindings: interrupt-controller: Describe AST2700-A2 hardware instead of A0\n irqchip/ast2700-intc: Add AST2700-A2 support\n irqchip/ast2700-intc: Add KUnit tests for route resolution\n irqchip/aspeed-intc: Remove AST2700-A0 support\n\n .../interrupt-controller/aspeed,ast2700-intc.yaml | 90 ----\n .../aspeed,ast2700-interrupt.yaml | 188 +++++++\n drivers/irqchip/.kunitconfig | 5 +\n drivers/irqchip/Kconfig | 23 +\n drivers/irqchip/Makefile | 3 +-\n drivers/irqchip/irq-aspeed-intc.c | 139 -----\n drivers/irqchip/irq-ast2700-intc0-test.c | 473 +++++++++++++++++\n drivers/irqchip/irq-ast2700-intc0.c | 584 +++++++++++++++++++++\n drivers/irqchip/irq-ast2700-intc1.c | 282 ++++++++++\n drivers/irqchip/irq-ast2700.c | 106 ++++\n drivers/irqchip/irq-ast2700.h | 47 ++\n 11 files changed, 1710 insertions(+), 230 deletions(-)\n---\nbase-commit: 6de23f81a5e08be8fbf5e8d7e9febc72a5b5f27f\nchange-id: 20260205-irqchip-7eaef3674de9\n\nBest regards," }