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{ "id": 2217350, "url": "http://patchwork.ozlabs.org/api/covers/2217350/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/cover/20260328021036.85945-1-mailingradian@gmail.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260328021036.85945-1-mailingradian@gmail.com>", "list_archive_url": null, "date": "2026-03-28T02:10:31", "name": "[v3,0/5] SDM670 LPASS LPI pin controller support", "submitter": { "id": 84825, "url": "http://patchwork.ozlabs.org/api/people/84825/?format=api", "name": "Richard Acayan", "email": "mailingradian@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/cover/20260328021036.85945-1-mailingradian@gmail.com/mbox/", "series": [ { "id": 497848, "url": "http://patchwork.ozlabs.org/api/series/497848/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=497848", "date": "2026-03-28T02:10:34", "name": "SDM670 LPASS LPI pin controller support", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/497848/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/2217350/comments/", "headers": { "Return-Path": "\n <linux-gpio+bounces-34336-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=kXgq126o;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; 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The ADSP patches are\nnot sent yet.\n\nDependencies:\n- SDM670 Basic SoC thermal zones (devicetree nodes are touching)\n https://lore.kernel.org/r/20260310002037.1863-1-mailingradian@gmail.com\n- Support for the Pixel 3a XL with the Tianma panel (for reserved GPIOs)\n https://lore.kernel.org/r/20260310002606.16413-1-mailingradian@gmail.com\n\nChanges since v2 (https://lore.kernel.org/r/20260310012446.32226-1-mailingradian@gmail.com):\n- add minItems and maxItems (1/5)\n- add review tags (2-5/5)\n\nChanges since v1 (https://lore.kernel.org/r/20260210021109.11906-1-mailingradian@gmail.com):\n- add LPASS in dt-bindings patch subject (2/5)\n- change pin names (2/5, 3/5, 4/5)\n- add reviewed-by from Krzysztof (2/5)\n- specify gpio-reserved-ranges (1/5, 5/5)\n\nRichard Acayan (5):\n dt-bindings: qcom: lpass-lpi-common: add reserved GPIOs property\n dt-bindings: pinctrl: qcom: Add SDM670 LPASS LPI pinctrl\n pinctrl: qcom: add sdm670 lpi tlmm\n arm64: dts: qcom: sdm670: add lpi pinctrl\n arm64: dts: qcom: sdm670-google: add reserved lpi gpios\n\n .../pinctrl/qcom,lpass-lpi-common.yaml | 8 +\n .../qcom,sdm670-lpass-lpi-pinctrl.yaml | 81 +++++++++\n .../boot/dts/qcom/sdm670-google-common.dtsi | 4 +\n arch/arm64/boot/dts/qcom/sdm670.dtsi | 73 ++++++++\n drivers/pinctrl/qcom/Kconfig | 10 ++\n drivers/pinctrl/qcom/Makefile | 1 +\n .../pinctrl/qcom/pinctrl-sdm670-lpass-lpi.c | 166 ++++++++++++++++++\n 7 files changed, 343 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,sdm670-lpass-lpi-pinctrl.yaml\n create mode 100644 drivers/pinctrl/qcom/pinctrl-sdm670-lpass-lpi.c" }