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{ "id": 2217317, "url": "http://patchwork.ozlabs.org/api/covers/2217317/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/cover/20260327-pinctrl-mux-v5-0-d4aec9d62c62@nxp.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260327-pinctrl-mux-v5-0-d4aec9d62c62@nxp.com>", "list_archive_url": null, "date": "2026-03-27T21:33:57", "name": "[v5,0/7] pinctrl: Add generic pinctrl for board-level mux chips", "submitter": { "id": 68011, "url": "http://patchwork.ozlabs.org/api/people/68011/?format=api", "name": "Frank Li", "email": "Frank.Li@nxp.com" }, "mbox": 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"=?utf-8?q?/qDpkBjLIDjMnImvJhvE9rdE0jPh?=\n\t=?utf-8?q?wsOivqda/obRl7NGcAhot+APCXI9Jw23Gh5wOjwdO1Z2Su4Qq/z+zbAek8YN8OOOw?=\n\t=?utf-8?q?LAHNV+a9mrT9Rihx7Wh06Cm970qMuoPs7kn9F5BRceO8OYNbhnlioPWkSrrzS69Dr?=\n\t=?utf-8?q?vqXe8JxN218v/H2bmnXU1c8p8IwX//zltN0H/uZRiNNtFfYB8DzQMZC6QudK5huqq?=\n\t=?utf-8?q?ENq47PTpRx876MCxhghy0Yu/vkXq+XpWabkpPbZCfUxohrOMMPJClcgqKfLdmsEwI?=\n\t=?utf-8?q?vH1Vn+W2Ylfzmytchio4YUtUUfWM3V48NvBGRwYlBOZeUz2ks7u3PyGBRt1H/jvXh?=\n\t=?utf-8?q?h1LZ002YAjJabGOrW4Wv0eMjlOm/Y+p04x/3bE+box5jGVyBaNeVBVjCzNLrfx1Jr?=\n\t=?utf-8?q?uPT501N9Zq9W5jyTXjs7Ac8FIJ6D9sLiV1nVALV7jCbujFmYeBlTIazb3AWmSWa87?=\n\t=?utf-8?q?YTmpgcFJw0UNJ9TGWyjt/FUR/N3pUsfZOFISJEq4yBYbfpLPe8/gWHmPvYZ0niEtx?=\n\t=?utf-8?q?uz2mY3ewNd4QMyyf3RgCOWDxoJtfdgQHVLH/ip8IIPhm+RGTcief9JD/ThY3Nq73W?=\n\t=?utf-8?q?MP064I0n0HMA1OIqbTfID/s+6qM6XcPLjULGWvsZo4Xn2HdRWsF6Vvh4cJHBw+dSO?=\n\t=?utf-8?q?Z8MQF3MC6qq7iYF35LSI9Ma5WXu9j953tNEwcfU+tGdgWNCcGgceYryeTg2+aq+6h?=\n\t=?utf-8?q?fR35fanZ7fcwUlHGUcfGgdcetUxJbwAqhCmjB5igKOI8x8Ayo6PM5LRBbHrU8yH0I?=\n\t=?utf-8?q?4sKe5z4fwy8XX8x1D+8hU4IY5/hhMjMCbHMTNS6sgFz20SsiT2q++hvlz7gv50Pfa?=\n\t=?utf-8?q?F4N4bAqL6Ud4qcQLSlJjPbZw/nhZbvNDVzwnUIXjSpMHI/MRKpKU01W/gFg1AC/XO?=\n\t=?utf-8?q?eCqVwRT3pB/UibE5uWozNw0vFOPnMqNSG/6ELKp/l/BwAsmldzr0snZkcqHYN1Xe0?=\n\t=?utf-8?q?GOJu2PiBMtUGy7EfoZgMaLysFv0Ib1/41X6VSkSNCDTGK/F7xhq6O+b5W7Ljunx25?=\n\t=?utf-8?q?ouhrZ0TDHKdcDE79dygIHAmB9BDstqra6kjLUVUswBdSZInwuLc5Qzfu1W1HPpHE5?=\n\t=?utf-8?q?ioFbtXZn/FOq10Cfc2gjxyUVCQ0wZ1gTmqo/zhWpJwCB++i2S/FRG8Ovhd8YBz4uM?=\n\t=?utf-8?q?ITP4Da8MJWCRShWjhF6IqeCWWXT3rseWKfDQGGiqqco8K1YWLo785DLtMLzwEN25H?=\n\t=?utf-8?q?y3+JfZm49nv5jsGnZPeIlU24BazQnixaPNKyymdyT6P9FAHCF1bi/lOZdXQ9H7b7w?=\n\t=?utf-8?q?8bmPEwKCdI1z4qrzAojs73mf+jl9QqAMKVBXLqw8ESbRQFnZUDiiAv+pCleOb7t86?=\n\t=?utf-8?q?BYGFj37spMPixrMoQdn3T5NvchlVdd4MVEuFYd9DaIObOUBPj2dVOtatIAVKdTBfY?=\n\t=?utf-8?q?99IptwKFldeycZB0jHVN6Uw6gQ8r6ZJ3aDMamd+g3TvxRAXQMt/f1TksWupTaYrfO?=\n\t=?utf-8?q?jl535ouxAM4R4t22bS2bU2JjelhTV7yiS7e/DVTDdhrEtsDwYCtUO4VaG9/Oul++K?=\n\t=?utf-8?q?PFZBewdHV2bgGYVPnaSugj7LfUkqvrP/ZWxav1sFBTDXVNwcU35Eojbz1fWzQ6lpb?=\n\t=?utf-8?q?jjGgG0QATgJNekC3tW7GF1YCULC9nNfXBdakZl+sO0B1OjqeFPgvgISE8i/aVxc7C?=\n\t=?utf-8?q?PdJ2mr8vNR?=", "X-OriginatorOrg": "nxp.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 728b2321-abbf-48e9-576b-08de8c48994b", "X-MS-Exchange-CrossTenant-AuthSource": "PA4PR04MB9366.eurprd04.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "27 Mar 2026 21:34:17.2747\n (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "686ea1d3-bc2b-4c6f-a92c-d99c5c301635", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n Y5gcjzLFnJa1WpQSv2Ng7M0jqmU+8whpkCXU0ZI99sgMrogmh46xEIogsG/iJ1zkhHrD1+ukzMLl4rgwqnEmhA==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "AM9PR04MB8668" }, "content": "Add a generic pinctrl binding for board-level pinmux chips that are\ncontrolled through the multiplexer subsystem.\n\nOn some boards, especially development boards, external mux chips are used\nto switch SoC signals between different peripherals (e.g. MMC and UART).\nThe mux select lines are often driven by a GPIO expander over I2C,\nas illustrated below:\n\n ┌──────┐ ┌─────┐\n │ SOC │ │ │ ┌───────┐\n │ │ │ │───►│ MMC │\n │ │ │ MUX │ └───────┘\n │ ├─────►│ │ ┌───────┐\n │ │ │ │───►│ UART │\n │ │ └─────┘ └───────┘\n │ │ ▲\n │ │ ┌────┴──────────────┐\n │ I2C ├───►│ GPIO Expander │\n └──────┘ └───────────────────┘\n\nTraditionally, gpio-hog is used to configure the onboard mux at boot.\nHowever, the GPIO expander may probe later than consumer devices such as\nMMC. As a result, the MUX might not be configured when the peripheral\ndriver probes, leading to initialization failures or data transfer errors.\n\nIntroduce a generic pinctrl binding that models the board-level MUX as a\npin control provider and builds proper device links between the MUX, its\nGPIO controller, and peripheral devices. This ensures correct probe\nordering and reliable mux configuration.\n\nThe implementation leverages the standard multiplexer subsystem, which\nprovides broad support for onboard mux controllers and avoids the need for\nper-driver custom MUX handling\n\nSigned-off-by: Frank Li <Frank.Li@nxp.com>\n---\nChanges in v5:\n- add npins to pinctrl_generic_to_map()\n- remove pins = kmalloc() in pinctrl_generic_to_map().\n- Link to v4: https://lore.kernel.org/r/20260325-pinctrl-mux-v4-0-043c2c82e623@nxp.com\n\nChanges in v4:\n- use Conor Dooley suggest to extract funciton pinctrl_generic_pins_to_map()\n- Link to v3: https://lore.kernel.org/r/20260311-pinctrl-mux-v3-0-236b1c17bf9b@nxp.com\n\nChanges in v3:\n- collect rob's review tag for binding\n- extend and use pinctrl_generic_pins_function_dt_node_to_map()\n- add judgement about\ncommit 2243a87d90b42eb38bc281957df3e57c712b5e56\n\"pinctrl: avoid duplicated calling enable_pinmux_setting for a pin\"\n\nwhich call pinmux_disable_setting() before pinmux_enable_setting() when\nswitch state. It is actually what wanted. Previous remove .disable() to\navoid hardware glitch when switch state.\n\nNew .release_mux() call intent just release software resource, like lock,\ndon't touch hardware register. No glitch involve. Comments already added\n\nLinus Walleij:\n I hope this answer all of your questions. If I missed, let me know\n\n- Link to v2: https://lore.kernel.org/r/20260225-pinctrl-mux-v2-0-1436a25fa454@nxp.com\n\nChanges in v2:\n- Add release_mux callback,\n test insmod/rmmod, mux_state_(de)select() called.\n- Link to v1: https://lore.kernel.org/r/20260219-pinctrl-mux-v1-0-678d21637788@nxp.com\n\n---\nFrank Li (7):\n mux: add devm_mux_control_get_from_np() to get mux from child node\n dt-bindings: pinctrl: Add generic pinctrl for board-level mux chips\n pinctrl: extract pinctrl_generic_to_map() from pinctrl_generic_pins_function_dt_node_to_map()\n pinctrl: add optional .release_mux() callback\n pinctrl: add generic board-level pinctrl driver using mux framework\n arm64: dts: imx8mp-evk: add board-level mux for CAN2 and MICFIL\n arm64: dts: imx8mp-evk: add flexcan2 overlay file\n\n .../bindings/pinctrl/pinctrl-multiplexer.yaml | 57 ++++++\n .../devicetree/bindings/pinctrl/pinctrl.yaml | 2 +-\n arch/arm64/boot/dts/freescale/Makefile | 4 +\n .../boot/dts/freescale/imx8mp-evk-flexcan2.dtso | 15 ++\n arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 23 ++-\n drivers/mux/core.c | 40 +++--\n drivers/pinctrl/Kconfig | 9 +\n drivers/pinctrl/Makefile | 1 +\n drivers/pinctrl/pinconf.h | 18 ++\n drivers/pinctrl/pinctrl-generic-mux.c | 197 +++++++++++++++++++++\n drivers/pinctrl/pinctrl-generic.c | 94 ++++++----\n drivers/pinctrl/pinmux.c | 5 +\n include/linux/mux/consumer.h | 16 +-\n include/linux/pinctrl/pinmux.h | 5 +\n 14 files changed, 424 insertions(+), 62 deletions(-)\n---\nbase-commit: ff76d257e86235eb07ef33db8644a517c48d1c3f\nchange-id: 20260213-pinctrl-mux-df9c5b661540\n\nBest regards,\n--\nFrank Li <Frank.Li@nxp.com>" }