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{ "id": 2217043, "url": "http://patchwork.ozlabs.org/api/covers/2217043/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/cover/20260327141029.628483-1-uros.stajic@htecgroup.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260327141029.628483-1-uros.stajic@htecgroup.com>", "list_archive_url": null, "date": "2026-03-27T14:10:46", "name": "[v6,0/7] riscv: Add support for P8700 platform on Boston board", "submitter": { "id": 90991, "url": "http://patchwork.ozlabs.org/api/people/90991/?format=api", "name": "Uros Stajic", "email": "uros.stajic@htecgroup.com" }, "mbox": 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bh=RKB/VfFt4oCo8sz6K5vsOvB5DuFdoLpUBCI3D7ypx4g=;\n b=m61Kfs4bkLG2aezL1IshT/JrwGMOaizQ/U0MvXLlxvpVBC70HVC7Y0VNxoT9dMpa/WF3ojnoZYn38lJQ/5k9wH5YwHQIFC180zbuNfkeiBrYVrEfiEMfiYN492TJ3TtDOGEmPm15qwjrdcOkKJ3IudN10qLDjC3UtUZAIKZTdwukdWp8sHs59yAA0JrYQjlTrtxaBrjW9n6EN3aTO/i6tW+93zEQx8T3554gRjScAO2XfPfVxcdSN7TY1tyWUB9vXJem1MKVfrCb2Bj8Z4gRX9j1JDguouptDR2AzAssT4PaBwtzV+orP521i0npyRrnyGv8I93gFe3wvB0nZazsqQ==", "From": "Uros Stajic <uros.stajic@htecgroup.com>", "To": "\"u-boot@lists.denx.de\" <u-boot@lists.denx.de>", "CC": "Djordje Todorovic <Djordje.Todorovic@htecgroup.com>, Uros Stajic\n <uros.stajic@htecgroup.com>", "Subject": "[PATCH v6 0/7] riscv: Add support for P8700 platform on Boston board", "Thread-Topic": "[PATCH v6 0/7] riscv: Add support for P8700 platform on Boston\n board", "Thread-Index": "AQHcvfOB06iJFzr3GU6YuT14ReHoOg==", "Date": "Fri, 27 Mar 2026 14:10:46 +0000", "Message-ID": "<20260327141029.628483-1-uros.stajic@htecgroup.com>", "Accept-Language": "en-US", "Content-Language": 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"2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "----\nChanges in v6:\n- 01/07 - Fix the BOSTON_PLAT_BASE redefinition warning\n- 02/07 - Update the DTS compatibles and make minor cleanup changes\n- 06/07 - Replace <asm/gpio.h> with <asm-generic/gpio.h>\n- Drop the libfdt memreserve alignment patch\n\nChanges in v5:\n- 01/08 - Drop p8700_platform_setup.S; move the early init logic to\n harts_early_init()\n- 02/08 - Add board_early_init_r() for Boston RISC-V.\n- 02/08 - Defconfig/DT: set timebase-frequency to 25MHz, enable PCIe2 node,\n and move bootargs to CONFIG_BOOTARGS\n- 02/08 - Set CONFIG_PCI_BRIDGE_MEM_ALIGNMENT to avoid PCI BAR allocation\n failures seen on Boston/P8700\n- 02/08 - Drop GD_FLG_COHERENT_DMA; use a platform DMA-coherency check\n instead\n- 03/08 - Update eg20t-gpio driver to use the PCI API\n- 05/08 - Refine the commit subject/body for the MIPS GIC syscon change\n- 08/08 - Add p8700_dma_is_coherent() helper to determine whether DMA\n is coherent\n- Drop 'display' command patch\n- Drop the 'startharts' command patch.\n\nChanges in v4:\n- 02/10 - Use riscv_aclint_timer and update CPU timer settings\n- 03/10 - Fixed inconsistent empty line usage in gpio-eg20t driver\n- 08/10 - Replaced inline assembly accessors with generic macros\n- Dropped AMO instructions emulation patch\n- Dropped P8700-specific timer patch\n\nChanges in v3:\n- 01/12 - Split original patch into CPU/Board parts\n- 02/12 - New patch: extracted board-specific logic from original 01/12\n- 01/12 - Relocated object rule for p8700 into p8700-specific Makefile\n- 01/12 - Explained .word usage for mcache instruction and replaced it\n with symbolic macro\n- 01/12 - Replaced inline assembly lw instruction with readl()\n- 01/12 - Removed p8700 code from start.S, moved to harts_early_init()\n- 02/12 - Fixed operand spacing in assembly\n- 02/12 - Replaced hardcoded address with properly macros\n- 02/12 - Switched from riscv,isa to riscv,isa-extensions\n- 02/12 - Sorted DT properties properly\n \nChanges in v2:\n- 03/11 - Remove redundant pcie_xilinx_probe() and update commit\n\t message accordingly.\n----\n\nChao-ying Fu (7):\n riscv: Add initial support for P8700 SoC\n board: boston-riscv: Add initial support for P8700 Boston board\n gpio: Add GPIO driver for Intel EG20T\n pci: xilinx: Avoid writing memory base/limit for root bridge\n riscv: Add syscon driver for MIPS GIC block\n net: pch_gbe: Add PHY reset and MAC address fallback for RISC-V\n riscv: p8700: Add Coherence Manager (CM) and IOCU support\n\n arch/riscv/Kconfig | 30 +++\n arch/riscv/cpu/p8700/Kconfig | 14 ++\n arch/riscv/cpu/p8700/Makefile | 10 +\n arch/riscv/cpu/p8700/cache.c | 99 ++++++++\n arch/riscv/cpu/p8700/cm-iocu.c | 75 ++++++\n arch/riscv/cpu/p8700/cm.c | 92 ++++++++\n arch/riscv/cpu/p8700/cpu.c | 105 +++++++++\n arch/riscv/cpu/p8700/dram.c | 37 +++\n arch/riscv/cpu/p8700/p8700.c | 14 ++\n arch/riscv/dts/Makefile | 1 +\n arch/riscv/dts/boston-p8700.dts | 264 ++++++++++++++++++++++\n arch/riscv/include/asm/arch-p8700/cm.h | 61 +++++\n arch/riscv/include/asm/arch-p8700/p8700.h | 133 +++++++++++\n arch/riscv/include/asm/global_data.h | 4 +\n arch/riscv/lib/Makefile | 1 +\n arch/riscv/lib/mips_gic.c | 47 ++++\n board/mips/boston-riscv/Kconfig | 47 ++++\n board/mips/boston-riscv/MAINTAINERS | 11 +\n board/mips/boston-riscv/Makefile | 9 +\n board/mips/boston-riscv/boston-lcd.h | 20 ++\n board/mips/boston-riscv/boston-regs.h | 42 ++++\n board/mips/boston-riscv/boston-riscv.c | 59 +++++\n board/mips/boston-riscv/checkboard.c | 43 ++++\n board/mips/boston-riscv/config.mk | 15 ++\n board/mips/boston-riscv/iocu.c | 102 +++++++++\n board/mips/boston-riscv/lowlevel_init.S | 18 ++\n board/mips/boston-riscv/reset.c | 15 ++\n configs/boston-p8700_defconfig | 98 ++++++++\n drivers/clk/Kconfig | 2 +-\n drivers/gpio/Kconfig | 7 +\n drivers/gpio/Makefile | 1 +\n drivers/gpio/eg20t-gpio.c | 141 ++++++++++++\n drivers/net/pch_gbe.c | 37 ++-\n drivers/net/pch_gbe.h | 1 +\n drivers/pci/pcie_xilinx.c | 9 +\n include/configs/boston-riscv.h | 9 +\n 36 files changed, 1670 insertions(+), 3 deletions(-)\n create mode 100644 arch/riscv/cpu/p8700/Kconfig\n create mode 100644 arch/riscv/cpu/p8700/Makefile\n create mode 100644 arch/riscv/cpu/p8700/cache.c\n create mode 100644 arch/riscv/cpu/p8700/cm-iocu.c\n create mode 100644 arch/riscv/cpu/p8700/cm.c\n create mode 100644 arch/riscv/cpu/p8700/cpu.c\n create mode 100644 arch/riscv/cpu/p8700/dram.c\n create mode 100644 arch/riscv/cpu/p8700/p8700.c\n create mode 100644 arch/riscv/dts/boston-p8700.dts\n create mode 100644 arch/riscv/include/asm/arch-p8700/cm.h\n create mode 100644 arch/riscv/include/asm/arch-p8700/p8700.h\n create mode 100644 arch/riscv/lib/mips_gic.c\n create mode 100644 board/mips/boston-riscv/Kconfig\n create mode 100644 board/mips/boston-riscv/MAINTAINERS\n create mode 100644 board/mips/boston-riscv/Makefile\n create mode 100644 board/mips/boston-riscv/boston-lcd.h\n create mode 100644 board/mips/boston-riscv/boston-regs.h\n create mode 100644 board/mips/boston-riscv/boston-riscv.c\n create mode 100644 board/mips/boston-riscv/checkboard.c\n create mode 100644 board/mips/boston-riscv/config.mk\n create mode 100644 board/mips/boston-riscv/iocu.c\n create mode 100644 board/mips/boston-riscv/lowlevel_init.S\n create mode 100644 board/mips/boston-riscv/reset.c\n create mode 100644 configs/boston-p8700_defconfig\n create mode 100644 drivers/gpio/eg20t-gpio.c\n create mode 100644 include/configs/boston-riscv.h" }