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{ "id": 2216948, "url": "http://patchwork.ozlabs.org/api/covers/2216948/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/cover/20260327121015.996806-1-pranav.sanwal@amd.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260327121015.996806-1-pranav.sanwal@amd.com>", "list_archive_url": null, "date": "2026-03-27T12:10:12", "name": "[0/3] Add PCIe and NVMe support for AMD Versal Gen 2", "submitter": { "id": 92240, "url": "http://patchwork.ozlabs.org/api/people/92240/?format=api", "name": "Pranav Sanwal", "email": "pranav.sanwal@amd.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/cover/20260327121015.996806-1-pranav.sanwal@amd.com/mbox/", "series": [ { "id": 497757, "url": "http://patchwork.ozlabs.org/api/series/497757/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=497757", "date": "2026-03-27T12:10:12", "name": "Add PCIe and NVMe support for AMD Versal Gen 2", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/497757/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/2216948/comments/", "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=amd.com header.i=@amd.com header.a=rsa-sha256\n header.s=selector1 header.b=bSBlwxL0;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; 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helo=satlexmb07.amd.com; pr=C", "None (SATLEXMB04.amd.com: pranav.sanwal@amd.com does not\n designate permitted sender hosts)" ], "From": "Pranav Sanwal <pranav.sanwal@amd.com>", "To": "<u-boot@lists.denx.de>", "CC": "<git@amd.com>, <michal.simek@amd.com>", "Subject": "[PATCH 0/3] Add PCIe and NVMe support for AMD Versal Gen 2", "Date": "Fri, 27 Mar 2026 17:40:12 +0530", "Message-ID": "<20260327121015.996806-1-pranav.sanwal@amd.com>", "X-Mailer": "git-send-email 2.34.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "CY4PEPF0000E9D6:EE_|DS7PR12MB6262:EE_", "X-MS-Office365-Filtering-Correlation-Id": "1f2ce6ec-dedb-4723-3e15-08de8bf9d5d8", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;\n ARA:13230040|1800799024|36860700016|376014|82310400026|18002099003|56012099003;", "X-Microsoft-Antispam-Message-Info": "\n PrIsZPUO/Cd31xsn1fmSxU22T8i8KNkfbeID5nnmFLqEVH7oTZODTVLcRs0I14pQVaLBe23aJSLV6wcI3Ba0kRqAqXFZPIjjgEwvO3lKXa1pa5MdMjW5DvG1vFFLhwdhVMuHXS6WHHlK1xOrP+3hJifTIshOavW336Job0WoEN0u/Ixki/c3ywUrVz2IUEaY+BCuwbvit98Wj6SQ6b9Ps2rQGcp/O7mTNPRNl/F2UW/BdjZ+NkikMW41jkNh5XqKhZl8MTsIKNr6mKRTBd6r19tPm9e/s/aWZcLPdyjhWkNjJ7BTYdC9ok5/Lxj/ep0+YQ7wuECRvHtXQBFSTPQNg112T3ORa/RT1TdTd9v2jMhLhH30jbJiagxQLn44MLEGQ2QcNUgOZepQ+dwhhAGBMp37HeKm0dw8Ek1BOe4Fd4oX979H9VNEyPxtMIutb/MBERJtZncDOJ+AP1hki6u7lR69zhw6wTt0RHtvip222c7tXcYTEpTb9XeGb4oSgDcZCQzgnASaV3biUvt/2OcEnX7pcubQOgngqQniJFlPCpOfEbV/yyeQc/r7j5ZR1lSMqZPcTjUTisdYpEH6hwY9M16W6/BK/VWNUJnGSQLFItd46HR7gn2KrmX8tXITNNlb7eyhukRwVdd/ypvwjjVXy08QuMNWj5+rB7ZLvB8KlposhEyOsqDj6qQ15iCMHV9yhV8ITwv8F6UysqF0ZWF6+y5AlY9hT7Stw4gCUo2VPtSPjTCHJHM53DM0ojN/qmPv0UfNmqCyOlymGt1I4mRhdQ==", "X-Forefront-Antispam-Report": "CIP:165.204.84.17; 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Ip=[165.204.84.17];\n Helo=[satlexmb07.amd.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CY4PEPF0000E9D6.namprd05.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DS7PR12MB6262", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "This series adds PCIe host controller support for AMD Versal Gen 2 SoCs,\nenabling NVMe boot on boards such as the VEK385.\n\nPatch 1 introduces the driver (pcie_dw_amd.c), built on the existing\npcie_dw_common infrastructure.\n\nPatch 2 adds the required MMU entries for the PCIe DBI registers.\n\nPatch 3 enables the required Kconfig symbols in the defconfig and\nextends amd_versal2.h to include BOOT_TARGET_DEVICES_NVME in the\ndistro boot target list when CONFIG_NVME is set.\n\nPranav Sanwal (3):\n pci: Add AMD Versal2 DW PCIe host controller driver\n arm: versal2: Map PCIe DBI and config regions when PCIe is enabled\n amd: versal2: Enable PCIe/NVMe support and add NVMe boot target\n\n MAINTAINERS | 5 +\n arch/arm/mach-versal2/cpu.c | 16 +-\n configs/amd_versal2_virt_defconfig | 6 +\n drivers/pci/Kconfig | 11 ++\n drivers/pci/Makefile | 1 +\n drivers/pci/pcie_dw_amd.c | 250 +++++++++++++++++++++++++++++\n include/configs/amd_versal2.h | 7 +\n 7 files changed, 295 insertions(+), 1 deletion(-)\n create mode 100644 drivers/pci/pcie_dw_amd.c" }