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{
    "id": 2216673,
    "url": "http://patchwork.ozlabs.org/api/covers/2216673/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-pci/cover/20260327035422.4020455-1-den@valinux.co.jp/",
    "project": {
        "id": 28,
        "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api",
        "name": "Linux PCI development",
        "link_name": "linux-pci",
        "list_id": "linux-pci.vger.kernel.org",
        "list_email": "linux-pci@vger.kernel.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20260327035422.4020455-1-den@valinux.co.jp>",
    "list_archive_url": null,
    "date": "2026-03-27T03:54:15",
    "name": "[v12,0/7] PCI: endpoint: pci-ep-msi: Add embedded doorbell fallback",
    "submitter": {
        "id": 91573,
        "url": "http://patchwork.ozlabs.org/api/people/91573/?format=api",
        "name": "Koichiro Den",
        "email": "den@valinux.co.jp"
    },
    "mbox": "http://patchwork.ozlabs.org/project/linux-pci/cover/20260327035422.4020455-1-den@valinux.co.jp/mbox/",
    "series": [
        {
            "id": 497685,
            "url": "http://patchwork.ozlabs.org/api/series/497685/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=497685",
            "date": "2026-03-27T03:54:17",
            "name": "PCI: endpoint: pci-ep-msi: Add embedded doorbell fallback",
            "version": 12,
            "mbox": "http://patchwork.ozlabs.org/series/497685/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/covers/2216673/comments/",
    "headers": {
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        ],
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        "From": "Koichiro Den <den@valinux.co.jp>",
        "To": "Jingoo Han <jingoohan1@gmail.com>,\n Manivannan Sadhasivam <mani@kernel.org>,\n Lorenzo Pieralisi <lpieralisi@kernel.org>, =?utf-8?q?Krzysztof_Wilczy=C5=84?=\n\t=?utf-8?q?ski?= <kwilczynski@kernel.org>, Rob Herring <robh@kernel.org>,\n Bjorn Helgaas <bhelgaas@google.com>,\n Kishon Vijay Abraham I <kishon@kernel.org>, Jon Mason <jdmason@kudzu.us>,\n Dave Jiang <dave.jiang@intel.com>, Allen Hubbe <allenbh@gmail.com>,\n Niklas Cassel <cassel@kernel.org>, Frank Li <Frank.Li@nxp.com>,\n Bhanu Seshu Kumar Valluri <bhanuseshukumar@gmail.com>,\n Marco Crivellari <marco.crivellari@suse.com>,\n Shin'ichiro Kawasaki <shinichiro.kawasaki@wdc.com>,\n Manikanta Maddireddy <mmaddireddy@nvidia.com>",
        "Cc": "linux-pci@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tntb@lists.linux.dev",
        "Subject": "[PATCH v12 0/7] PCI: endpoint: pci-ep-msi: Add embedded doorbell\n fallback",
        "Date": "Fri, 27 Mar 2026 12:54:15 +0900",
        "Message-ID": "<20260327035422.4020455-1-den@valinux.co.jp>",
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    "content": "Hi,\n\nSome endpoint platforms cannot use a GIC ITS-backed MSI domain for\nEP-side doorbells. In those cases, endpoint function (EPF) drivers\ncannot provide a doorbell to the root complex (RC), and features such as\nvNTB may fall back to polling with significantly higher latency.\n\nThis series adds an alternate doorbell backend based on the PCIe\nendpoint controller (EPC)'s integrated eDMA interrupt-emulation feature.\nThe RC rings the doorbell by doing a single 32-bit MMIO write to an eDMA\ndoorbell location exposed in a BAR window. The EP side receives a Linux\nIRQ that EPF drivers can use as a doorbell interrupt, without relying on\nMSI message writes reaching the ITS.\n\nThe DesignWare eDMA interrupt-emulation doorbell is wired up as one user\nof the generic EPC aux-resource API. Other vendors can support their\nMMIO-based doorbells by implementing the EPC aux-resource callbacks:\npci_epc_ops.count_aux_resources() / pci_epc_ops.get_aux_resources().\n\n\nDependencies\n============\n\n(1). [PATCH 0/2] dmaengine: dw-edma: Interrupt-emulation doorbell support\n     https://lore.kernel.org/dmaengine/20260215152216.3393561-1-den@valinux.co.jp/\n     Note: already landed in dmaengine/next.\n\n\nTested on\n=========\n\nv12 re-tested on:\n\n  (1). R-Car S4 Spider: EP <-> RC\n  (2). RK3588 Rock 5B (EP) <-> CIX CD8180 Orion O6 (RC)\n\nThe EP in both scenarios prints the following in dmesg when running\nDOORBELL_TEST:\n\n  pci_epf_test pci_epf_test.0: Can't find MSI domain for EPC\n  pci_epf_test pci_epf_test.0: Using embedded (DMA) doorbell fallback\n\nWith this series applied, the DOORBELL_TEST succeeds:\n\n  $ ./pci_endpoint_test -t DOORBELL_TEST\n  TAP version 13\n  1..1\n  # Starting 1 tests from 1 test cases.\n  #  RUN           pcie_ep_doorbell.DOORBELL_TEST ...\n  #            OK  pcie_ep_doorbell.DOORBELL_TEST\n  ok 1 pcie_ep_doorbell.DOORBELL_TEST\n  # PASSED: 1 / 1 tests passed.\n  # Totals: pass:1 fail:0 xfail:0 xpass:0 skip:0 error:0\n\nIOMMU coverage tested:\n\n  On R-Car S4 Spider EP, DOORBELL_TEST passes with the EP IOMMU both\n  enabled and disabled.\n  On Rock 5B EP, DOORBELL_TEST passes with the EP IOMMU disabled. The\n  enabled case is not applicable, as the EP IOMMU is explicitly disabled\n  upstream on this platform.\n\n\nPerformance test: vNTB ping latency\n===================================\n\n(*) Re-tested with v12 only to confirm that no regression was introduced\n    in v11->v12. No performance difference is expected.\n\nPrerequisite:\n  To test on 2x R-Car S4 Spider boards, the following two commits are\n  needed:\n  - 13f55a7ca773 (\"PCI: dwc: rcar-gen4: Change EPC BAR alignment to 4K as\n                   per the documentation\")\n  - f761e0deb4d9 (\"PCI: dwc: rcar-gen4: Mark BAR0 and BAR2 as Resizable\n                   BARs in endpoint mode\")\n  Note: these already landed in pci/controller/dwc-rcar-gen4-ep.\n\nSetup:\n  - configfs (R-Car S4 Spider in EP mode):\n\n      cd /sys/kernel/config/pci_ep/\n      mkdir functions/pci_epf_vntb/func1\n      echo 0x1912 >   functions/pci_epf_vntb/func1/vendorid\n      echo 0x0030 >   functions/pci_epf_vntb/func1/deviceid\n      echo 32 >       functions/pci_epf_vntb/func1/msi_interrupts\n      echo 4 >        functions/pci_epf_vntb/func1/pci_epf_vntb.0/db_count\n      echo 128 >      functions/pci_epf_vntb/func1/pci_epf_vntb.0/spad_count\n      echo 1 >        functions/pci_epf_vntb/func1/pci_epf_vntb.0/num_mws\n      echo 0x100000 > functions/pci_epf_vntb/func1/pci_epf_vntb.0/mw1\n      echo 0x1912 >   functions/pci_epf_vntb/func1/pci_epf_vntb.0/vntb_vid\n      echo 0x0030 >   functions/pci_epf_vntb/func1/pci_epf_vntb.0/vntb_pid\n      echo 0x10 >     functions/pci_epf_vntb/func1/pci_epf_vntb.0/vbus_number\n      echo 0 >        functions/pci_epf_vntb/func1/pci_epf_vntb.0/ctrl_bar\n      echo 4 >        functions/pci_epf_vntb/func1/pci_epf_vntb.0/db_bar\n      echo 2 >        functions/pci_epf_vntb/func1/pci_epf_vntb.0/mw1_bar\n      ln -s controllers/e65d0000.pcie-ep functions/pci_epf_vntb/func1/primary/\n      echo 1 > controllers/e65d0000.pcie-ep/start\n\n  - ensure ntb_transport/ntb_netdev are loaded on both sides\n\nResults:\n\n  - Without this series (pci/endpoint)\n\n    $ ping -c 10 10.0.0.11\n    PING 10.0.0.11 (10.0.0.11) 56(84) bytes of data.\n    64 bytes from 10.0.0.11: icmp_seq=1 ttl=64 time=12.1 ms\n    64 bytes from 10.0.0.11: icmp_seq=2 ttl=64 time=6.17 ms\n    64 bytes from 10.0.0.11: icmp_seq=3 ttl=64 time=12.2 ms\n    64 bytes from 10.0.0.11: icmp_seq=4 ttl=64 time=6.10 ms\n    64 bytes from 10.0.0.11: icmp_seq=5 ttl=64 time=12.1 ms\n    64 bytes from 10.0.0.11: icmp_seq=6 ttl=64 time=9.96 ms\n    64 bytes from 10.0.0.11: icmp_seq=7 ttl=64 time=4.04 ms\n    64 bytes from 10.0.0.11: icmp_seq=8 ttl=64 time=10.2 ms\n    64 bytes from 10.0.0.11: icmp_seq=9 ttl=64 time=4.13 ms\n    64 bytes from 10.0.0.11: icmp_seq=10 ttl=64 time=10.0 ms\n\n  - With this series (on top of pci/endpoint + Dependency (1))\n\n    $ ping -c 10 10.0.0.11\n    PING 10.0.0.11 (10.0.0.11) 56(84) bytes of data.\n    64 bytes from 10.0.0.11: icmp_seq=1 ttl=64 time=0.809 ms\n    64 bytes from 10.0.0.11: icmp_seq=2 ttl=64 time=0.756 ms\n    64 bytes from 10.0.0.11: icmp_seq=3 ttl=64 time=0.813 ms\n    64 bytes from 10.0.0.11: icmp_seq=4 ttl=64 time=0.974 ms\n    64 bytes from 10.0.0.11: icmp_seq=5 ttl=64 time=0.874 ms\n    64 bytes from 10.0.0.11: icmp_seq=6 ttl=64 time=0.888 ms\n    64 bytes from 10.0.0.11: icmp_seq=7 ttl=64 time=0.878 ms\n    64 bytes from 10.0.0.11: icmp_seq=8 ttl=64 time=1.11 ms\n    64 bytes from 10.0.0.11: icmp_seq=9 ttl=64 time=0.811 ms\n    64 bytes from 10.0.0.11: icmp_seq=10 ttl=64 time=0.922 ms\n\n\n---\n\nChangelog\n---------\n\n* v11->v12 changes:\n  - Rebased onto the current pci/endpoint:\n    185596ad93f5 (\"PCI: endpoint: pci-epf-vntb: Implement .get_dma_dev()\")\n  - Split the EPC auxiliary-resource API into\n    pci_epc_count_aux_resources() and pci_epc_get_aux_resources(), both\n    returning 0 on success.\n  - Added the corresponding count/get callbacks in pci_epc_ops and in the\n    DesignWare EPC provider.\n  - Updated the embedded doorbell fallback to use the new count/get\n    helpers.\n  - Stopped warning on duplicate DOORBELL_MMIO resources for now; use the\n    first matching resource and add a TODO for future multi-resource\n    support.\n\n* v10->v11 changes:\n  - Rebased onto the current pci/endpoint:\n    e022f0c72c7f (\"selftests: pci_endpoint: Skip reserved BARs\")\n  - Dropped PCI_EPC_AUX_DMA_CTRL_MMIO and PCI_EPC_AUX_DMA_CHAN_DESC from\n    this series; they will be added later together with their first real\n    consumer.\n  - Picked up tags from Frank and Niklas for patches 5/6/7.\n  - Dropped tags for patches 1 and 3 due to code changes.\n  - Revised the commit message of Patch 2 to better explain the purpose.\n\n* v9->v10 changes:\n  - Patch 7/7: report the dma_map_resource() DMA address instead of the\n    raw physical address, so EPF drivers do not need to perform any\n    additional IOMMU mapping and the semantics match the MSI doorbell\n    case.\n  - Rebased onto the latest pci/endpoint, and updated dependency references.\n  - Re-ran functional tests and vNTB ping-latency measurements, and added\n    Rock 5B (EP) <-> Orion O6 (RC) to the test matrix.\n\n* v8->v9 changes:\n  - Add a new dependency series (3), which moved the BAR reserved-subregion\n    framework + the RK3588 BAR4 example out of v8 (dropping the corresponding\n    patches from this series).\n  - pci-epf-vntb: rename the duplicate-IRQ helper and invert the return value,\n    per Frank's review.\n  - pci-epf-test: drop the extra size_add() doorbell-offset check, per Niklas'\n    review.\n  - pci-ep-msi: add a DWORD alignment check for DOORBELL_MMIO, per Niklas's\n    review.\n  - Carry over Reviewed-by tags for unchanged patches + drop Reviewed-by tags\n    where code changed.\n  - Rename the last patch subject (drop 'eDMA' word).\n\n* v7->v8 changes:\n  - Deduplicate request_irq()/free_irq() calls based on virq (shared\n    IRQ) rather than doorbell type, as suggested during review of v7\n    Patch #7.\n  - Clean up the pci_epf_alloc_doorbell() error path, as suggested\n    during review of v7 Patch #9.\n  - Use range_end_overflows_t() instead of an open-coded overflow check,\n    following discussion during review of v7 Patch #5.\n  - Add a write-data field to the DOORBELL_MMIO aux-resource metadata\n    and plumb it through to the embedded doorbell backend (DesignWare\n    uses data=0).\n\n* v6->v7 changes:\n  - Split out preparatory patches to keep the series below 10 patches.\n  - Add support for platforms where the eDMA register block is fixed\n    within a reserved BAR window (e.g. RK3588 BAR4) and must be reused\n    as-is.\n  - Introduce a dedicated virtual IRQ and irq_chip (using\n    handle_level_irq) for interrupt-emulation doorbells instead of\n    reusing per-channel IRQs. This avoids delivery via different IRQs on\n    platforms with chip->nr_irqs > 1.\n\n* v5->v6 changes:\n  - Fix a double-free in v5 Patch 8/8 caused by mixing __free(kfree) with\n    an explicit kfree(). This is a functional bug (detectable by KASAN),\n    hence the respin solely for this fix. Sorry for the noise. No other\n    changes.\n\n* v4->v5 changes:\n  - Change the series subject now that the series has evolved into a\n    consumer-driven set focused on the embedded doorbell fallback and its\n    in-tree users (epf-test and epf-vntb).\n  - Drop [PATCH v4 01/09] (dw-edma per-channel interrupt routing control)\n    from this series for now, so the series focuses on what's needed by the\n    current consumer (i.e. the doorbell fallback implementation).\n  - Replace the v4 embedded-doorbell \"test variant + host/kselftest\n    plumbing\" with a generic embedded-doorbell fallback in\n    pci_epf_alloc_doorbell(), including exposing required IRQ request flags\n    to EPF drivers.\n  - Two preparatory fix patches (Patch 6/8 and 7/8) to clean up error\n    handling and state management ahead of Patch 8/8.\n  - Rename *_get_remote_resource() to *_get_aux_resources() and adjust\n    relevant variable namings and kernel docs. Discussion may continue.\n  - Rework dw-edma per-channel metadata exposure to cache the needed info\n    in dw_edma_chip (IRQ number + emulation doorbell offset) and consume it\n    from the DesignWare EPC auxiliary resource provider without calling back\n    to dw-edma.\n\n* v3->v4 changes:\n  - Drop dma_slave_caps.hw_id and the dmaengine selfirq callback\n    registration API. Instead, add a dw-edma specific dw_edma_chan_info()\n    helper and extend the EPC remote resource metadata accordingly.\n  - Add explicit acking for eDMA interrupt emulation and adjust the\n    dw-edma IRQ path for embedded-doorbell usage.\n  - Replace the previous EPC API smoke test with an embedded doorbell\n    test variant (pci-epf-test + pci_endpoint_test/selftests).\n  - Rebase onto pci.git controller/dwc commit 43d324eeb08c.\n\n* v2->v3 changes:\n  - Replace DWC-specific helpers with a generic EPC remote resource query API.\n  - Add pci-epf-test smoke test and host/kselftest support for the new API.\n  - Drop the dw-edma-specific notify-only channel and polling approach\n    ([PATCH v2 4/7] and [PATCH v2 5/7]), and rework notification handling\n    around a generic dmaengine_(un)register_selfirq() API implemented\n    by dw-edma.\n\n* v1->v2 changes:\n  - Combine the two previously posted series into a single set (per Frank's\n    suggestion). Order dmaengine/dw-edma patches first so hw_id support\n    lands before the PCI LL-region helper, which assumes\n    dma_slave_caps.hw_id availability.\n\nv11: https://lore.kernel.org/linux-pci/20260324083728.3744734-1-den@valinux.co.jp/\nv10: https://lore.kernel.org/linux-pci/20260302071427.534158-1-den@valinux.co.jp/\nv9: https://lore.kernel.org/linux-pci/20260219081318.4156901-1-den@valinux.co.jp/\nv8: https://lore.kernel.org/linux-pci/20260217080601.3808847-1-den@valinux.co.jp/\nv7: https://lore.kernel.org/linux-pci/20260215163847.3522572-1-den@valinux.co.jp/\nv6: https://lore.kernel.org/all/20260209125316.2132589-1-den@valinux.co.jp/\nv5: https://lore.kernel.org/all/20260209062952.2049053-1-den@valinux.co.jp/\nv4: https://lore.kernel.org/all/20260206172646.1556847-1-den@valinux.co.jp/\nv3: https://lore.kernel.org/all/20260204145440.950609-1-den@valinux.co.jp/\nv2: https://lore.kernel.org/all/20260127033420.3460579-1-den@valinux.co.jp/\nv1: https://lore.kernel.org/dmaengine/20260126073652.3293564-1-den@valinux.co.jp/\n    +\n    https://lore.kernel.org/linux-pci/20260126071550.3233631-1-den@valinux.co.jp/\n\n\nThanks for reviewing.\n\n\nKoichiro Den (7):\n  PCI: endpoint: Add auxiliary resource query API\n  PCI: dwc: Record integrated eDMA register window\n  PCI: dwc: ep: Expose integrated eDMA resources via EPC aux-resource\n    API\n  PCI: endpoint: pci-ep-msi: Refactor doorbell allocation for new\n    backends\n  PCI: endpoint: pci-epf-vntb: Reuse pre-exposed doorbells and IRQ flags\n  PCI: endpoint: pci-epf-test: Reuse pre-exposed doorbell targets\n  PCI: endpoint: pci-ep-msi: Add embedded doorbell fallback\n\n .../pci/controller/dwc/pcie-designware-ep.c   | 123 ++++++++++++\n drivers/pci/controller/dwc/pcie-designware.c  |   4 +\n drivers/pci/controller/dwc/pcie-designware.h  |   2 +\n drivers/pci/endpoint/functions/pci-epf-test.c |  84 +++++---\n drivers/pci/endpoint/functions/pci-epf-vntb.c |  61 +++++-\n drivers/pci/endpoint/pci-ep-msi.c             | 183 ++++++++++++++++--\n drivers/pci/endpoint/pci-epc-core.c           |  83 ++++++++\n include/linux/pci-epc.h                       |  53 +++++\n include/linux/pci-epf.h                       |  31 ++-\n 9 files changed, 577 insertions(+), 47 deletions(-)"
}