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{ "id": 2216246, "url": "http://patchwork.ozlabs.org/api/covers/2216246/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/cover/20260326-pci-m2-e-v7-0-43324a7866e6@oss.qualcomm.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260326-pci-m2-e-v7-0-43324a7866e6@oss.qualcomm.com>", "list_archive_url": null, "date": "2026-03-26T08:06:28", "name": "[v7,0/8] Add support for handling PCIe M.2 Key E connectors in devicetree", "submitter": { "id": 91277, "url": "http://patchwork.ozlabs.org/api/people/91277/?format=api", "name": "Manivannan Sadhasivam via B4 Relay", "email": "devnull+manivannan.sadhasivam.oss.qualcomm.com@kernel.org" }, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/cover/20260326-pci-m2-e-v7-0-43324a7866e6@oss.qualcomm.com/mbox/", "series": [ { "id": 497544, "url": "http://patchwork.ozlabs.org/api/series/497544/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=497544", "date": "2026-03-26T08:06:33", "name": "Add support for handling PCIe M.2 Key E connectors in devicetree", "version": 7, "mbox": "http://patchwork.ozlabs.org/series/497544/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/2216246/comments/", "headers": { "Return-Path": "\n <linux-pci+bounces-51152-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=pw0lYK7n;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1774512400; cv=none;\n b=MUG5MxpSPpwh/7qWmEkQts12wHrGJN2HJR7W6q/Z9B1bOg47fiGGzP/tGFL0Wb9O9d535CBsabH1JGV7sxvhLkJypapX+bAFba0SUtkxPQYh2qDjwabfHgNJwD5Zi7u0pU7nelal/Y5PF5Kog5zCnU8hOjuX3mmyNO1bpSSmLuk=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1774512400; c=relaxed/simple;\n\tbh=d6b5tGqYUx6+z9gficky9a1VVFlPor5JwCfeMzYcQjg=;\n\th=From:Subject:Date:Message-Id:MIME-Version:Content-Type:To:Cc;\n b=cEvg1/DpRrLrM0kARY8trwlrl/xnYAhvAQolcdpy7iqqC779CnlRroSkuPQeGX/9o6js6J+0ebYL5EE+pM76ngtuhuL7u2DC3hGlirdb3YF7RCMrRpx19YHOTxiAXK0wVt5i8/osVCAbYqKE44vYeybxeKuz5a7yBZpLH3cr4g0=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=pw0lYK7n; arc=none smtp.client-ip=10.30.226.201", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1774512400;\n\tbh=d6b5tGqYUx6+z9gficky9a1VVFlPor5JwCfeMzYcQjg=;\n\th=From:Subject:Date:To:Cc:Reply-To:From;\n\tb=pw0lYK7nOrc87BJjF4nhZuHYgvTRIiyZl4BduxFdp7T4AS6acZVOIVjneDNKIAqzE\n\t k/5n92+e5I6EMZgXyM2nfqsFSezMk3Ep1InmfXDoscX21omyBBz2hNSpUcXRZs9AAI\n\t A0lTaizbdna775EqYA4KxAIqeGzp1e5E4kLrf4mR5Jb5ahBlRzHJBgUD361SDPcupu\n\t EQkqQaAuEeHokegqlpyWALAH40KEKL6/i7ITEgocc8vpP7K89RsgmWOZUV9wSbBiNM\n\t 6TUcZKRV5mx79qF6b+AJtg6RXmnw25JAJRPIbNAoJDlsj4j7FDBpx7byboOuP0dk+0\n\t ByX76VBvD89Ug==", "From": "Manivannan Sadhasivam via B4 Relay\n <devnull+manivannan.sadhasivam.oss.qualcomm.com@kernel.org>", "Subject": "[PATCH v7 0/8] Add support for handling PCIe M.2 Key E connectors\n in devicetree", "Date": "Thu, 26 Mar 2026 13:36:28 +0530", "Message-Id": "<20260326-pci-m2-e-v7-0-43324a7866e6@oss.qualcomm.com>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "X-B4-Tracking": "v=1; b=H4sIAATpxGkC/3XRTW7DIBAF4KtErIsFw5/JqveourCZoUGq48Q4V\n qsody9OVIVFvEF6aL4nxFxZpilRZvvdlU20pJzGYwnubcfCoTt+EU9YMgMBRkoJ/BQSH4AT99p\n 60wWP1jhWxk8TxfRzr/r4LPmQ8jxOv/fmRa63L0oWyQX3TkuFto8t6Pcx5+Z86b7DOAxNOdjat\n UDlwVQeilfQgkUSLgSz4dW/t0JKUXlVvI4dkUOBpqMNr2tfv18XTzG2GiFYBLvhzdMD6Mqb4hF\n 9742QqFTY8PbplXSVt+v/hda3UYoWFb7wt8dyJjpfynrnx4ZY32Xi61Ca97vFNYJPQZbh2x9TJ\n KpTEwIAAA==", "X-Change-ID": "20251112-pci-m2-e-94695ac9d657", "To": "Rob Herring <robh@kernel.org>,\n Greg Kroah-Hartman <gregkh@linuxfoundation.org>,\n Jiri Slaby <jirislaby@kernel.org>, Nathan Chancellor <nathan@kernel.org>,\n Nicolas Schier <nicolas.schier@linux.dev>, Hans de Goede <hansg@kernel.org>,\n =?utf-8?q?Ilpo_J=C3=A4rvinen?= <ilpo.jarvinen@linux.intel.com>,\n Mark Pearson <mpearson-lenovo@squebb.ca>,\n \"Derek J. Clark\" <derekjohn.clark@gmail.com>,\n Manivannan Sadhasivam <mani@kernel.org>,\n Krzysztof Kozlowski <krzk+dt@kernel.org>,\n Conor Dooley <conor+dt@kernel.org>, Marcel Holtmann <marcel@holtmann.org>,\n Luiz Augusto von Dentz <luiz.dentz@gmail.com>,\n Bartosz Golaszewski <brgl@bgdev.pl>,\n Andy Shevchenko <andriy.shevchenko@linux.intel.com>,\n Bartosz Golaszewski <brgl@kernel.org>", "Cc": "linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org,\n linux-kbuild@vger.kernel.org, platform-driver-x86@vger.kernel.org,\n linux-pci@vger.kernel.org, devicetree@vger.kernel.org,\n linux-arm-msm@vger.kernel.org, linux-bluetooth@vger.kernel.org,\n linux-pm@vger.kernel.org, Stephan Gerhold <stephan.gerhold@linaro.org>,\n Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,\n linux-acpi@vger.kernel.org,\n Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>,\n Hans de Goede <johannes.goede@oss.qualcomm.com>,\n Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>,\n Bartosz Golaszewski <brgl@kernel.org>", "X-Mailer": "b4 0.15.0", "X-Developer-Signature": "v=1; a=openpgp-sha256; l=6213;\n i=manivannan.sadhasivam@oss.qualcomm.com; h=from:subject:message-id;\n bh=d6b5tGqYUx6+z9gficky9a1VVFlPor5JwCfeMzYcQjg=;\n b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBpxOkIQ27nIdG+HSpuQkgQ+iXt5cDLBzdoizTmw\n u4CnZrALziJATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCacTpCAAKCRBVnxHm/pHO\n 9Si6B/4mpsKk3KIGc/++1wcwaummvgRQYCgAucKRk/JpZfipf3gQbNsYncxyyvH62TN7ssPFBmW\n RPwkHlYLgNjYo0CW0d3oW3zw1yCLiTnSpEIbuOoJTcGkvbbejj93wLXEYwIIYRFa4zIWrk4PHU/\n YqPMF4B6RRJHufdao7LXw7JQt6cewi/BaEu4Ilm5ceWuvHh8T728Le2EwhyiSOoRbKsxO1P5Zkq\n 7/FvP6onMFELML95XPnc62fQ2M1GCnx3YFFQkP+hExhqJdeOm4FIy7p0go26raenyfCSqv6cKsU\n 3HnNdYytwTmGEs1FQw2j3loeFf756dUvJN8EkEnTsf97/Pbo", "X-Developer-Key": "i=manivannan.sadhasivam@oss.qualcomm.com; a=openpgp;\n fpr=C668AEC3C3188E4C611465E7488550E901166008", "X-Endpoint-Received": "by B4 Relay for\n manivannan.sadhasivam@oss.qualcomm.com/default with auth_id=461", "X-Original-From": "Manivannan Sadhasivam\n <manivannan.sadhasivam@oss.qualcomm.com>", "Reply-To": "manivannan.sadhasivam@oss.qualcomm.com" }, "content": "Hi,\n\nThis series is the continuation of the series [1] that added the initial support\nfor the PCIe M.2 connectors. This series extends it by adding support for Key E\nconnectors. These connectors are used to connect the Wireless Connectivity\ndevices such as WiFi, BT, NFC and GNSS devices to the host machine over\ninterfaces such as PCIe/SDIO, USB/UART and NFC. This series adds support for\nconnectors that expose PCIe interface for WiFi and UART interface for BT. Other\ninterfaces are left for future improvements.\n\nSerdev device support for BT\n============================\n\nAdding support for the PCIe interface was mostly straightforward and a lot\nsimilar to the previous Key M connector. But adding UART interface has proved to\nbe tricky. This is mostly because of the fact UART is a non-discoverable bus,\nunlike PCIe which is discoverable. So this series relied on the PCI notifier to\ncreate the serdev device for UART/BT. This means the PCIe interface will be\nbrought up first and after the PCIe device enumeration, the serdev device will\nbe created by the pwrseq driver. This logic is necessary since the connector\ndriver and DT node don't describe the device, but just the connector. So to make\nthe connector interface Plug and Play, the connector driver uses the PCIe device\nID to identify the card and creates the serdev device. This logic could be\nextended in the future to support more M.2 cards. Even if the M.2 card uses SDIO\ninterface for connecting WLAN, a SDIO notifier could be added to create the\nserdev device.\n\nTesting\n=======\n\nThis series, together with the devicetree changes [2] was tested on the\nQualcomm X1e based Lenovo Thinkpad T14s Laptop which has the WCN7850 WLAN/BT\n1620 LGA card connected over PCIe and UART.\n\nMerge Strategy\n==============\n\nDue to the API dependency, both the serdev and pwrseq patches need to go through\na single tree, maybe through pwrseq tree. So the serdev patches need Ack from\nGreg. But Bluetooth patch can be merged separately.\n\nNOTE\n====\n\nThis series is based on bluetooth-next/master to resolve the conflict with the\nBluetooth patch. Other pathces should apply cleanly on top of v7.0-rc1.\n\n[1] https://lore.kernel.org/linux-pci/20260107-pci-m2-v5-0-8173d8a72641@oss.qualcomm.com\n[2] https://github.com/Mani-Sadhasivam/linux/commit/b50f8386900990eed3dce8d91c3b643fb0e8739d\n\nSigned-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>\n---\nChanges in v7:\n- Dropped the LGA binding change due to vendor prefix concern. This will be\n submitted later once I get clarity.\n- Fixed several issues in the cleanup path of the pwrseq-pci-m2 driver which\n includes adding the .remove() callback.\n- Rebased on top of bluetooth-next/master to resolve conflict with bluetooth\n patch.\n- Link to v6: https://lore.kernel.org/r/20260317-pci-m2-e-v6-0-9c898f108d3d@oss.qualcomm.com\n\nChanges in v6:\n- Added a check to bail out if the serdev device was already added during notifier.\n- Collected tags\n- Link to v5: https://lore.kernel.org/r/20260224-pci-m2-e-v5-0-dd9b9501d33c@oss.qualcomm.com\n\nChanges in v5:\n- Incorporated comments in the binding patch by using single endpoint per port,\n reordering port nodes, adding missing properties and using a complete example.\n- Incorporated comments in the pwrseq patch (nothing major)\n- Fixed the build issue in patch 2\n- Collected tags\n- Rebased on top of 7.0-rc1\n- Link to v4: https://lore.kernel.org/r/20260112-pci-m2-e-v4-0-eff84d2c6d26@oss.qualcomm.com\n\nChanges in v4:\n- Switched to dynamic OF node for serdev instead of swnode and dropped all\n swnode related patches\n- Link to v3: https://lore.kernel.org/r/20260110-pci-m2-e-v3-0-4faee7d0d5ae@oss.qualcomm.com\n\nChanges in v3:\n- Switched to swnode for the serdev device and dropped the custom\n serdev_device_id related patches\n- Added new swnode APIs to match the swnode with existing of_device_id\n- Incorporated comments in the bindings patch\n- Dropped the UIM interface from binding since it is not clear how it should get\n wired\n- Incorporated comments in the pwrseq driver patch\n- Splitted the pwrseq patch into two\n- Added the 1620 LGA compatible with Key E fallback based on Stephan's finding\n- Link to v2: https://lore.kernel.org/r/20251125-pci-m2-e-v2-0-32826de07cc5@oss.qualcomm.com\n\nChanges in v2:\n- Used '-' for GPIO names in the binding and removed led*-gpios properties\n- Described the endpoint nodes for port@0 and port@1 nodes\n- Added the OF graph port to the serial binding\n- Fixed the hci_qca driver to return err if devm_pwrseq_get() fails\n- Incorporated various review comments in pwrseq driver\n- Collected Ack\n- Link to v1: https://lore.kernel.org/r/20251112-pci-m2-e-v1-0-97413d6bf824@oss.qualcomm.com\n\n---\nManivannan Sadhasivam (8):\n serdev: Convert to_serdev_*() helpers to macros and use container_of_const()\n serdev: Add an API to find the serdev controller associated with the devicetree node\n serdev: Do not return -ENODEV from of_serdev_register_devices() if external connector is used\n dt-bindings: serial: Document the graph port\n dt-bindings: connector: Add PCIe M.2 Mechanical Key E connector\n Bluetooth: hci_qca: Add M.2 Bluetooth device support using pwrseq\n power: sequencing: pcie-m2: Add support for PCIe M.2 Key E connectors\n power: sequencing: pcie-m2: Create serdev device for WCN7850 bluetooth\n\n .../bindings/connector/pcie-m2-e-connector.yaml | 184 +++++++++++\n .../devicetree/bindings/serial/serial.yaml | 3 +\n MAINTAINERS | 1 +\n drivers/bluetooth/hci_qca.c | 9 +\n drivers/power/sequencing/Kconfig | 3 +-\n drivers/power/sequencing/pwrseq-pcie-m2.c | 346 ++++++++++++++++++++-\n drivers/tty/serdev/core.c | 28 +-\n include/linux/serdev.h | 24 +-\n 8 files changed, 570 insertions(+), 28 deletions(-)\n---\nbase-commit: 559f264e403e4d58d56a17595c60a1de011c5e20\nchange-id: 20251112-pci-m2-e-94695ac9d657\n\nBest regards,\n-- \nManivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>" }