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{ "id": 2148234, "url": "http://patchwork.ozlabs.org/api/covers/2148234/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/cover/20251010134424.3835757-1-anshuld@ti.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20251010134424.3835757-1-anshuld@ti.com>", "list_archive_url": null, "date": "2025-10-10T13:44:06", "name": "[v10,00/11] Add support for dynamic MMU configuration", "submitter": { "id": 90324, "url": "http://patchwork.ozlabs.org/api/people/90324/?format=api", "name": "Anshul Dalal", "email": "anshuld@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/cover/20251010134424.3835757-1-anshuld@ti.com/mbox/", "series": [ { "id": 477111, "url": "http://patchwork.ozlabs.org/api/series/477111/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=477111", "date": "2025-10-10T13:44:06", "name": "Add support for dynamic MMU configuration", "version": 10, "mbox": "http://patchwork.ozlabs.org/series/477111/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/2148234/comments/", "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256\n header.s=ti-com-17Q1 header.b=hfLp+Aq9;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; 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Fri, 10 Oct 2025 08:44:31 -0500", "from localhost (dhcp-172-24-233-105.dhcp.ti.com [172.24.233.105])\n by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 59ADiTBU1721918;\n Fri, 10 Oct 2025 08:44:30 -0500" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.5 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,\n DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,\n RCVD_IN_DNSWL_BLOCKED,RCVD_IN_VALIDITY_CERTIFIED_BLOCKED,\n RCVD_IN_VALIDITY_RPBL_BLOCKED,SPF_HELO_PASS,SPF_PASS autolearn=ham\n autolearn_force=no version=3.4.2", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com;\n s=ti-com-17Q1; t=1760103871;\n bh=UCchYoTovAxCjqac01Foq3DU8qXP46QL2O6w5Jf1qCI=;\n h=From:To:CC:Subject:Date;\n b=hfLp+Aq9KItYEm9AvaRanffeU5hkpZAdxVAXdkFzxumMueQve6Rpxdns3ef4XAXdf\n Va/52iUjw7sadAyfglOLHnVLWLZCVHisxII+/l5/HrPNil3Lw4wgU1KiU/ulu9SgY0\n xdTuxM+86KDHEToaCEwCQJUMrRmz/be+kqPU7zM8=", "From": "Anshul Dalal <anshuld@ti.com>", "To": "<u-boot@lists.denx.de>", "CC": "Anshul Dalal <anshuld@ti.com>, <d-gole@ti.com>, <b-padhi@ti.com>,\n <vigneshr@ti.com>, <trini@konsulko.com>, <nm@ti.com>,\n <robertcnelson@gmail.com>, <w.egorov@phytec.de>,\n <francesco.dolcini@toradex.com>, <ggiordano@phytec.com>,\n <m-chawdhry@ti.com>, <afd@ti.com>, <bb@ti.com>, <u-kumar1@ti.com>,\n <devarsht@ti.com>, <ilias.apalodimas@linaro.org>, <xypron.glpk@gmx.de>", "Subject": "[PATCH v10 00/11] Add support for dynamic MMU configuration", "Date": "Fri, 10 Oct 2025 19:14:06 +0530", "Message-ID": "<20251010134424.3835757-1-anshuld@ti.com>", "X-Mailer": "git-send-email 2.51.0", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-C2ProcessedOrg": "333ef613-75bf-4e12-a4b1-8e3623f5dcea", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "Hi all,\n\nIn U-Boot, TI only provides a single memory map for all k3 platforms, this\ndoes not scale for devices where atf and optee lie outside the range 0x80000000\n- 0x80080000 and 0x9e780000 - 0xa0000000 respectively.\n\nThere are also issues for devices with < 2GiB of memory (eg am62SiP with 512MiB\nof RAM) as the maximum size for the first DRAM bank is hardcoded to 2GiB in the\ncurrent memory map. Furthermore the second DRAM bank is mapped even for devices\nthat only have a single bank.\n\nTherefore this patch set adds the required functionality to create the MMU table\nat runtime based on the device-tree.\n\nThe patch set has been build tested on all effected platforms but boot-tested\nonly on TI's K3 EVMs, the beagleplay and phytec's phycore-am6* platforms.\n\nThe following effected boards have not been boot tested:\n - verdin-am62\n - iot2050\n\nBest Wishes,\nAnshul\n---\nChanges in v10:\n - Rename mem_map_fix_dram_banks to mem_map_from_dram_banks\n - Use log_err instead of printf\n - Add check for \"no-map\" in the reserved-memory node before unmapping it\nv9: https://lore.kernel.org/u-boot/20251010055340.2574743-1-anshuld@ti.com/\n\nChanges in v9:\n - Pick R-by tags\n - Change error messages from debug to printf\nv8: https://lore.kernel.org/u-boot/20251006082852.4008937-1-anshuld@ti.com/\n\nChanges in v8:\n - Reserve extra space for page table entries for performing fixups\nv7: https://lore.kernel.org/u-boot/20250912121618.1074054-1-anshuld@ti.com/\n\nChanges in v7:\n - Pick up R-by and Tested-by tags\n - Use nobreak API for unmapping MMU region\n - Better error messages and minor refactor\nv6: https://lore.kernel.org/u-boot/20250905081902.489345-1-anshuld@ti.com/\n\nChanges in v6:\n - Make use of generic MMU APIs\n - Extend core U-Boot functionality by adding mmu_unmap_reserved_mem and\n mem_map_fix_dram_banks\n - Keep same memory maps for SPL and U-Boot proper\n - Add fdt fixups from SPL stage for reserved memory nodes\nv5: https://lore.kernel.org/u-boot/20250703133533.104758-1-anshuld@ti.com/\n\nChanges in v5:\n - Don't create carveouts for every reserved-memory node\n - Only create carveouts for ATF/OP-TEE\n - Expand the call to k3_mem_map_init to vendor boards as well\n - Map area for framebuffer for CONFIG_VIDEO=y platforms\nv4: https://lore.kernel.org/u-boot/20250618124210.1936140-1-anshuld@ti.com/\n\nChanges for v4:\n - Add call to k3_mem_map_init for beagleplay\n - Mark reserved regions as non-cacheable\n - More debug logs\nv3: https://lore.kernel.org/u-boot/20250617135844.2873701-1-anshuld@ti.com/\n\nChanges for v3:\n - Remove unused memory regions in SPL's map\n - Add runtime addition of MMU entry for the framebuffer in SPL\n - Refactor k3_mem_map_init to use standard u-boot APIs\n - Unmap reserved-memory regions instead of keeping them uncached\nv2: https://lore.kernel.org/u-boot/20250610160833.1705534-1-anshuld@ti.com/\n\nChanges in v2:\n- Removed dependency to:\n https://lore.kernel.org/u-boot/20250522150941.563959-1-anshuld@ti.com/\nv1: https://lore.kernel.org/u-boot/20250602120054.1466951-1-anshuld@ti.com/\n---\nAnshul Dalal (11):\n mach-k3: use minimal memory map for all K3\n mach-k3: use custom enable_cache\n arm: armv8: mmu: export mmu_setup\n arm: armv8: invalidate dcache entries on dcache_enable\n arm: armv8: mmu: add mem_map_from_dram_banks\n mach-k3: map all banks using mem_map_from_dram_banks\n arm: armv8: mmu: add mmu_unmap_reserved_mem\n spl: split spl_board_fixups to arch/board specific\n mach-k3: add reserved memory fixups for next boot stage\n mach-k3: add carveouts for TFA and optee\n arm: mach-k3: reserve space for page table entries\n\n arch/arm/cpu/armv7m/cpu.c | 2 +-\n arch/arm/cpu/armv8/cache_v8.c | 61 ++++++++++++++++++++--\n arch/arm/include/asm/armv8/mmu.h | 24 +++++++++\n arch/arm/mach-k3/arm64/arm64-mmu.c | 40 ++++++--------\n arch/arm/mach-k3/common.c | 55 +++++++++++++++++++\n arch/arm/mach-k3/include/mach/k3-ddr.h | 6 +++\n arch/arm/mach-rockchip/spl-boot-order.c | 2 +-\n arch/arm/mach-socfpga/spl_soc64.c | 2 +-\n board/beagle/beagley-ai/beagley-ai.c | 2 +-\n board/dhelectronics/dh_stm32mp1/board.c | 2 +-\n board/phytec/phycore_am62x/phycore-am62x.c | 2 +-\n board/phytec/phycore_am64x/phycore-am64x.c | 2 +-\n board/renesas/sparrowhawk/sparrowhawk.c | 2 +-\n board/starfive/visionfive2/spl.c | 2 +-\n board/ti/am62ax/evm.c | 2 +-\n board/ti/am62px/evm.c | 2 +-\n board/ti/am62x/evm.c | 2 +-\n board/ti/am64x/evm.c | 2 +-\n board/ti/j721e/evm.c | 2 +-\n board/ti/j721s2/evm.c | 2 +-\n board/ti/j722s/evm.c | 2 +-\n board/ti/j784s4/evm.c | 2 +-\n common/spl/spl.c | 12 +++--\n include/spl.h | 12 +++--\n 24 files changed, 194 insertions(+), 50 deletions(-)" }