Cover Letter Detail
Show a cover letter.
GET /api/covers/1768890/?format=api
{ "id": 1768890, "url": "http://patchwork.ozlabs.org/api/covers/1768890/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/cover/1681468167-11689-1-git-send-email-quic_srichara@quicinc.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1681468167-11689-1-git-send-email-quic_srichara@quicinc.com>", "list_archive_url": null, "date": "2023-04-14T10:29:18", "name": "[V3,0/9] Add minimal boot support for IPQ5018", "submitter": { "id": 84297, "url": "http://patchwork.ozlabs.org/api/people/84297/?format=api", "name": "Sricharan Ramabadhran", "email": "quic_srichara@quicinc.com" }, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/cover/1681468167-11689-1-git-send-email-quic_srichara@quicinc.com/mbox/", "series": [ { "id": 350830, "url": "http://patchwork.ozlabs.org/api/series/350830/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=350830", "date": "2023-04-14T10:29:18", "name": "Add minimal boot support for IPQ5018", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/350830/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/1768890/comments/", "headers": { "Return-Path": "<linux-gpio-owner@vger.kernel.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2620:137:e000::1:20; helo=out1.vger.email;\n envelope-from=linux-gpio-owner@vger.kernel.org; receiver=<UNKNOWN>)", "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=quicinc.com header.i=@quicinc.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=WenTUlq+;\n\tdkim-atps=neutral" ], "Received": [ "from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20])\n\tby legolas.ozlabs.org (Postfix) with ESMTP id 4PyXl21l3fz1yZr\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 14 Apr 2023 20:30:06 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n id S229941AbjDNKaF (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n Fri, 14 Apr 2023 06:30:05 -0400", "from lindbergh.monkeyblade.net ([23.128.96.19]:35280 \"EHLO\n lindbergh.monkeyblade.net\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n with ESMTP id S229469AbjDNKaE (ORCPT\n <rfc822;linux-gpio@vger.kernel.org>); Fri, 14 Apr 2023 06:30:04 -0400", "from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com\n [205.220.180.131])\n by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 148C310FC;\n Fri, 14 Apr 2023 03:30:02 -0700 (PDT)", "from pps.filterd (m0279868.ppops.net [127.0.0.1])\n by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 33EAB2YL018086;\n Fri, 14 Apr 2023 10:29:50 GMT", "from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com\n [129.46.96.20])\n by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3py1kx0g17-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256\n verify=NOT);\n Fri, 14 Apr 2023 10:29:50 +0000", "from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com\n [10.47.97.35])\n by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id\n 33EATmWT020186\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256\n verify=NOT);\n Fri, 14 Apr 2023 10:29:48 GMT", "from srichara-linux.qualcomm.com (10.80.80.8) by\n nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.2.986.42; Fri, 14 Apr 2023 03:29:42 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com;\n h=from : to : subject\n : date : message-id : mime-version : content-type; s=qcppdkim1;\n bh=MdfQFKES6jw8fw8QjG5eTZNIKiSSWxy6UfpOJBaGlUg=;\n b=WenTUlq+oQ7Cw+W1cTNZx8EdCE6jFISY3mJd7csTI2BEzs3NTM6dIipMTle7ohOdf1b6\n yaROLqqGsKTerXIWorirmrwE9AaRs6xMBtwZKnvgwu1EmBT/lKzeacWUR58J8xOC4M9E\n W6KQVRMe9d5kme8FlBSWi7kM5y3QXMF1R5kP6UB3/WPIYF/O43YSIivGlxpkXVE7qnn/\n xWAcJ8ljM1Uni2zNUduL2EMLkIBymGNwsDXlsbJm048qM8uF425VNs7miE278cbwcW2B\n w/rAZqhl5SlrO0RmxZxKiKDX9PQFkXVIm2/0L0oVfDKyBUffkO7mlfFPwo9Ci8D+1zLa Kw==", "From": "Sricharan Ramabadhran <quic_srichara@quicinc.com>", "To": "<agross@kernel.org>, <andersson@kernel.org>,\n <konrad.dybcio@linaro.org>, <robh+dt@kernel.org>,\n <krzysztof.kozlowski+dt@linaro.org>, <mturquette@baylibre.com>,\n <sboyd@kernel.org>, <ulf.hansson@linaro.org>,\n <linus.walleij@linaro.org>, <catalin.marinas@arm.com>,\n <will@kernel.org>, <p.zabel@pengutronix.de>,\n <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,\n <linux-kernel@vger.kernel.org>, <linux-mmc@vger.kernel.org>,\n <linux-gpio@vger.kernel.org>,\n <linux-arm-kernel@lists.infradead.org>, <quic_srichara@quicinc.com>", "Subject": "[PATCH V3 0/9] Add minimal boot support for IPQ5018", "Date": "Fri, 14 Apr 2023 15:59:18 +0530", "Message-ID": "<1681468167-11689-1-git-send-email-quic_srichara@quicinc.com>", "X-Mailer": "git-send-email 2.7.4", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.80.80.8]", "X-ClientProxiedBy": "nasanex01a.na.qualcomm.com (10.52.223.231) To\n nalasex01c.na.qualcomm.com (10.47.97.35)", "X-QCInternal": "smtphost", "X-Proofpoint-Virus-Version": [ "vendor=nai engine=6200 definitions=5800\n signatures=585085", "vendor=baseguard\n engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22\n definitions=2023-04-14_04,2023-04-14_01,2023-02-09_01" ], "X-Proofpoint-ORIG-GUID": "wSqlkZolsMg1JhXZB8NktOw5XPcrfxL0", "X-Proofpoint-GUID": "wSqlkZolsMg1JhXZB8NktOw5XPcrfxL0", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n lowpriorityscore=0\n bulkscore=0 priorityscore=1501 adultscore=0 phishscore=0 clxscore=1011\n impostorscore=0 mlxlogscore=797 spamscore=0 suspectscore=0 mlxscore=0\n malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1\n engine=8.12.0-2303200000 definitions=main-2304140094", "X-Spam-Status": "No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,\n DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS,\n T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6", "X-Spam-Checker-Version": "SpamAssassin 3.4.6 (2021-04-09) on\n lindbergh.monkeyblade.net", "Precedence": "bulk", "List-ID": "<linux-gpio.vger.kernel.org>", "X-Mailing-List": "linux-gpio@vger.kernel.org" }, "content": "The IPQ5018 is Qualcomm's 802.11ax SoC for Routers,\nGateways and Access Points.\n\nThis series adds minimal board boot support for ipq5018-mp03.1-c2 board.\n\n[v3]\n\tFixed all comments for clocks, schema fixes\n Picked up Reviewed-by from Bjorn for pinctrl driver\n\n[v2]\n\tFixed all comments and rebased for TOT.\n\nSricharan Ramabadhran (9):\n dt-bindings: arm64: Add IPQ5018 clock and reset\n clk: qcom: Add Global Clock controller (GCC) driver for IPQ5018\n dt-bindings: pinctrl: qcom: Add support for ipq5018\n pinctrl: qcom: Add IPQ5018 pinctrl driver\n dt-bindings: qcom: Add ipq5018 bindings\n dt-bindings: firmware: document IPQ5018 SCM\n dt-bindings: mmc: sdhci-msm: Document the IPQ5018 compatible\n arm64: dts: Add ipq5018 SoC and rdp432-c2 board support\n arm64: defconfig: Enable IPQ5018 SoC base configs\n\n Documentation/devicetree/bindings/arm/qcom.yaml | 7 +\n .../bindings/clock/qcom,ipq5018-gcc.yaml | 63 +\n .../devicetree/bindings/firmware/qcom,scm.yaml | 1 +\n .../devicetree/bindings/mmc/sdhci-msm.yaml | 1 +\n .../bindings/pinctrl/qcom,ipq5018-tlmm.yaml | 129 +\n arch/arm64/boot/dts/qcom/Makefile | 1 +\n arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts | 72 +\n arch/arm64/boot/dts/qcom/ipq5018.dtsi | 248 ++\n arch/arm64/configs/defconfig | 3 +\n drivers/clk/qcom/Kconfig | 7 +\n drivers/clk/qcom/Makefile | 1 +\n drivers/clk/qcom/gcc-ipq5018.c | 3731 ++++++++++++++++++++\n drivers/pinctrl/qcom/Kconfig | 10 +\n drivers/pinctrl/qcom/Makefile | 1 +\n drivers/pinctrl/qcom/pinctrl-ipq5018.c | 791 +++++\n include/dt-bindings/clock/qcom,gcc-ipq5018.h | 183 +\n include/dt-bindings/reset/qcom,gcc-ipq5018.h | 122 +\n 17 files changed, 5371 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/clock/qcom,ipq5018-gcc.yaml\n create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,ipq5018-tlmm.yaml\n create mode 100644 arch/arm64/boot/dts/qcom/ipq5018-rdp432-c2.dts\n create mode 100644 arch/arm64/boot/dts/qcom/ipq5018.dtsi\n create mode 100644 drivers/clk/qcom/gcc-ipq5018.c\n create mode 100644 drivers/pinctrl/qcom/pinctrl-ipq5018.c\n create mode 100644 include/dt-bindings/clock/qcom,gcc-ipq5018.h\n create mode 100644 include/dt-bindings/reset/qcom,gcc-ipq5018.h" }