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{ "id": 1644787, "url": "http://patchwork.ozlabs.org/api/covers/1644787/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/cover/20220617104726.158688-1-pan@semihalf.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20220617104726.158688-1-pan@semihalf.com>", "list_archive_url": null, "date": "2022-06-17T10:47:15", "name": "[v3,00/11] Add Chameleon v3 support", "submitter": { "id": 82560, "url": "http://patchwork.ozlabs.org/api/people/82560/?format=api", "name": "Paweł Anikiel", "email": "pan@semihalf.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/cover/20220617104726.158688-1-pan@semihalf.com/mbox/", "series": [ { "id": 305278, "url": "http://patchwork.ozlabs.org/api/series/305278/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=305278", "date": "2022-06-17T10:47:15", "name": "Add Chameleon v3 support", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/305278/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/1644787/comments/", "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "bilbo.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=semihalf.com header.i=@semihalf.com header.a=rsa-sha256\n header.s=google header.b=J7gUzB5O;\n\tdkim-atps=neutral", "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=<UNKNOWN>)", "phobos.denx.de;\n dmarc=none (p=none dis=none) header.from=semihalf.com", "phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de", "phobos.denx.de;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=semihalf.com header.i=@semihalf.com\n header.b=\"J7gUzB5O\";\n\tdkim-atps=neutral", "phobos.denx.de;\n dmarc=none (p=none dis=none) header.from=semihalf.com", "phobos.denx.de;\n spf=pass smtp.mailfrom=pan@semihalf.com" ], "Received": [ "from phobos.denx.de (phobos.denx.de [85.214.62.61])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature RSA-PSS (2048 bits))\n\t(No client certificate requested)\n\tby bilbo.ozlabs.org (Postfix) with ESMTPS id 4LPbNV0dJjz9s5V\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 17 Jun 2022 20:47:53 +1000 (AEST)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id E90C384395;\n\tFri, 17 Jun 2022 12:47:47 +0200 (CEST)", "by phobos.denx.de (Postfix, from userid 109)\n id 9675D843EF; Fri, 17 Jun 2022 12:47:46 +0200 (CEST)", "from mail-lj1-x22a.google.com (mail-lj1-x22a.google.com\n [IPv6:2a00:1450:4864:20::22a])\n (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id F2354843C3\n for <u-boot@lists.denx.de>; Fri, 17 Jun 2022 12:47:42 +0200 (CEST)", "by mail-lj1-x22a.google.com with SMTP id w2so962910lji.5\n for <u-boot@lists.denx.de>; Fri, 17 Jun 2022 03:47:42 -0700 (PDT)", "from panikiel.roam.corp.google.com\n (staticline-31-182-204-250.toya.net.pl. [31.182.204.250])\n by smtp.gmail.com with ESMTPSA id\n a17-20020ac25e71000000b00479342519e5sm592379lfr.210.2022.06.17.03.47.40\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Fri, 17 Jun 2022 03:47:41 -0700 (PDT)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,\n DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS,\n T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no\n version=3.4.2", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=semihalf.com;\n s=google;\n h=from:to:cc:subject:date:message-id:mime-version\n :content-transfer-encoding;\n bh=JcZVTZgXd6vbEu9eTjHo2vz/ahtGoJvZF00z7RfDveE=;\n b=J7gUzB5O0YKjXnX0p5+t7dIwyyDuETBGu6RCEvxzAKq7506KuJTPVsAiz3mjHdahxJ\n hB9VVvLfELICwbrxaOHV6HKV59M+SkdXICeIrE44iZ4eyMS/0PltiIcV5uVWTEJi0WYA\n PK72buR7taNsVLlR4L9gUNRZWPAdG2S/0mpqbrhjLgl/2xuT00DnsA1dHk4Fb37BqOMQ\n Qk9z2GL74MoGShU3ZfgbjfY7JFaGhIv03GxpCYClibgQxdOPRV0tMdkScAcCYJ1BV9EC\n 8oRn8BEvUMm4YPC0Amjxo0YqvgKo2cp4zZZh2qmwAyLbuVlCSmyrbHzd9rga0LWny223\n 8p4g==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20210112;\n h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version\n :content-transfer-encoding;\n bh=JcZVTZgXd6vbEu9eTjHo2vz/ahtGoJvZF00z7RfDveE=;\n b=dSaxDhPPEVktASE9/90r4FXtofTrWfxjErsavCrOXHv+X6GEdUqTbMg3VFxlyxn1om\n 901dio16VIpRWd28JGRA6L0qe4Qfjbiaqiho0v/yp/ZSOQ8eGt9iV6ALBuJmZSkSLZ5f\n 9xwN7Hf64y8ut0Q8hr2ShW+vsQ9QnTFQaubiB/fxRiCx4MaSi9mOaC4HSOC6C+c8bvOw\n jFL3XpjB63mzg3jZO4i+Wukp3cijxLQsrnh2IMUmuIxa7iUQWHjnryRN7b8MropCrthb\n EhhebWyimzPirtkQf1un17jPnAAqmVzhVib/IyR3GV7fK9yPIv0OhWfN9QJKBkN9/28b\n HDPQ==", "X-Gm-Message-State": "AJIora8Zwh0g5fzW3fiIdQuFdTpFXgrAZEhe4hHce+Zisxf6NfaSj/Xq\n Y2QLRKOkaTUSxrWh9EXauObAwg==", "X-Google-Smtp-Source": "\n AGRyM1vF/6OezPNNpBDO1Z95TtoTIM2Sy35xUciRCuNKKUeJoZon7zX1I2vm4rRtBBhQ1AXtknDpOQ==", "X-Received": "by 2002:a05:651c:546:b0:259:9f4:f5eb with SMTP id\n q6-20020a05651c054600b0025909f4f5ebmr4719411ljp.452.1655462862287;\n Fri, 17 Jun 2022 03:47:42 -0700 (PDT)", "From": "=?utf-8?q?Pawe=C5=82_Anikiel?= <pan@semihalf.com>", "To": "marex@denx.de, simon.k.r.goldschmidt@gmail.com, tien.fong.chee@intel.com,\n michal.simek@xilinx.com", "Cc": "u-boot@lists.denx.de, sjg@chromium.org, festevam@denx.de,\n jagan@amarulasolutions.com, andre.przywara@arm.com, narmstrong@baylibre.com,\n pbrobinson@gmail.com, tharvey@gateworks.com, paul.liu@linaro.org,\n christianshewitt@gmail.com, adrian.fiergolski@fastree3d.com,\n marek.behun@nic.cz, wd@denx.de, elly.siew.chin.lim@intel.com,\n upstream@semihalf.com, amstan@chromium.org,\n =?utf-8?q?Pawe=C5=82_Anikiel?= <pan@semihalf.com>", "Subject": "[PATCH v3 00/11] Add Chameleon v3 support", "Date": "Fri, 17 Jun 2022 12:47:15 +0200", "Message-Id": "<20220617104726.158688-1-pan@semihalf.com>", "X-Mailer": "git-send-email 2.36.1.476.g0c4daa206d-goog", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.5 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "The Google Chameleon v3 is a board made for testing both video and audio\ninterfaces of external devices. It has a connector compatible with the\nMercury+ AA1 module, which itself contains an Arria 10 SoCFPGA. The AA1\nmodule comes in a few different configurations, the Chameleon V3 supports\nME-AA1-270-3E4-D11 and ME-AA1-480-2I3-D12E.\n\nThis patchset adds support for the Chameleon v3 (both versions), as well\nas some bugfixes and optimizations, mostly in Arria 10 code.\n\nV3:\n Move clock manager changes out of socfpga-generic code (aarch64 compilation issue)\n\nV2:\n Adjust devicetrees so that they work both in u-boot and linux\n Put u-boot-specific parts of devicetrees into *-u-boot.dtsi files\n Minor changes in Kconfig, defconfig, and config.h\n\nPaweł Anikiel (11):\n arm: dts: Add Mercury+ AA1 devicetrees\n arm: dts: Add Chameleonv3 handoff headers\n arm: dts: Add Chameleonv3 devicetrees\n board: Add Chameleonv3 board dir\n config: Add Chameleonv3 config\n misc: atsha204a: Increase wake delay by tWHI\n sysreset: socfpga: Use parent device for reading base address\n socfpga: arria10: Replace delays with busy waiting in cm_full_cfg\n socfpga: arria10: Improve bitstream loading speed\n socfpga: arria10: Wait for fifo empty after writing bitstream\n socfpga: arria10: Allow dcache_enable before relocation\n\n arch/arm/dts/Makefile | 2 +\n arch/arm/dts/socfpga_arria10_chameleonv3.dts | 90 ++++++\n ...fpga_arria10_chameleonv3_270_3-u-boot.dtsi | 8 +\n .../dts/socfpga_arria10_chameleonv3_270_3.dts | 5 +\n ...ocfpga_arria10_chameleonv3_270_3_handoff.h | 305 ++++++++++++++++++\n ...fpga_arria10_chameleonv3_480_2-u-boot.dtsi | 8 +\n .../dts/socfpga_arria10_chameleonv3_480_2.dts | 5 +\n ...ocfpga_arria10_chameleonv3_480_2_handoff.h | 305 ++++++++++++++++++\n .../socfpga_arria10_mercury_aa1-u-boot.dtsi | 54 ++++\n arch/arm/dts/socfpga_arria10_mercury_aa1.dtsi | 72 +++++\n arch/arm/mach-socfpga/Kconfig | 7 +\n arch/arm/mach-socfpga/clock_manager_arria10.c | 31 +-\n arch/arm/mach-socfpga/misc_arria10.c | 26 ++\n board/google/chameleonv3/Makefile | 5 +\n board/google/chameleonv3/board.c | 27 ++\n board/google/chameleonv3/fpga.its | 28 ++\n board/google/chameleonv3/fpga_early_io.its | 35 ++\n board/google/chameleonv3/mercury_aa1.c | 43 +++\n board/google/chameleonv3/mercury_aa1.h | 12 +\n configs/socfpga_chameleonv3_defconfig | 29 ++\n drivers/fpga/socfpga_arria10.c | 28 +-\n drivers/misc/atsha204a-i2c.c | 5 +-\n drivers/sysreset/sysreset_socfpga.c | 2 +-\n include/configs/socfpga_chameleonv3.h | 44 +++\n 24 files changed, 1162 insertions(+), 14 deletions(-)\n create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3.dts\n create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi\n create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts\n create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3_270_3_handoff.h\n create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3_480_2-u-boot.dtsi\n create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts\n create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3_480_2_handoff.h\n create mode 100644 arch/arm/dts/socfpga_arria10_mercury_aa1-u-boot.dtsi\n create mode 100644 arch/arm/dts/socfpga_arria10_mercury_aa1.dtsi\n create mode 100644 board/google/chameleonv3/Makefile\n create mode 100644 board/google/chameleonv3/board.c\n create mode 100644 board/google/chameleonv3/fpga.its\n create mode 100644 board/google/chameleonv3/fpga_early_io.its\n create mode 100644 board/google/chameleonv3/mercury_aa1.c\n create mode 100644 board/google/chameleonv3/mercury_aa1.h\n create mode 100644 configs/socfpga_chameleonv3_defconfig\n create mode 100644 include/configs/socfpga_chameleonv3.h" }