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{ "id": 1641664, "url": "http://patchwork.ozlabs.org/api/covers/1641664/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-ide/cover/20220610081801.11854-1-Sergey.Semin@baikalelectronics.ru/", "project": { "id": 13, "url": "http://patchwork.ozlabs.org/api/projects/13/?format=api", "name": "Linux IDE development", "link_name": "linux-ide", "list_id": "linux-ide.vger.kernel.org", "list_email": "linux-ide@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20220610081801.11854-1-Sergey.Semin@baikalelectronics.ru>", "list_archive_url": null, "date": "2022-06-10T08:17:38", "name": "[v4,00/23] ata: ahci: Add DWC/Baikal-T1 AHCI SATA support", "submitter": { "id": 78624, "url": "http://patchwork.ozlabs.org/api/people/78624/?format=api", "name": "Serge Semin", "email": "Sergey.Semin@baikalelectronics.ru" }, "mbox": "http://patchwork.ozlabs.org/project/linux-ide/cover/20220610081801.11854-1-Sergey.Semin@baikalelectronics.ru/mbox/", "series": [ { "id": 304159, "url": "http://patchwork.ozlabs.org/api/series/304159/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-ide/list/?series=304159", "date": "2022-06-10T08:17:42", "name": "ata: ahci: Add DWC/Baikal-T1 AHCI SATA support", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/304159/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/1641664/comments/", "headers": { "Return-Path": "<linux-ide-owner@vger.kernel.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "bilbo.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=baikalelectronics.ru header.i=@baikalelectronics.ru\n header.a=rsa-sha256 header.s=mail header.b=pH8qL8sY;\n\tdkim-atps=neutral", "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2620:137:e000::1:20; helo=out1.vger.email;\n envelope-from=linux-ide-owner@vger.kernel.org; receiver=<UNKNOWN>)" ], "Received": [ "from out1.vger.email (out1.vger.email [IPv6:2620:137:e000::1:20])\n\tby bilbo.ozlabs.org (Postfix) with ESMTP id 4LKDPl3jQKz9s09\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 10 Jun 2022 18:18:51 +1000 (AEST)", "(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n id S1347378AbiFJISt (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n Fri, 10 Jun 2022 04:18:49 -0400", "from lindbergh.monkeyblade.net ([23.128.96.19]:58196 \"EHLO\n lindbergh.monkeyblade.net\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n with ESMTP id S1347333AbiFJISJ (ORCPT\n <rfc822;linux-ide@vger.kernel.org>); Fri, 10 Jun 2022 04:18:09 -0400", "from mail.baikalelectronics.com (mail.baikalelectronics.com\n [87.245.175.230])\n by lindbergh.monkeyblade.net (Postfix) with ESMTP id E4D26232D82;\n Fri, 10 Jun 2022 01:18:05 -0700 (PDT)", "from mail (mail.baikal.int [192.168.51.25])\n by mail.baikalelectronics.com (Postfix) with ESMTP id D172D16A0;\n Fri, 10 Jun 2022 11:18:55 +0300 (MSK)", "from localhost (192.168.53.207) by mail (192.168.51.25) with\n Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 10 Jun 2022 11:18:03 +0300" ], "DKIM-Filter": "OpenDKIM Filter v2.11.0 mail.baikalelectronics.com D172D16A0", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=baikalelectronics.ru; s=mail; t=1654849136;\n bh=cHtG9EFRPdD/BzaSFez9YUbDZB82LOe7BzHViJs3JxE=;\n h=From:To:CC:Subject:Date:From;\n b=pH8qL8sY9m2ku7RJV77T+HQgJGfomPvhG2i45lEgcnMQ2+4sTSpLCbz7hGREEsJIf\n 7fsvm1btm1qCPfzx8/CcKJ8N9VH3L4J2jjVpq522nyxiTYmdYrlLlOKjM5/r8Fhu43\n E3Bs4lrzIeRw6Wtz2r7v6W/4LXGus8kxmLLFHP/Y=", "From": "Serge Semin <Sergey.Semin@baikalelectronics.ru>", "To": "Damien Le Moal <damien.lemoal@opensource.wdc.com>,\n Hans de Goede <hdegoede@redhat.com>,\n Jens Axboe <axboe@kernel.dk>, Hannes Reinecke <hare@suse.de>", "CC": "Serge Semin <Sergey.Semin@baikalelectronics.ru>,\n Serge Semin <fancer.lancer@gmail.com>,\n Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>,\n Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>,\n Rob Herring <robh+dt@kernel.org>, <linux-ide@vger.kernel.org>,\n <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>", "Subject": "[PATCH v4 00/23] ata: ahci: Add DWC/Baikal-T1 AHCI SATA support", "Date": "Fri, 10 Jun 2022 11:17:38 +0300", "Message-ID": "<20220610081801.11854-1-Sergey.Semin@baikalelectronics.ru>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-ClientProxiedBy": "MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25)", "X-Spam-Status": "No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,\n DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS,\n T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no\n version=3.4.6", "X-Spam-Checker-Version": "SpamAssassin 3.4.6 (2021-04-09) on\n lindbergh.monkeyblade.net", "Precedence": "bulk", "List-ID": "<linux-ide.vger.kernel.org>", "X-Mailing-List": "linux-ide@vger.kernel.org" }, "content": "The main goal of this patchset was to add Baikal-T1 AHCI SATA specifics\nsupport into the kernel AHCI subsystem. On the way of doing that we\nfigured out that mainly these specifics are actually DWC AHCI SATA\ncontroller features, but still there were some Baikal-T1 SoC platform\npeculiarities which we had to take into account. So the patchset\nintroduces two AHCI SATA controllers support and one AHCI SATA driver\nwith a series of preparation, optimization and cleanup patches.\n\nThe series starts used to start with converting the legacy AHCI SATA\ncontrollers text-based DT-bindings to the DT-schema. But turned out that\nhas already been done in kernel v5.17. So instead we suggest to improve\nthe bindings usability by splitting up the AHCI DT bindings into two\nschemas: one common AHCI SATA controller yaml-file, which can be reused by\nany AHCI-compatible controller utilizing the kernel AHCI library\nfunctions, and DT-bindings for the generic AHCI SATA devices indicated by\nthe \"generic-ahci\" compatible string and implemented in the\nahci_platform.c driver. Note after doing that we had to fix the\nsata-common.yaml file SATA port IDs constraint.\n\nThen a series of generic preparations-cleanups goes. First of all it\nconcerns the device-managed methods usage in the framework of the CSR\nspace remapping and the clocks requesting and enabling. Note since the\nclocks handlers are requested and kept in the generic AHCI library it\nseemed a good idea to add an AHCI-platform generic method to find and get\na particular clock handler from the pool of the requested ones. It was\nused later in the series in the DWC/Baikal-T1-specific code. Secondly we\nsuggested to at least sanity check the number of SATA ports DT-sub-nodes\nbefore using it further. Thirdly the ports-implemented DT-property\nparsing was moved from the AHCI platform-driver to the AHCI-library so to\nbe used by the non-generic AHCI drivers if required (DT-schema is\naccordingly fixed too). Finally due to having the shared-reset control\nsupport we had to add a new AHCI-resource getter flag -\nAHCI_PLATFORM_RST_TRIGGER, which indicated using a trigger-like reset\ncontrol. For such platforms the controller reset will be performed by\nmeans of the reset_control_reset() and reset_control_rearm() methods.\nAHCI-library reset functions encapsulating the way the reset procedure is\nperformed have been also added.\n\nAfter that goes a patches series with the platform-specific\nAHCI-capabilities initialization. The suggested functionality will be\nuseful for the platforms with no BIOS, comprehensive bootloader/firmware\ninstalled. In that case the AHCI-related platform-specifics like drive\nstaggered spin-up, mechanical presence switch attached or FIS-based\nswitching capability usage, etc will be left uninitialized with no generic\nway to be indicated as available if required. We suggested to use the AHCI\ndevice tree node and its ports sub-nodes for that. AHCI-platform library\nwill be responsible fo the corresponding DT-properties parsing and\npre-initialization of the internal capability registers cache, which will\nbe then flashed back to the corresponding CSR after HBA reset. Thus a\nsupposed to be firmware-work will be done by means of the AHCI-library and\nthe DT-data. A set of the preparations/cleanups required to be done before\nintroducing the feature. First the DT-properties indicating the\ncorresponding capability availability were described in the common AHCI\nDT-binding schema. Second we needed to add the enum items with the AHCI\nPort CMD fields, which hadn't been added so far. Thirdly we suggested to\ndiscard one of the port-map internal storage (force_port_map) in favor of\nre-using another one (save_port_map) in order to simplify the port-map\ninitialization interface a bit by getting rid from a redundant variable.\nFinally after discarding the double AHCI-version read procedure and\nchanging the __ahci_port_base() method prototype the platform\nfirmware-specific caps initialization functionality was introduced.\n\nThe main part of the series goes afterwards. A dedicated DWC AHCI SATA\ncontroller driver was introduced together with the corresponding\nDT-binding schema pre-patch. Note the driver built mode is activated\nsynchronously with the generic AHCI-platform driver by default so\nautomatically to be integrated into the kernel for the DWC AHCI-based\nplatforms which relied on activating the generic AHCI SATA controller\ndriver. Aside with the generic resources getting and AHCI-host\ninitialization, the driver implements the DWC-specific setups. In\nparticular it checks whether the platform capabilities activated by the\nfirmware (see the functionality described above) are actually supported by\nthe controller. It's done by means of the vendor-specific registers. Then\nit makes sure that the embedded 1ms timer interval, which is used for the\nDevSleep and CCC features, is correctly initialized based on the\napplication clock rate. The last but not least the driver provides a way\nto tune the DMA-interface performance up by setting the Tx/Rx transactions\nmaximum size up. The required values are specified by means of the\n\"snps,tx-ts-max\" and snps,rx-ts-max\" DT-properties.\n\nFinally we suggest to extend the DWC AHCI SATA controller driver\nfunctionality with a way to add the DWC-AHCI-based platform-specific\nquirks. Indeed there are many DWC AHCI-based controllers and just a few of\nthem are diverged too much to be handled by a dedicated AHCI-driver. The\nrest of them most likely can work well either with a generic version of\nthe driver or require a simple normally platform-specific quirk to get up\nand running. Such platforms can define a platform-data in the DWC AHCI\ndriver with a set of the controller-specific flags and initialization\nfunctions. Those functions will be called at the corresponding stages of\nthe device probe/resume/remove procedures so to be performing the platform\nsetups/cleanups.\n\nAfter the denoted above functionality is added we can finally introduce\nthe Baikal-T1 AHCI SATA controller support into the DWC AHCI SATA driver.\nThe controller is based on the DWC AHCI SATA IP-core v4.10a and can work\nwell with the generic DWC AHCI driver. The only peculiarity of it is\nconnected with the SATA Ports reference clock source. It can be supplied\neither from the internal SoC PLL or from the chip pads. Currently we have\nto prefer selecting the signal coming from the pads if the corresponding\nclock source is specified because the link doesn't get stably established\nwhen the internal clock signal is activated. In addition the platform has\ntrigger-based reset signals so the corresponding flag must be passed to\nthe generic AHCI-resource getter.\n\nLink: https://lore.kernel.org/linux-ide/20220324001628.13028-1-Sergey.Semin@baikalelectronics.ru/\nChangelog v2:\n- Rebase from kernel v5.17 to v5.18-rc3. (@Rob)\n- Rebase onto the already available AHCI DT schema. As a result two more\n patches have been added. (@Rob)\n- Rename 'syscon' property to 'baikal,bt1-syscon'. (@Rob)\n- Replace min/max constraints of the snps,{tx,rx}-ts-max property with\n enum [ 1, 2, 4, ..., 1024 ]. (@Rob)\n- Use dlemoal/libata.git git tree for the LIBATA SATA AHCI SYNOPSYS\n DWC driver (@Damien).\n- Change the local objects prefix from 'dwc_ahci_' to 'ahci_dwc_',\n from 'bt1_ahci_' to 'ahci_bt1_'. (@Damien)\n- Use LLDD term in place of 'glue-driver'. (@Damien)\n- Convert the ahci_platform_assert_rsts() method to returning int status\n (@Damien).\n- Drop the else word from the DT child_nodes value checking if-else-if\n statement (@Damien) and convert the after-else part into the ternary\n operator-based statement.\n- Convert to checking the error-case first in the devm_clk_bulk_get_all()\n method invocation. (@Damien)\n- Drop the rc variable initialization in the ahci_platform_get_resources()\n method. (@Damien)\n- Add comma and replace \"channel\" with \"SATA port\" in the reg property\n description of the sata-common.yaml schema. (@Damien)\n\nLink: https://lore.kernel.org/lkml/20220503200938.18027-1-Sergey.Semin@baikalelectronics.ru/\nChangelog v3:\n- Replace Jens's email address with Damien's one in the list of the\n common DT schema maintainers. (@Damien)\n\nLink: https://lore.kernel.org/linux-ide/20220511231810.4928-1-Sergey.Semin@baikalelectronics.ru/\nChangelog v4:\n- Drop clocks, clock-names, resets, reset-names and power-domains\n properties from the AHCI common schema. (@Rob)\n- Make sure the interrupts DT-property can have from 1 to 32 items\n specified. (@Rob)\n- Decrease the \"additionalProperties\" property identation in the DW AHCI\n SATA DT-schema otherwise it's percieved as the node property instead of\n the key one. (@Rob)\n- Convert the HBA-capabilities boolean properties to the bitfield\n DT-properties. (@Rob)\n- Create SATA/AHCI-port properties definition hierarchy so the sub-schemas\n could inherit and extend the ports properties of the super-schema. (@Rob)\n- Drop Baikal-T1 syscon reference and implement the clock signal\n source in the framework of the clock controller. (@Rob)\n- Refactor the patch\n [PATCH v3 01/23] dt-bindings: ata: ahci-platform: Drop dma-coherent property declaration\n to\n [PATCH v3 01/23] dt-bindings: ata: ahci-platform: Move dma-coherent to sata-common.yaml\n (@Rob)\n- Add a new patch:\n [PATCH v4 05/24] dt-bindings: ata: sata-brcm: Apply common AHCI schema\n- Drop the patch:\n [PATCH v3 05/23] ata: libahci_platform: Explicitly set rc on devres_alloc failure\n (@Hannes, @Damien)\n- Convert ahci_dwc_plat and ahci_bt1_plat to being statically defined.\n (@kbot)\n- Rebase onto the kernel v5.18.\n\nSigned-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>\nCc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru>\nCc: Pavel Parkhomenko <Pavel.Parkhomenko@baikalelectronics.ru>\nCc: Rob Herring <robh+dt@kernel.org>\nCc: linux-ide@vger.kernel.org\nCc: linux-kernel@vger.kernel.org\nCc: devicetree@vger.kernel.org\n\nSerge Semin (23):\n dt-bindings: ata: ahci-platform: Move dma-coherent to sata-common.yaml\n dt-bindings: ata: ahci-platform: Detach common AHCI bindings\n dt-bindings: ata: ahci-platform: Clarify common AHCI props constraints\n dt-bindings: ata: sata: Extend number of SATA ports\n dt-bindings: ata: sata-brcm: Apply common AHCI schema\n ata: libahci_platform: Convert to using platform devm-ioremap methods\n ata: libahci_platform: Convert to using devm bulk clocks API\n ata: libahci_platform: Sanity check the DT child nodes number\n ata: libahci_platform: Parse ports-implemented property in resources\n getter\n ata: libahci_platform: Introduce reset assertion/deassertion methods\n dt-bindings: ata: ahci: Add platform capability properties\n ata: libahci: Extend port-cmd flags set with port capabilities\n ata: libahci: Discard redundant force_port_map parameter\n ata: libahci: Don't read AHCI version twice in the save-config method\n ata: ahci: Convert __ahci_port_base to accepting hpriv as arguments\n ata: ahci: Introduce firmware-specific caps initialization\n dt-bindings: ata: ahci: Add DWC AHCI SATA controller DT schema\n ata: libahci_platform: Add function returning a clock-handle by id\n ata: ahci: Add DWC AHCI SATA controller support\n dt-bindings: ata: ahci: Add Baikal-T1 AHCI SATA controller DT schema\n ata: ahci-dwc: Add platform-specific quirks support\n ata: ahci-dwc: Add Baikal-T1 AHCI SATA interface support\n MAINTAINERS: Add maintainers for DWC AHCI SATA driver\n\n .../devicetree/bindings/ata/ahci-common.yaml | 123 +++++\n .../bindings/ata/ahci-platform.yaml | 92 +---\n .../bindings/ata/baikal,bt1-ahci.yaml | 116 ++++\n .../bindings/ata/brcm,sata-brcm.yaml | 4 +-\n .../devicetree/bindings/ata/sata-common.yaml | 17 +-\n .../bindings/ata/snps,dwc-ahci.yaml | 129 +++++\n MAINTAINERS | 9 +\n drivers/ata/Kconfig | 11 +\n drivers/ata/Makefile | 1 +\n drivers/ata/ahci.c | 4 +-\n drivers/ata/ahci.h | 21 +-\n drivers/ata/ahci_dwc.c | 494 ++++++++++++++++++\n drivers/ata/ahci_mtk.c | 2 -\n drivers/ata/ahci_platform.c | 5 -\n drivers/ata/ahci_st.c | 3 -\n drivers/ata/libahci.c | 63 ++-\n drivers/ata/libahci_platform.c | 222 ++++++--\n include/dt-bindings/ata/ahci.h | 20 +\n include/linux/ahci_platform.h | 8 +-\n 19 files changed, 1174 insertions(+), 170 deletions(-)\n create mode 100644 Documentation/devicetree/bindings/ata/ahci-common.yaml\n create mode 100644 Documentation/devicetree/bindings/ata/baikal,bt1-ahci.yaml\n create mode 100644 Documentation/devicetree/bindings/ata/snps,dwc-ahci.yaml\n create mode 100644 drivers/ata/ahci_dwc.c\n create mode 100644 include/dt-bindings/ata/ahci.h" }