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{ "id": 1414983, "url": "http://patchwork.ozlabs.org/api/covers/1414983/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/cover/20201211160612.1498780-1-sr@denx.de/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20201211160612.1498780-1-sr@denx.de>", "list_archive_url": null, "date": "2020-12-11T16:05:22", "name": "[v1,00/50] mips: octeon: Add serdes and device helper support incl. DM PCIe driver", "submitter": { "id": 13, "url": "http://patchwork.ozlabs.org/api/people/13/?format=api", "name": "Stefan Roese", "email": "sr@denx.de" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/cover/20201211160612.1498780-1-sr@denx.de/mbox/", "series": [ { "id": 220054, "url": "http://patchwork.ozlabs.org/api/series/220054/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=220054", "date": "2020-12-11T16:05:23", "name": "mips: octeon: Add serdes and device helper support incl. DM PCIe driver", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/220054/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/covers/1414983/comments/", "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@bilbo.ozlabs.org", "Authentication-Results": [ "ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=<UNKNOWN>)", "ozlabs.org;\n dmarc=none (p=none dis=none) header.from=denx.de", "ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=denx.de header.i=@denx.de header.a=rsa-sha256\n header.s=phobos-20191101 header.b=ldOGWIrg;\n\tdkim-atps=neutral", "phobos.denx.de;\n dmarc=none (p=none dis=none) header.from=denx.de", "phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de", "phobos.denx.de;\n dmarc=none (p=none dis=none) header.from=denx.de", "phobos.denx.de; spf=none smtp.mailfrom=sr@denx.de" ], "Received": [ "from phobos.denx.de (phobos.denx.de\n [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest\n SHA256)\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 4Cswdk3tmJz9sSs\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 12 Dec 2020 03:06:50 +1100 (AEDT)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id CE2BC82688;\n\tFri, 11 Dec 2020 17:06:28 +0100 (CET)", "by phobos.denx.de (Postfix, from userid 109)\n id F0ED882637; Fri, 11 Dec 2020 17:06:22 +0100 (CET)", "from mx2.mailbox.org (mx2a.mailbox.org\n [IPv6:2001:67c:2050:104:0:2:25:2])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 7EBCE82563\n for <u-boot@lists.denx.de>; Fri, 11 Dec 2020 17:06:17 +0100 (CET)", "from smtp1.mailbox.org (smtp1.mailbox.org [80.241.60.240])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) server-digest\n SHA256) (No client certificate requested)\n by mx2.mailbox.org (Postfix) with ESMTPS id D5134A0E13;\n Fri, 11 Dec 2020 17:06:16 +0100 (CET)", "from smtp1.mailbox.org ([80.241.60.240])\n by spamfilter04.heinlein-hosting.de (spamfilter04.heinlein-hosting.de\n [80.241.56.122]) (amavisd-new, port 10030)\n with ESMTP id 6bo5gDH1oT0N; Fri, 11 Dec 2020 17:06:13 +0100 (CET)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=denx.de;\n\ts=phobos-20191101; t=1607702789;\n\tbh=cHb+oDIzPYYJWf2wja+QjaCxKOK5WTv44unQDkRd5Fw=;\n\th=From:To:Cc:Subject:Date:List-Id:List-Unsubscribe:List-Archive:\n\t List-Post:List-Help:List-Subscribe:From;\n\tb=ldOGWIrg59TFcOm6+Zr5Is6zD7WAMkT7UIt1XhyJQQ0iUTuEExXDLkgY1jhswXZo2\n\t 8b30axSakvQPupNxAWBniQfRqbSbkDMj+cd52bJMLoSDY1Bi0OvY+/lCY0UPPstdph\n\t 5vYkyo1Ci7nITjQYd6AMl7Rq0bJRNcchuJZEeNP7slkwl4DQvqHF6lKuMIkVga4+vp\n\t kZ3zm1xs2LCd9tmFLdXlnZMUwkC5+rryIHvEiGht/W1UcK2a8rUAsongCAXtNIkgvv\n\t 2ylsQs+knSXIkMVX1AdT8WzrthHShWm3UcizTOgWbvUaV0tzt3p4McjA8W45Yk+eJg\n\t xSkduGTMnJydQ==", "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-2.6 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_LOW,\n SPF_HELO_NONE autolearn=ham autolearn_force=no version=3.4.2", "From": "Stefan Roese <sr@denx.de>", "To": "u-boot@lists.denx.de", "Cc": "daniel.schwierzeck@gmail.com, awilliams@marvell.com, cchavva@marvell.com", "Subject": "[PATCH v1 00/50] mips: octeon: Add serdes and device helper support\n incl. DM PCIe driver", "Date": "Fri, 11 Dec 2020 17:05:22 +0100", "Message-Id": "<20201211160612.1498780-1-sr@denx.de>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-MBO-SPAM-Probability": "**", "X-Rspamd-Score": "1.83 / 15.00 / 15.00", "X-Rspamd-Queue-Id": "AED27186D", "X-Rspamd-UID": "99cfe6", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.102.3 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "This patchset adds the serdes and (mostly networking) device helper\nmacros and functions, needed to support the still missing Octeon II /\nIII devices in mainline U-Boot.\n\nPlease excuse the massive amount of files in this patch series. Also the\nsometimes huge files (mostly headers with register definitions) that I\nneeded to include.\n\nThe infrastructure code with all the headers is ported without any\nintended functional changes from the 2013 Cavium / Marvell U-Boot\nversion. It has undergone many hours of extensive code cleanup and\nreformatting. Some of it done by using tools (checkpatch, Lindent, clang\nformat etc) and also some of it done manually, as I couldn't find some\ntools that could do the needed work in a reliable and functional way.\nThe result is that checkpatch now only throws a \"few\" warnings that are\nleft. Some of those can't be removed without an even more extensive\ncleanup / rewrite of the code, like the addition of typedefs.\n\nThe added headers and helper functions will be used by the upcoming\nsupport for the Octeon II / III networking drivers, including PHY &\nswitch support. It was not easily possible to split these infrastructure\nfiles into a separate patchset, as it is heavily interconnected in the\ncommon QLM/DLM serdes interface initialization. The result is, that the\nupcoming ethernet driver support will be much smaller (this is at least\nmy current assumption).\n\nThe added PCIe RC support with the included DM PCIe driver is the first\ndriver making use of this Octeon serdes infrastructure. This has been\ntested with an Intel E1000 PCIe network card in the Octeon 7304 EBB.\n\nThanks,\nStefan\n\n\nAaron Williams (42):\n mips: octeon: Add misc cvmx-helper header files\n mips: octeon: Add cvmx-agl-defs.h header file\n mips: octeon: Add cvmx-asxx-defs.h header file\n mips: octeon: Add cvmx-bgxx-defs.h header file\n mips: octeon: Add cvmx-ciu-defs.h header file\n mips: octeon: Add cvmx-dbg-defs.h header file\n mips: octeon: Add cvmx-dpi-defs.h header file\n mips: octeon: Add cvmx-dtx-defs.h header file\n mips: octeon: Add cvmx-fpa-defs.h header file\n mips: octeon: Add cvmx-gmxx-defs.h header file\n mips: octeon: Add cvmx-gserx-defs.h header file\n mips: octeon: Add cvmx-ipd-defs.h header file\n mips: octeon: Add cvmx-l2c-defs.h header file\n mips: octeon: Add cvmx-mio-defs.h header file\n mips: octeon: Add cvmx-npi-defs.h header file\n mips: octeon: Add cvmx-pcieepx-defs.h header file\n mips: octeon: Add cvmx-pciercx-defs.h header file\n mips: octeon: Add cvmx-pcsx-defs.h header file\n mips: octeon: Add cvmx-pemx-defs.h header file\n mips: octeon: Add cvmx-pepx-defs.h header file\n mips: octeon: Add cvmx-pip-defs.h header file\n mips: octeon: Add cvmx-pki-defs.h header file\n mips: octeon: Add cvmx-pko-defs.h header file\n mips: octeon: Add cvmx-pow-defs.h header file\n mips: octeon: Add cvmx-rst-defs.h header file\n mips: octeon: Add cvmx-sata-defs.h header file\n mips: octeon: Add cvmx-sli-defs.h header file\n mips: octeon: Add cvmx-smix-defs.h header file\n mips: octeon: Add cvmx-sriomaintx-defs.h header file\n mips: octeon: Add cvmx-sriox-defs.h header file\n mips: octeon: Add cvmx-sso-defs.h header file\n mips: octeon: Add misc remaining header files\n mips: octeon: Add cvmx-helper-cfg.c\n mips: octeon: Add cvmx-helper-fdt.c\n mips: octeon: Add cvmx-helper-jtag.c\n mips: octeon: Add cvmx-helper-util.c\n mips: octeon: Add cvmx-helper.c\n mips: octeon: Add cvmx-pcie.c\n mips: octeon: Add cvmx-qlm.c\n mips: octeon: Add octeon_fdt.c\n mips: octeon: Add octeon_qlm.c\n mips: octeon: octeon_ebb7304: Add board specific QLM init code\n\nStefan Roese (8):\n mips: global_data.h: Add Octeon specific data to arch_global_data\n struct\n mips: octeon: Misc changes required because of the newly added headers\n mips: octeon: Move cvmx-lmcx-defs.h from mach/cvmx to mach\n mips: octeon: Makefile: Enable building of the newly added C files\n mips: octeon: Kconfig: Enable CONFIG_SYS_PCI_64BIT\n mips: octeon: mrvl,cn73xx.dtsi: Add PCIe controller DT node\n mips: octeon: Add Octeon PCIe host controller driver\n mips: octeon: octeon_ebb7304_defconfig: Enable Octeon PCIe and E1000\n\n arch/mips/dts/mrvl,cn73xx.dtsi | 16 +\n arch/mips/include/asm/global_data.h | 9 +\n arch/mips/mach-octeon/Kconfig | 4 +\n arch/mips/mach-octeon/Makefile | 11 +\n arch/mips/mach-octeon/bootoctlinux.c | 1 +\n arch/mips/mach-octeon/cvmx-bootmem.c | 6 -\n arch/mips/mach-octeon/cvmx-coremask.c | 1 +\n arch/mips/mach-octeon/cvmx-helper-cfg.c | 1914 ++++\n arch/mips/mach-octeon/cvmx-helper-fdt.c | 970 ++\n arch/mips/mach-octeon/cvmx-helper-jtag.c | 172 +\n arch/mips/mach-octeon/cvmx-helper-util.c | 1225 +++\n arch/mips/mach-octeon/cvmx-helper.c | 2611 +++++\n arch/mips/mach-octeon/cvmx-pcie.c | 2487 +++++\n arch/mips/mach-octeon/cvmx-qlm.c | 2350 +++++\n .../mach-octeon/include/mach/cvmx-address.h | 209 +\n .../mach-octeon/include/mach/cvmx-agl-defs.h | 3135 ++++++\n .../mach-octeon/include/mach/cvmx-asxx-defs.h | 709 ++\n .../mach-octeon/include/mach/cvmx-bgxx-defs.h | 4106 +++++++\n .../mach-octeon/include/mach/cvmx-ciu-defs.h | 7351 +++++++++++++\n .../mach-octeon/include/mach/cvmx-cmd-queue.h | 441 +\n .../mach-octeon/include/mach/cvmx-csr-enums.h | 87 +\n arch/mips/mach-octeon/include/mach/cvmx-csr.h | 78 +\n .../mach-octeon/include/mach/cvmx-dbg-defs.h | 33 +\n .../mach-octeon/include/mach/cvmx-dpi-defs.h | 1460 +++\n .../mach-octeon/include/mach/cvmx-dtx-defs.h | 6962 ++++++++++++\n .../mach-octeon/include/mach/cvmx-error.h | 456 +\n .../mach-octeon/include/mach/cvmx-fpa-defs.h | 1866 ++++\n arch/mips/mach-octeon/include/mach/cvmx-fpa.h | 217 +\n .../mips/mach-octeon/include/mach/cvmx-fpa1.h | 196 +\n .../mips/mach-octeon/include/mach/cvmx-fpa3.h | 566 +\n .../include/mach/cvmx-global-resources.h | 213 +\n arch/mips/mach-octeon/include/mach/cvmx-gmx.h | 16 +\n .../mach-octeon/include/mach/cvmx-gmxx-defs.h | 6378 +++++++++++\n .../include/mach/cvmx-gserx-defs.h | 2191 ++++\n .../include/mach/cvmx-helper-agl.h | 68 +\n .../include/mach/cvmx-helper-bgx.h | 335 +\n .../include/mach/cvmx-helper-board.h | 558 +\n .../include/mach/cvmx-helper-cfg.h | 884 ++\n .../include/mach/cvmx-helper-errata.h | 50 +\n .../include/mach/cvmx-helper-fdt.h | 568 +\n .../include/mach/cvmx-helper-fpa.h | 43 +\n .../include/mach/cvmx-helper-gpio.h | 427 +\n .../include/mach/cvmx-helper-ilk.h | 93 +\n .../include/mach/cvmx-helper-ipd.h | 16 +\n .../include/mach/cvmx-helper-jtag.h | 84 +\n .../include/mach/cvmx-helper-loop.h | 37 +\n .../include/mach/cvmx-helper-npi.h | 42 +\n .../include/mach/cvmx-helper-pki.h | 319 +\n .../include/mach/cvmx-helper-pko.h | 51 +\n .../include/mach/cvmx-helper-pko3.h | 76 +\n .../include/mach/cvmx-helper-rgmii.h | 99 +\n .../include/mach/cvmx-helper-sfp.h | 437 +\n .../include/mach/cvmx-helper-sgmii.h | 81 +\n .../include/mach/cvmx-helper-spi.h | 73 +\n .../include/mach/cvmx-helper-srio.h | 72 +\n .../include/mach/cvmx-helper-util.h | 412 +\n .../include/mach/cvmx-helper-xaui.h | 108 +\n .../mach-octeon/include/mach/cvmx-helper.h | 565 +\n .../mach-octeon/include/mach/cvmx-hwfau.h | 606 ++\n .../mach-octeon/include/mach/cvmx-hwpko.h | 570 +\n arch/mips/mach-octeon/include/mach/cvmx-ilk.h | 154 +\n .../mach-octeon/include/mach/cvmx-ipd-defs.h | 1925 ++++\n arch/mips/mach-octeon/include/mach/cvmx-ipd.h | 233 +\n .../mach-octeon/include/mach/cvmx-l2c-defs.h | 172 +\n .../include/mach/{cvmx => }/cvmx-lmcx-defs.h | 0\n .../mach-octeon/include/mach/cvmx-mio-defs.h | 353 +\n .../mach-octeon/include/mach/cvmx-npi-defs.h | 1953 ++++\n .../mach-octeon/include/mach/cvmx-packet.h | 40 +\n .../mips/mach-octeon/include/mach/cvmx-pcie.h | 279 +\n .../include/mach/cvmx-pcieepx-defs.h | 6848 ++++++++++++\n .../include/mach/cvmx-pciercx-defs.h | 5586 ++++++++++\n .../mach-octeon/include/mach/cvmx-pcsx-defs.h | 1005 ++\n .../mach-octeon/include/mach/cvmx-pemx-defs.h | 2028 ++++\n .../mach-octeon/include/mach/cvmx-pexp-defs.h | 1382 +++\n .../mach-octeon/include/mach/cvmx-pip-defs.h | 3040 ++++++\n arch/mips/mach-octeon/include/mach/cvmx-pip.h | 1080 ++\n .../mach-octeon/include/mach/cvmx-pki-defs.h | 2353 +++++\n .../include/mach/cvmx-pki-resources.h | 157 +\n arch/mips/mach-octeon/include/mach/cvmx-pki.h | 970 ++\n .../mach-octeon/include/mach/cvmx-pko-defs.h | 9388 +++++++++++++++++\n .../mach/cvmx-pko-internal-ports-range.h | 43 +\n .../include/mach/cvmx-pko3-queue.h | 175 +\n .../mach-octeon/include/mach/cvmx-pow-defs.h | 1135 ++\n arch/mips/mach-octeon/include/mach/cvmx-pow.h | 2991 ++++++\n arch/mips/mach-octeon/include/mach/cvmx-qlm.h | 304 +\n .../mips/mach-octeon/include/mach/cvmx-regs.h | 330 +-\n .../mach-octeon/include/mach/cvmx-rst-defs.h | 77 +\n .../mach-octeon/include/mach/cvmx-sata-defs.h | 311 +\n .../mach-octeon/include/mach/cvmx-scratch.h | 113 +\n .../mach-octeon/include/mach/cvmx-sli-defs.h | 6548 ++++++++++++\n .../mach-octeon/include/mach/cvmx-smix-defs.h | 360 +\n .../include/mach/cvmx-sriomaintx-defs.h | 61 +\n .../include/mach/cvmx-sriox-defs.h | 44 +\n .../mach-octeon/include/mach/cvmx-sso-defs.h | 2904 +++++\n arch/mips/mach-octeon/include/mach/cvmx-wqe.h | 1462 +++\n .../mach-octeon/include/mach/octeon-feature.h | 2 +\n .../mach-octeon/include/mach/octeon-model.h | 2 +\n .../mach-octeon/include/mach/octeon_ddr.h | 189 +-\n arch/mips/mach-octeon/octeon_fdt.c | 1040 ++\n arch/mips/mach-octeon/octeon_qlm.c | 5853 ++++++++++\n board/Marvell/octeon_ebb7304/board.c | 732 +-\n configs/octeon_ebb7304_defconfig | 5 +-\n drivers/pci/Kconfig | 6 +\n drivers/pci/Makefile | 1 +\n drivers/pci/pcie_octeon.c | 159 +\n drivers/ram/octeon/octeon3_lmc.c | 28 +-\n drivers/ram/octeon/octeon_ddr.c | 22 +-\n 107 files changed, 118724 insertions(+), 240 deletions(-)\n create mode 100644 arch/mips/mach-octeon/cvmx-helper-cfg.c\n create mode 100644 arch/mips/mach-octeon/cvmx-helper-fdt.c\n create mode 100644 arch/mips/mach-octeon/cvmx-helper-jtag.c\n create mode 100644 arch/mips/mach-octeon/cvmx-helper-util.c\n create mode 100644 arch/mips/mach-octeon/cvmx-helper.c\n create mode 100644 arch/mips/mach-octeon/cvmx-pcie.c\n create mode 100644 arch/mips/mach-octeon/cvmx-qlm.c\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-address.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-agl-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-asxx-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-bgxx-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-ciu-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-cmd-queue.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-csr-enums.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-csr.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-dbg-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-dpi-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-dtx-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-error.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-fpa-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-fpa.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-fpa1.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-fpa3.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-global-resources.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-gmx.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-gmxx-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-gserx-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-agl.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-bgx.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-board.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-cfg.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-errata.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-fdt.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-fpa.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-gpio.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-ilk.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-ipd.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-jtag.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-loop.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-npi.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-pki.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-pko.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-pko3.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-rgmii.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-sfp.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-sgmii.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-spi.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-srio.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-util.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper-xaui.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-helper.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-hwfau.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-hwpko.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-ilk.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-ipd-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-ipd.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-l2c-defs.h\n rename arch/mips/mach-octeon/include/mach/{cvmx => }/cvmx-lmcx-defs.h (100%)\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-mio-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-npi-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-packet.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pcie.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pcieepx-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pciercx-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pcsx-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pemx-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pexp-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pip-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pip.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pki-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pki-resources.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pki.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pko-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pko-internal-ports-range.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pko3-queue.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pow-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-pow.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-qlm.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-rst-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-sata-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-scratch.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-sli-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-smix-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-sriomaintx-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-sriox-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-sso-defs.h\n create mode 100644 arch/mips/mach-octeon/include/mach/cvmx-wqe.h\n create mode 100644 arch/mips/mach-octeon/octeon_fdt.c\n create mode 100644 arch/mips/mach-octeon/octeon_qlm.c\n create mode 100644 drivers/pci/pcie_octeon.c" }